公开(公告)号：US20030013247A1

公开(公告)日：2003-01-16

申请号：US10234089

申请日：2002-09-04

申请人： International Business Machines Corporation

发明人： Osamu Tokuhiro ,  Hiroyuki Ueda ,  Masahiko Machida

IPC分类号： H01L021/8238

CPC分类号： H01L29/66765 ,  G02F1/1368 ,  G02F2001/136231 ,  H01L29/4908 ,  H01L29/78609 ,  H01L29/78633

摘要： A method of manufacturing a liquid crystal panel comprises the steps of forming a gate insulating film, a channel layer and an etching stopper layer on a transparent substrate bearing a gate electrode, exposing the substrate to light from its back surface side by using the gate electrode as a light shielding mask by photolithography, developing the resist, etching the etching stopper layer, forming a source/drain layer, and etching the source/drain layer and a remaining part of the etching stopper by chemical gas phase etching.

公开(公告)号：US20040203195A1

公开(公告)日：2004-10-14

申请号：US10833754

申请日：2004-04-28

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Takatoshi Tsujimura ,  Osamu Tokuhiro ,  Mitsuo Morooka ,  Takashi Miyamoto

IPC分类号： H01L021/00 ,  H01L021/84 ,  H01L021/336 ,  H01L021/8234 ,  H01L027/01 ,  H01L027/12 ,  H01L031/0392 ,  C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC分类号： H01L29/78696 ,  H01L29/66765 ,  H01L29/78669

摘要： The present invention improves a productivity in growing an a-Si film in a thin film transistor and to obtain an excellent thin film transistor characteristic. More specifically, disclosed is a thin film transistor in which an amorphous silicon film 2, a gate insulating film 3 and a gate electrode are sequentially stacked on an insulating substrate 1. The amorphous silicon film 2 includes a low defect-density amorphous silicon layer 5 formed at a low deposition rate and a high deposition rate amorphous silicon layer 6 formed at a deposition rate higher than that of the low defect-density amorphous silicon layer 5. The low defect-density amorphous silicon layer 5 in the amorphous silicon film 2 is grown closer to the insulating substrate 1, and the high deposition rate amorphous silicon layer 6 is grown closer to the gate insulating film 3.

摘要翻译： 本发明提高了在薄膜晶体管中生长a-Si膜的生产率，并获得优异的薄膜晶体管特性。 更具体地，公开了一种薄膜晶体管，其中非晶硅膜2，栅极绝缘膜3和栅电极依次层叠在绝缘基板1上。非晶硅膜2包括低缺陷密度非晶硅层5 以低沉积速率形成，并以高于低缺陷密度非晶硅层5的沉积速率形成沉积速率非晶硅层6.非晶硅膜2中的低缺陷密度非晶硅层5是 生长在更靠近绝缘基板1的地方，并且高沉积速率非晶硅层6生长得更靠近栅极绝缘膜3。

公开(公告)号：US20030122126A1

公开(公告)日：2003-07-03

申请号：US10331699

申请日：2002-12-30

申请人： International Business Machines Corporation

发明人： Takatoshi Tsujimura ,  Osamu Tokuhiro ,  Mitsuo Morooka ,  Takashi Miyamoto

IPC分类号： H01L029/04

CPC分类号： H01L29/78696 ,  H01L29/66765 ,  H01L29/78669

摘要： The present invention improves a productivity in growing an a-Si film in a thin film transistor and to obtain an excellent thin film transistor characteristic. More specifically, disclosed is a thin film transistor in which an amorphous silicon film 2, a gate insulating film 3 and a gate electrode are sequentially stacked on an insulating substrate 1. The amorphous silicon film 2 includes a low defect-density amorphous silicon layer 5 formed at a low deposition rate and a high deposition rate amorphous silicon layer 6 formed at a deposition rate higher than that of the low defect-density amorphous silicon layer 5. The low defect-density amorphous silicon layer 5 in the amorphous silicon film 2 is grown closer to the insulating substrate 1, and the high deposition rate amorphous silicon layer 6 is grown closer to the gate insulating film 3.

摘要翻译： 本发明提高了在薄膜晶体管中生长a-Si膜的生产率，并获得优异的薄膜晶体管特性。 更具体地，公开了一种薄膜晶体管，其中非晶硅膜2，栅极绝缘膜3和栅电极依次层叠在绝缘基板1上。非晶硅膜2包括低缺陷密度非晶硅层5 以低沉积速率形成，并以高于低缺陷密度非晶硅层5的沉积速率形成沉积速率非晶硅层6.非晶硅膜2中的低缺陷密度非晶硅层5是 生长在更靠近绝缘基板1的地方，并且高沉积速率非晶硅层6生长得更靠近栅极绝缘膜3。

公开(公告)号：US20020106839A1

公开(公告)日：2002-08-08

申请号：US10061578

申请日：2002-01-31

申请人： International Business Machines Corporation

发明人： Takatoshi Tsujimura ,  Taroh Hasumi ,  Osamu Tokuhiro ,  Mitsuo Morooka

IPC分类号： H01L021/00

CPC分类号： H01L29/66757 ,  H01L29/78633

摘要： A thin film transistor and method of making the same is disclosed in which a contact hole is formed with a flattened interface between openings in an inorganic material passivation layer and an organic material interlayer insulating film thereabove. The method includes etching an opening in the interlayer insulating film, using that opening as a mask for subsequently etching a self-aligned opening in the passivation layer, and again etching the interlayer insulating film in a develop back process to obtain a contact hole having a flattened inner sidewall.

摘要翻译： 公开了一种薄膜晶体管及其制造方法，其中在无机材料钝化层中的开口之间形成接触孔，并在其上形成有机材料层间绝缘膜。 该方法包括使用该开口作为掩模来蚀刻层间绝缘膜中的开口，用于随后蚀刻钝化层中的自对准开口，并且再次在显影反向工艺中蚀刻层间绝缘膜，以获得具有 平坦的内侧壁。

公开(公告)号：US20040105041A1

公开(公告)日：2004-06-03

申请号：US10617964

申请日：2003-07-11

申请人： International Business Machines Corporation

发明人： Takatoshi Tsujimura ,  Takashi Miyamoto ,  Osamu Tokuhiro ,  Mitsuo Morooka

IPC分类号： G02F001/136

CPC分类号： G02F1/136209 ,  H01L27/124 ,  H01L29/78633

摘要： The present invention reduces the number of necessary steps in a thin-film-transistor manufacturing process and prevents an abnormal potential from being generated due to a leak current from another data line. More particularly, the present invention is directed to a thin film transistor comprising a gate electrode 30 disposed on a predetermined substrate and formed in a predetermined pattern, a semiconductor layer formed correspondingly to patterning of the gate electrode 30, a pixel electrode 25 interposed by the semiconductor layer, and a signal electrode 26 interposed by the semiconductor layer and disposed at a predetermined interval from the pixel electrode 25, in which the signal electrode 26 is disposed at such a position where the signal electrode prevents crosstalk running from adjacent signal lines 32b and 32c to the pixel electrode 25 via the semiconductor layer.

摘要翻译： 本发明减少了薄膜晶体管制造工艺中的必要步骤的数量，并且防止由于来自另一数据线的泄漏电流而产生异常电位。 更具体地，本发明涉及一种薄膜晶体管，其包括设置在预定基板上并以预定图案形成的栅极30，对应于栅极30的图案形成的半导体层， 半导体层和由半导体层插入并以与像素电极25相隔预定间隔配置的信号电极26，信号电极26设置在信号电极防止从相邻信号线32b发生串扰的位置， 32c经由半导体层到达像素电极25。

公开(公告)号：US20030107040A1

公开(公告)日：2003-06-12

申请号：US10348909

申请日：2003-01-23

申请人： International Business Machines Corporation

发明人： Osamu Tokuhiro ,  Hiroyuki Ueda

IPC分类号： H01L021/00

CPC分类号： G02F1/1368 ,  G02F1/136286 ,  H01L27/124 ,  H01L29/66765 ,  H01L29/78609

摘要： A liquid crystal display panel (and a method for manufacturing the liquid crystal display panel) includes a gate line and a signal line intersecting the gate line at an intersection portion where the gate line and the signal line intersect each other. The gate line includes at least two conductive portions and at least one opening portion on the intersection portion.

摘要翻译： 液晶显示面板（以及液晶显示面板的制造方法）在栅极线与信号线相交的交叉部分包括栅极线和与栅极线交叉的信号线。 栅极线包括至少两个导电部分和交叉部分上的至少一个开口部分。