公开(公告)号：US20040241460A1

公开(公告)日：2004-12-02

申请号：US10696601

申请日：2003-10-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

IPC: B32B009/04 ,  B32B015/04 ,  H01L021/36

CPC classification number: H01L21/76243 ,  H01L21/26506 ,  H01L21/76267 ,  Y10T428/12674 ,  Y10T428/12681

Abstract: A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The implanted-ion rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

Abstract translation: 提供了使用SIMOX和Ge相互扩散形成基本上松弛的，优质的绝缘体上硅衬底材料的方法。 该方法包括首先将离子注入到含Si衬底中以在含Si衬底中形成植入离子富集区。 注入离子富集区具有足够的离子浓度，使得在随后的高温退火期间形成耐Ge扩散的阻挡层。 接下来，在含Si衬底的表面上形成Ge含有层，然后在允许形成阻挡层和Ge的相互扩散的温度下进行加热步骤，从而形成基本上松弛的单晶SiGe层 阻挡层顶部。

公开(公告)号：US20040235275A1

公开(公告)日：2004-11-25

申请号：US10882790

申请日：2004-07-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Takeshi Fukunaga

IPC: H01L021/36 ,  H01L021/20

CPC classification number: H01L21/02532 ,  G02F1/13454 ,  H01L21/02667 ,  H01L21/02672 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78666 ,  H01L29/78675 ,  H01L29/78684

Abstract: Disclosed is a semiconductor device having a driver circuit operable at high speed and a method for manufacturing same. An active matrix liquid crystal display device uses a polysilicon film for its TFT active layer constituting a pixel matrix circuit because of low off current characteristics. On the other hand, a TFT active layer constituting driver circuits and a signal processing circuit uses a poly silicon germanium film because of high speed operation characteristics.

Abstract translation: 公开了一种具有可高速操作的驱动电路的半导体器件及其制造方法。 由于低电流特性，有源矩阵液晶显示装置使用构成像素矩阵电路的TFT有源层的多晶硅膜。 另一方面，构成驱动电路的TFT有源层和信号处理电路由于高速运行特性而使用多晶硅锗膜。

公开(公告)号：US20040229395A1

公开(公告)日：2004-11-18

申请号：US10872746

申请日：2004-06-21

Inventor： Jitendra S. Goela ,  Michael A. Pickering

IPC: H01L021/00 ,  C30B001/00 ,  H01L021/469 ,  H01L021/36

CPC classification number: C23C16/01 ,  C23C16/325

Abstract: An opaque, low resistivity silicon carbide and a method of making the opaque, low resistivity silicon carbide. The opaque, low resistivity silicon carbide is doped with a sufficient amount of nitrogen to provide the desired properties of the silicon carbide. The opaque, low resistivity silicon carbide is a free-standing bulk material that may be machined to form furniture used for holding semi-conductor wafers during processing of the wafers. The opaque, low resistivity silicon carbide is opaque at wavelengths of light where semi-conductor wafers are processed. Such opaqueness provides for improved semi-conductor wafer manufacturing. Edge rings fashioned from the opaque, low resistivity silicon carbide can be employed in RTP chambers.

Abstract translation: 不透明，低电阻率碳化硅和制造不透明低电阻率碳化硅的方法。 不透明的低电阻率碳化硅被掺杂足够量的氮以提供所需的碳化硅性质。 不透明的低电阻率碳化硅是一种独立的散装材料，其可以被机加工以形成用于在晶片加工期间保持半导体晶片的家具。 不透明的低电阻率碳化硅在处理半导体晶片的光的波长处是不透明的。 这种不透明度提供了改进的半导体晶片制造。 由不透明，低电阻率碳化硅形成的边缘环可用于RTP室。

公开(公告)号：US20040224487A1

公开(公告)日：2004-11-11

申请号：US10870074

申请日：2004-06-18

Inventor： Myoung-Su Yang

IPC: C30B001/00 ,  H01L021/20 ,  H01L021/36 ,  H01L021/00

CPC classification number: H01L21/0268 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/78675

Abstract: A mask and its application in sequential lateral solidification (SLS) crystallization of amorphous silicon. The mask includes a light absorptive portion for blocking a laser beam and first and second light-transmitting portions each having an echelon formation with a tier-shaped outline. The first and second light-transmitting portions pass a laser beam and include a plurality of adjacent rectangular-shaped patterns that comprise the echelon formation. The second light-transmitting portion is located between the first light-transmitting portions and has fewer shaped-shaped patterns than the first light-transmitting portions. In operation, the mask moves transversely by no more than the width of the shaped-shaped patterns as a laser performs SLS crystallization. The first and second light-transmitting portions control grain growth such that high quality polycrystalline silicon is formed.

Abstract translation: 一种掩模及其在非晶硅顺序侧向凝固（SLS）结晶中的应用。 掩模包括用于阻挡激光束的光吸收部分和每个具有层状轮廓的梯形结构的第一和第二透光部分。 第一和第二光透射部分通过激光束并且包括多个相邻的矩形图案，其包括梯形结构。 第二透光部分位于第一光透射部分之间并且具有比第一光透射部分更少的成形形状的图案。 在操作中，当激光器执行SLS结晶时，掩模横向移动不超过成形图案的宽度。 第一和第二光透射部分控制晶粒生长，从而形成高质量的多晶硅。

公开(公告)号：US20040221792A1

公开(公告)日：2004-11-11

申请号：US10431134

申请日：2003-05-07

Applicant: Micron Technology, Inc.

Inventor： Leonard Forbes

IPC: C30B001/00 ,  C30B003/00 ,  C30B005/00 ,  C30B028/02 ,  H01L021/20 ,  H01L021/36 ,  H01L021/00

CPC classification number: C30B1/023 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/26506 ,  H01L29/1054 ,  H01L29/6659 ,  H01L29/7833

Abstract: One aspect of this disclosure relates to a method for forming a strained silicon over silicon germanium (Si/SiGe) structure. In various embodiments, germanium ions are implanted into a silicon substrate with a desired dose and energy to be located beneath a surface silicon layer in the substrate. The implantation of germanium ions at least partially amorphizes the surface silicon layer. The substrate is heat treated to regrow a crystalline silicon layer over a resulting silicon germanium layer using a solid phase epitaxial (SPE) process. The crystalline silicon layer is strained by a lattice mismatch between the silicon germanium layer and the crystalline silicon layer. Other aspects are provided herein.

Abstract translation: 本公开的一个方面涉及一种用于在硅锗（Si / SiGe）结构上形成应变硅的方法。 在各种实施例中，将锗离子注入到硅衬底中，其中所需的剂量和能量位于衬底中的表面硅层的下方。 锗离子的注入至少部分地使表面硅层非晶化。 使用固相外延（SPE）工艺将衬底热处理以在所得硅锗层上再结晶硅层。 晶体硅层被硅锗层和晶体硅层之间的晶格失配应变。 本文提供了其他方面。

公开(公告)号：US20040214411A1

公开(公告)日：2004-10-28

申请号：US10701174

申请日：2003-11-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Osamu Nakamura ,  Hironobu Shoji

IPC: C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: H01L21/02686 ,  C30B1/023 ,  C30B1/08 ,  C30B29/06 ,  H01L21/02683 ,  H01L21/2026

Abstract: It is an object of the present invention to provide a laser irradiation apparatus being able to crystallize the semiconductor film homogeneously while suppressing the variation of the crystallinity in the semiconductor film and the unevenness of the state of the surface thereof. It is another object of the present invention to provide a method for manufacturing a semiconductor device using the laser irradiation apparatus which can suppress the variation of on-current, mobility, and threshold of TFT, and to further provide a semiconductor device manufactured with the manufacturing method. A method for manufacturing a semiconductor device comprising the steps of adding the first noble gas to the semiconductor film formed over the insulating surface with the ion doping method and irradiating the semiconductor film with the first noble gas added therein with the laser light in an atmosphere of second noble gas, wherein the magnetic field is applied to the semiconductor film with the first noble gas added when the laser light is irradiated.

Abstract translation: 本发明的目的是提供一种激光照射装置，其能够在抑制半导体膜中的结晶性的变化和其表面状态的不均匀性的同时使半导体膜均匀结晶。 本发明的另一个目的是提供一种使用能够抑制TFT的导通电流，迁移率和阈值的变化的激光照射装置的半导体器件的制造方法，并且进一步提供利用制造制造的半导体器件 方法。 一种制造半导体器件的方法，包括以下步骤：用离子掺杂方法将第一稀有气体添加到形成在绝缘表面上的半导体膜上，并且在其中加入第一稀有气体的激光照射半导体膜， 第二惰性气体，其中当照射激光时，在加入了第一稀有气体的情况下将磁场施加到半导体膜。

公开(公告)号：US20040203195A1

公开(公告)日：2004-10-14

申请号：US10833754

申请日：2004-04-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Takatoshi Tsujimura ,  Osamu Tokuhiro ,  Mitsuo Morooka ,  Takashi Miyamoto

IPC: H01L021/00 ,  H01L021/84 ,  H01L021/336 ,  H01L021/8234 ,  H01L027/01 ,  H01L027/12 ,  H01L031/0392 ,  C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: H01L29/78696 ,  H01L29/66765 ,  H01L29/78669

Abstract: The present invention improves a productivity in growing an a-Si film in a thin film transistor and to obtain an excellent thin film transistor characteristic. More specifically, disclosed is a thin film transistor in which an amorphous silicon film 2, a gate insulating film 3 and a gate electrode are sequentially stacked on an insulating substrate 1. The amorphous silicon film 2 includes a low defect-density amorphous silicon layer 5 formed at a low deposition rate and a high deposition rate amorphous silicon layer 6 formed at a deposition rate higher than that of the low defect-density amorphous silicon layer 5. The low defect-density amorphous silicon layer 5 in the amorphous silicon film 2 is grown closer to the insulating substrate 1, and the high deposition rate amorphous silicon layer 6 is grown closer to the gate insulating film 3.

Abstract translation: 本发明提高了在薄膜晶体管中生长a-Si膜的生产率，并获得优异的薄膜晶体管特性。 更具体地，公开了一种薄膜晶体管，其中非晶硅膜2，栅极绝缘膜3和栅电极依次层叠在绝缘基板1上。非晶硅膜2包括低缺陷密度非晶硅层5 以低沉积速率形成，并以高于低缺陷密度非晶硅层5的沉积速率形成沉积速率非晶硅层6.非晶硅膜2中的低缺陷密度非晶硅层5是 生长在更靠近绝缘基板1的地方，并且高沉积速率非晶硅层6生长得更靠近栅极绝缘膜3。

公开(公告)号：US20040192015A1

公开(公告)日：2004-09-30

申请号：US10809070

申请日：2004-03-25

Applicant: Siltronic AG

Inventor： Wilfried Von Ammon ,  Janis Virbulis ,  Martin Weber ,  Thomas Wetzel ,  Herbert Schmidt

IPC: H01L021/30 ,  H01L021/46 ,  C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: C30B29/06 ,  C30B15/14 ,  C30B15/203 ,  C30B15/206 ,  Y10T117/1068

Abstract: A method for the production of a silicon single crystal by pulling the single crystal, according to the Czochralski method, from a melt which is held in a rotating crucible, the single crystal growing at a growth front, heat being deliberately supplied to the center of the growth front by a heat flux directed at the growth front. The method produces a silicon single crystal with an oxygen content of from 4*1017 cmnull3 to 7.2*1017 cmnull3 and a radial concentration change for boron or phosphorus of less than 5%, which has no agglomerated self-point defects. Semiconductor wafers are separated from the single crystal. These semiconductor wafers have may have agglomerated vacancy defects (COPs) as the only self-point defect type or may have certain other defect distributions.

Abstract translation: 通过使用Czochralski法从保持在旋转坩埚中的熔体中拉出单晶而生长单晶的方法，在生长前沿生长的单晶，故意将热量供给到 通过针对生长前沿的热通量的增长前沿。 该方法产生氧含量为4×10 17 cm -3至7.2×10 17 cm -3的硅单晶，硼或磷的径向浓度变化小于5％ ，其没有凝聚的自点缺陷。 半导体晶片与单晶分离。 这些半导体晶片可以具有作为唯一自点缺陷类型的聚集空位缺陷（COP），或者可以具有某些其他缺陷分布。

公开(公告)号：US20040180499A1

公开(公告)日：2004-09-16

申请号：US10387623

申请日：2003-03-12

Inventor： Brian S. Doyle ,  Anand S. Murthy ,  Robert S. Chau

IPC: H01L021/36

CPC classification number: H01L29/66795 ,  B82Y10/00 ,  B82Y20/00 ,  H01L21/02381 ,  H01L21/02387 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/0262 ,  H01L29/125 ,  H01S5/341

Abstract: A method is described for forming an element of a microelectronic circuit. A sacrificial layer is formed on an upper surface of a support layer. The sacrificial layer is extremely thin and uniform. A height-defining layer is then formed on the sacrificial layer, whereafter the sacrificial layer is etched away so that a well-defined gap is left between an upper surface of the support layer and a lower surface of the height-defining layer. A monocrystalline semiconductor material is then selectively grown from a nucleation silicon site through the gap. The monocrystalline semiconductor material forms a monocrystalline layer having a thickness corresponding to the thickness of the original sacrificial layer.

Abstract translation: 描述了形成微电子电路的元件的方法。 牺牲层形成在支撑层的上表面上。 牺牲层非常薄而均匀。 然后在牺牲层上形成高度限定层，然后牺牲层被蚀刻掉，使得在支撑层的上表面和高度限定层的下表面之间留下明确限定的间隙。 然后从成核硅部位通过间隙选择性地生长单晶半导体材料。 单晶半导体材料形成具有对应于原始牺牲层的厚度的厚度的单晶层。

公开(公告)号：US20040166655A1

公开(公告)日：2004-08-26

申请号：US10373378

申请日：2003-02-24

Inventor： Man Wong ,  Tianfu Ma ,  Zhiguo Meng

IPC: H01L021/36

CPC classification number: H01L21/02672 ,  H01L21/2022

Abstract: The present invention provides a method for forming metal-induced laterally crystallized polysilicon in which the metal residue is reduced. A first low temperature lateral crystallization is performed using a metal crystallization-inducing agent such as nickel or a nickel compound. A second lateral crystallization is then carried out which may be either a low-temperature crystallization using metal residue from the first crystallization as the metal crystallization-inducing agent, or may be a high temperature crystallization that does not require a metal.

Abstract translation: 本发明提供一种金属化的横向结晶多晶硅的形成方法，其中金属残渣被还原。 使用金属结晶诱导剂如镍或镍化合物进行第一低温横向结晶。 然后进行第二横向结晶，其可以是使用来自第一结晶的金属残余物作为金属结晶诱导剂的低温结晶，或者可以是不需要金属的高温结晶。