公开(公告)号：US20190393082A1

公开(公告)日：2019-12-26

申请号：US16553342

申请日：2019-08-28

Applicant: International Business Machines Corporation

Inventor： Sean D. Burns ,  Lawrence A. Clevenger ,  Matthew E. Colburn ,  Sivananda K. Kanakasabapathy ,  Yann A.M. Mignot ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528 ,  H01L21/311 ,  H01L21/02

Abstract: An interconnect structure having a pitch of less than 40 nanometers and a self-aligned quadruple patterning process for forming the interconnect structure includes three types of lines: a β line defined by a patterned bottom mandrel formed in the self-aligned quadruple patterning process; a γ line defined by location underneath a top mandrel formed in the self-aligned quadruple patterning process; and an α line defined by elimination located underneath neither the top mandrel or the bottom mandrel formed in the self-aligned quadruple patterning process. The interconnect structure further includes multi-track jogs selected from a group consisting of a βγβ jog; a βαβ jog; an αβγ jog; a γβα jog, and combinations thereof. The first and third positions refer to the uncut line and the second position refers to the cut line in the self-aligned quadruple patterning process.

公开(公告)号：US20180269274A1

公开(公告)日：2018-09-20

申请号：US15805829

申请日：2017-11-07

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kisup Chung ,  Isabel C. Estrada-Raygoza ,  Hemanth Jagannathan ,  Chi-Chun Liu ,  Yann A.M. Mignot ,  Hao Tang

IPC: H01L49/02

CPC classification number: H01L28/60

Abstract: Methods of forming capacitors include forming a self-assembled pattern of periodic first and second domains using first and second block copolymer materials over a substrate. The second block copolymer material is etched away. Material from the substrate is etched based on a pattern defined by the first block copolymer material to form cavities in the substrate. A capacitor stack is conformally deposited over the substrate, such that the capacitor stack is formed on horizontal surfaces of the substrate and vertical surfaces of the cavities.

公开(公告)号：US20180247824A1

公开(公告)日：2018-08-30

申请号：US15445112

申请日：2017-02-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Sean D. Burns ,  Nelson M. Felix ,  Chi-Chun Liu ,  Yann A.M. Mignot ,  Stuart A. Sieg

IPC: H01L21/308 ,  H01L21/3065 ,  H01L29/66

CPC classification number: H01L21/3088 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L29/66795

Abstract: A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern has hardmask fins of three mutually selectively etchable compositions. A region on the three-color hardmask fin pattern is masked, leaving one or more fins of a first color exposed. All exposed fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color. The mask and all fins of a second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color.

公开(公告)号：US20200066577A1

公开(公告)日：2020-02-27

申请号：US16667156

申请日：2019-10-29

Applicant: International Business Machines Corporation

Inventor： Yann A.M. Mignot ,  Chih-Chao Yang

IPC: H01L21/768 ,  H01L21/02

Abstract: A semiconductor structure includes a multilayer structure having a first layer and a second layer disposed on the first layer. The semiconductor structure further includes at least a first via extending from a top of the second layer to a top of a first metal contact disposed in the first layer. A polymer film is disposed on at least a portion of sidewalls of the first via.

公开(公告)号：US20180005874A1

公开(公告)日：2018-01-04

申请号：US15198075

申请日：2016-06-30

Applicant: International Business Machines Corporation

Inventor： Yann A.M. Mignot ,  Chih-Chao Yang

IPC: H01L21/768 ,  H01L21/02 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L21/76814 ,  H01L21/02063 ,  H01L21/76811 ,  H01L21/76816 ,  H01L21/76831 ,  H01L23/5226 ,  H01L23/53295

Abstract: A method includes forming at least a first via in a multilayer structure comprising a first layer and a second layer formed over the first layer, the first via extending from a top of the second layer to a top of a first contact formed in the first layer and forming a polymer film on at least a portion of sidewalls of the first via by etching the top of the first contact using a cleaning process.

公开(公告)号：US20170352585A1

公开(公告)日：2017-12-07

申请号：US15172265

申请日：2016-06-03

Applicant: International Business Machines Corporation

Inventor： Sean D. Burns ,  Lawrence A. Clevenger ,  Matthew E. Colburn ,  Sivananda K. Kanakasabapathy ,  Yann A.M. Mignot ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC: H01L21/768 ,  H01L23/522 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  H01L23/528

CPC classification number: H01L21/76816 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02697 ,  H01L21/027 ,  H01L21/0338 ,  H01L21/31116 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76892 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53266

Abstract: An interconnect structure having a pitch of less than 40 nanometers and a self-aligned quadruple patterning process for forming the interconnect structure includes three types of lines: a β line defined by a patterned bottom mandrel formed in the self-aligned quadruple patterning process; a γ line defined by location underneath a top mandrel formed in the self-aligned quadruple patterning process; and an α line defined by elimination located underneath neither the top mandrel or the bottom mandrel formed in the self-aligned quadruple patterning process. The interconnect structure further includes multi-track jogs selected from a group consisting of a βγβ jog; a βαβ jog; an αβγ jog; a γβα jog, and combinations thereof. The first and third positions refer to the uncut line and the second position refers to the cut line in the self-aligned quadruple patterning process.

公开(公告)号：US20190333774A1

公开(公告)日：2019-10-31

申请号：US16508691

申请日：2019-07-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Sean D. Burns ,  Nelson M. Felix ,  Chi-Chun Liu ,  Yann A.M. Mignot ,  Stuart A. Sieg

IPC: H01L21/308 ,  H01L29/66 ,  H01L21/3065 ,  H01L21/8234 ,  H01L21/033

Abstract: A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern includes hardmask fins of three mutually selectively etchable compositions. Some of the fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color and that leaves at least one fin of the first color behind. The fins of the second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color.

公开(公告)号：US20180233403A1

公开(公告)日：2018-08-16

申请号：US15949325

申请日：2018-04-10

Applicant: International Business Machines Corporation

Inventor： Sean D. Burns ,  Lawrence A. Clevenger ,  Matthew E. Colburn ,  Sivananda K. Kanakasabapathy ,  Yann A.M. Mignot ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC: H01L21/768 ,  H01L23/528 ,  H01L21/02 ,  H01L23/522 ,  H01L23/532 ,  H01L21/311 ,  H01L21/027 ,  H01L21/033

CPC classification number: H01L21/76816 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02697 ,  H01L21/027 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31116 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76892 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53266

Abstract: An interconnect structure having a pitch of less than 40 nanometers and a self-aligned quadruple patterning process for forming the interconnect structure includes three types of lines: a β line defined by a patterned bottom mandrel formed in the self-aligned quadruple patterning process; a γ line defined by location underneath a top mandrel formed in the self-aligned quadruple patterning process; and an α line defined by elimination located underneath neither the top mandrel or the bottom mandrel formed in the self-aligned quadruple patterning process. The interconnect structure further includes multi-track jogs selected from a group consisting of a βγβ jog; a βαβ jog; and αβγ jog; a γβα jog, and combinations thereof. The first and third positions refer to the uncut line and the second position refers to the cut line in the self-aligned quadruple patterning process.

公开(公告)号：US20180350896A1

公开(公告)日：2018-12-06

申请号：US16052161

申请日：2018-08-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kisup Chung ,  Isabel C. Estrada-Raygoza ,  Hemanth Jagannathan ,  Chi-Chun Liu ,  Yann A.M. Mignot ,  Hao Tang

IPC: H01L49/02

CPC classification number: H01L28/60

Abstract: Capacitors include a stack that has a first metallic layer formed over a substrate with at least one high domain and at least one low domain, an insulator formed over the first metallic layer, and a second metallic layer formed over the insulator. A bottom contact is formed in the substrate having a top surface that is even with a top surface of the substrate in the at least one high domain. A cap layer is formed directly on the substrate in the high domains, under the stack.

公开(公告)号：US20180350600A1

公开(公告)日：2018-12-06

申请号：US16058088

申请日：2018-08-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John C. Arnold ,  Anuja E. DeSilva ,  Nelson M. Felix ,  Chi-Chun Liu ,  Yann A.M. Mignot ,  Stuart A. Sieg

IPC: H01L21/033 ,  H01L21/308 ,  H01L29/66 ,  H01L21/311 ,  H01L21/3213

Abstract: Methods of forming fins include masking a region on a three-color hardmask fin pattern, leaving a fin of a first color exposed. The exposed fin of the first color is etched away with a selective etch that does not remove fins of a second color or a third color. The mask and all fins of a second color are etched away. Fins are etched into a fin base layer using the fins of the first color and the fins of the third color.