公开(公告)号：US20200090985A1

公开(公告)日：2020-03-19

申请号：US16693668

申请日：2019-11-25

申请人： International Business Machines Corporation

发明人： Sean D. Burns ,  Lawrence A. Clevenger ,  Nelson M. Felix ,  Sivananda K. Kanakasabapathy ,  Christopher J. Penny ,  Nicole Saulnier

IPC分类号： H01L21/768 ,  H01L23/528

摘要： A method of forming a self-aligned pattern of vias in a semiconductor device comprises forming a first layer of mandrels, then forming a second layer of mandrels orthogonal to the first layer of mandrels. The layout of the first and second layers of mandrels defines a pattern that can be used to create vias in a semiconductor material. Other embodiments are also described.

公开(公告)号：US10361079B2

公开(公告)日：2019-07-23

申请号：US15810463

申请日：2017-11-13

申请人： International Business Machines Corporation

发明人： Marc A. Bergendahl ,  Sean D. Burns ,  Lawrence A. Clevenger ,  Christopher J. Penny ,  Michael Rizzolo

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/3115

摘要： Multi-angled deposition and masking techniques are provided to enable custom trimming and selective removal of spacers that are used for patterning features at sub-lithographic dimensions. For example, a method includes forming a sacrificial mandrel on a substrate, and forming first and second spacers on opposing sidewalls of the sacrificial mandrel. The first and second spacers are formed with an initial thickness TS. A first angle deposition process is performed to deposit a material (e.g., insulating material or metallic material) at a first deposition angle A1 to form a first trim mask layer on an upper portion of the first spacer and the sacrificial mandrel while preventing the material from being deposited on the second spacer. A spacer etch process is performed to trim the first spacer to a first thickness T1, which is less than TS, using the first trim mask layer as an etch mask.

公开(公告)号：US20180247825A1

公开(公告)日：2018-08-30

申请号：US15802634

申请日：2017-11-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Sean D. Burns ,  Nelson M. Felix ,  Chi-Chun Liu ,  Yann A.M. Mignot ,  Stuart A. Sieg

IPC分类号： H01L21/308 ,  H01L29/66 ,  H01L21/3065

CPC分类号： H01L21/3088 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/823431 ,  H01L29/66795

摘要： A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern has hardmask fins of three mutually selectively etchable compositions. A region on the three-color hardmask fin pattern is masked, leaving one or more fins of a first color exposed. All exposed fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color. The mask and all fins of a second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color.

公开(公告)号：US10056290B2

公开(公告)日：2018-08-21

申请号：US15198827

申请日：2016-06-30

申请人： International Business Machines Corporation

发明人： Sean D. Burns ,  Lawrence A. Clevenger ,  Nelson M. Felix ,  Sivananda K. Kanakasabapathy ,  Christopher J. Penny ,  Nicole Saulnier

IPC分类号： H01L21/4763 ,  H01L23/48 ,  H01L23/52 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522

CPC分类号： H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528

摘要： A method of forming a self-aligned pattern of vias in a semiconductor device comprises forming a first layer of mandrels, then forming a second layer of mandrels orthogonal to the first layer of mandrels. The layout of the first and second layers of mandrels defines a pattern that can be used to create vias in a semiconductor material. Other embodiments are also described.

公开(公告)号：US20180197738A1

公开(公告)日：2018-07-12

申请号：US15786090

申请日：2017-10-17

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Sean D. Burns ,  Lawrence A. Clevenger ,  Matthew E. Colburn ,  Nelson M. Felix ,  Sivananda K. Kanakasabapathy ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC分类号： H01L21/033 ,  H01L21/768 ,  H01L23/528 ,  H01L21/311 ,  H01L45/00 ,  H01L21/027 ,  H01L21/31 ,  H01L21/28 ,  H01L51/00

CPC分类号： H01L21/0337 ,  H01L21/0274 ,  H01L21/28123 ,  H01L21/31 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76897 ,  H01L23/528 ,  H01L45/1675 ,  H01L51/0018 ,  H01L2224/0362 ,  H01L2224/11622

摘要： A method of forming a structure for etch masking that includes forming first dielectric spacers on sidewalls of a plurality of mandrel structures and forming non-mandrel structures in space between adjacent first dielectric spacers. Second dielectric spacers are formed on sidewalls of an etch mask having a window that exposes a connecting portion of a centralized first dielectric spacer. The connecting portion of the centralized first dielectric spacer is removed. The mandrel structures and non-mandrel structures are removed selectively to the first dielectric spacers to provide an etch mask. The connecting portion removed from the centralized first dielectric spacer provides an opening connecting a first trench corresponding to the mandrel structures and a second trench corresponding to the non-mandrel structures.

公开(公告)号：US09991156B2

公开(公告)日：2018-06-05

申请号：US15172265

申请日：2016-06-03

申请人： International Business Machines Corporation

发明人： Sean D. Burns ,  Lawrence A. Clevenger ,  Matthew E. Colburn ,  Sivananda K. Kanakasabapathy ,  Yann A. M. Mignot ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/76816 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02697 ,  H01L21/027 ,  H01L21/0338 ,  H01L21/31116 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76892 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53266

摘要： An interconnect structure having a pitch of less than 40 nanometers and a self-aligned quadruple patterning process for forming the interconnect structure includes three types of lines: a β line defined by a patterned bottom mandrel formed in the self-aligned quadruple patterning process; a γ line defined by location underneath a top mandrel formed in the self-aligned quadruple patterning process; and an α line defined by elimination located underneath neither the top mandrel or the bottom mandrel formed in the self-aligned quadruple patterning process. The interconnect structure further includes multi-track jogs selected from a group consisting of a βγβ jog; a βαβ jog; an αβγ jog; a γβα jog, and combinations thereof. The first and third positions refer to the uncut line and the second position refers to the cut line in the self-aligned quadruple patterning process.

公开(公告)号：US20170358487A1

公开(公告)日：2017-12-14

申请号：US15677447

申请日：2017-08-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Sean D. Burns ,  Lawrence A. Clevenger ,  Anuja E. DeSilva ,  Nelson M. Felix ,  Sivananda K. Kanakasabapathy ,  Yann A. M. Mignot ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC分类号： H01L21/768 ,  H01L23/528

CPC分类号： H01L21/76877 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76829 ,  H01L21/76843 ,  H01L21/76897 ,  H01L23/528

摘要： A method for forming conductive lines on a wafer comprises forming a first hardmask, a planarizing layer, a second hardmask, a layer of sacrificial mandrel material on the second hardmask, and patterning a mask on the layer of sacrificial material. A first sacrificial mandrel and a second sacrificial mandrel and a gap are formed. A layer of spacer material is deposited in the gap. Portions of the first sacrificial mandrel and the second sacrificial mandrel are removed, and exposed portions of the second hardmask, the planarizing layer and the first hardmask are removed to expose portions of the insulator layer. The second hardmask, the spacers, and the planarizing layer are removed. Exposed portions of the insulator layer are removed to form a trench in the insulator layer, and the trench is filled with a conductive material.

公开(公告)号：US10957583B2

公开(公告)日：2021-03-23

申请号：US16553342

申请日：2019-08-28

申请人： International Business Machines Corporation

发明人： Sean D. Burns ,  Lawrence A. Clevenger ,  Matthew E. Colburn ,  Sivananda K. Kanakasabapathy ,  Yann A. M. Mignot ,  Christopher J. Penny ,  Roger A. Quon ,  Nicole A. Saulnier

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L21/033 ,  H01L21/027

摘要： An interconnect structure having a pitch of less than 40 nanometers and a self-aligned quadruple patterning process for forming the interconnect structure includes three types of lines: a β line defined by a patterned bottom mandrel formed in the self-aligned quadruple patterning process; a γ line defined by location underneath a top mandrel formed in the self-aligned quadruple patterning process; and an α line defined by elimination located underneath neither the top mandrel or the bottom mandrel formed in the self-aligned quadruple patterning process. The interconnect structure further includes multi-track jogs selected from a group consisting of a βγβ jog; a βαβ jog; an αβγ jog; a γβα jog, and combinations thereof. The first and third positions refer to the uncut line and the second position refers to the cut line in the self-aligned quadruple patterning process.

公开(公告)号：US10559467B2

公开(公告)日：2020-02-11

申请号：US16001426

申请日：2018-06-06

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： John Christopher Arnold ,  Sean D. Burns ,  Yann Alain Marcel Mignot ,  Yongan Xu

IPC分类号： H01L21/02 ,  H01L21/027 ,  H01L21/033 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31 ,  H01L21/311 ,  H01L21/768

摘要： Selective gas etching for self-aligned pattern transfer uses a first block and a separate second block formed in a sacrificial layer to transfer critical dimensions to a desired final layer using a selective gas etching process. The first block is a first hardmask material that can be plasma etched using a first gas, and the second block is a second hardmask material that can be plasma etched using a second gas separate from the first gas. The first hardmask material is not plasma etched using the second gas, and the second hardmask material is not plasma etched using the first gas.

公开(公告)号：US10312103B2

公开(公告)日：2019-06-04

申请号：US15445112

申请日：2017-02-28

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Sean D. Burns ,  Nelson M. Felix ,  Chi-Chun Liu ,  Yann A. M. Mignot ,  Stuart A. Sieg

IPC分类号： H01L21/308 ,  H01L21/3065 ,  H01L29/66

摘要： A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern has hardmask fins of three mutually selectively etchable compositions. A region on the three-color hardmask fin pattern is masked, leaving one or more fins of a first color exposed. All exposed fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color. The mask and all fins of a second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color.