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1.发明授权Stencil device for accurately applying solder paste to a printed circuit board 失效模板装置，用于将印刷电路板精确地焊接到印刷电路板上公开(公告)号：US07412923B2
公开(公告)日：2008-08-19
申请号：US10654066
申请日：2003-09-03
IPC分类号： B05C17/06
CPC分类号： H05K3/3484 , H01R31/08 , H05K1/0293 , H05K3/1216 , H05K2201/0305 , H05K2203/043 , H05K2203/173
摘要： A stencil device ensures that solder paste is accurately applied to a printed circuit board to create a substantially zero signal degradation solder bridge electrical connection. The printed circuit board is defined by a dielectric structure core having a first surface which further includes a first conducting pad having an edge and a second conducting edge having an edge separated from and adjacent to the edge of the first conducting pad. The edges of the first and second conducting pads define therebetween a surface area of the first surface. The stencil device includes a stencil plate member defining a first opening sized to substantially correspond to the first conducting pad, a second opening sized to substantially correspond to the second conducting pad, and a third opening. The third opening links the first opening to the second opening at a size to correspond to a partial portion of the surface area of the first surface between the edges of the first and second conducting pads. The stencil device ensures that solder paste flows through the first, second, and third openings onto the first and second conducting pads and the first surface of the dielectric structure core to form a substantially zero signal degradation electrical connection between the first and second conducting pads.
摘要翻译： 模板装置确保焊膏精确地施加到印刷电路板上以产生基本为零的信号劣化焊接桥电连接。 印刷电路板由具有第一表面的电介质结构芯限定，该第一表面还包括具有边缘的第一导电焊盘和具有与第一导电焊盘的边缘分离并与其相邻的边缘的第二导电边缘。 第一和第二导电垫的边缘在其间界定第一表面的表面积。 模板装置包括模板板构件，其限定尺寸适于基本上对应于第一导电垫的第一开口，尺寸设定为基本对应于第二导电垫的第二开口和第三开口。 第三开口以与第一和第二导电焊盘的边缘之间的第一表面的表面积的部分部分相对应的尺寸将第一开口连接到第二开口。 模板装置确保焊膏通过第一，第二和第三开口流动到第一和第二导电焊盘和介电结构芯的第一表面上，以在第一和第二导电焊盘之间形成基本为零的信号劣化电连接。
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2.发明授权Method of fabricating a substantially zero signal degradation electrical connection on a printed circuit broad 失效在印刷电路板上制造基本为零的信号劣化电连接的方法公开(公告)号：US07140531B2
公开(公告)日：2006-11-28
申请号：US10654177
申请日：2003-09-03
IPC分类号： B23K31/02
CPC分类号： H05K1/0293 , H05K3/3484 , H05K2201/0305 , H05K2203/173 , Y10T29/49126 , Y10T29/49128
摘要： A method of fabricating a substantially zero signal degradation electrical connection on a printed circuit board includes providing a printed circuit board defined by a dielectric structure core. The dielectric structure core has a first surface, which includes a first connecting pad having an edge and a second connecting pad having an edge separated from an adjacent to the edge of the first conducting pad. The edges of the first and second conducting pads define therebetween a surface area of the first surface. A solder paste is applied on the first and second conducting pads and on the first surface of the dielectric structure core. The solder paste at least partially covers the surface area of the first surface between the edges of the first and second conducting pads, thereby forming a substantially zero signal degradation electrical connection between the first and second conducting pads.
摘要翻译： 在印刷电路板上制造基本上零信号劣化电连接的方法包括提供由电介质结构芯限定的印刷电路板。 电介质结构芯具有第一表面，其包括具有边缘的第一连接焊盘和具有与邻近第一导电焊盘的边缘分离的边缘的第二连接焊盘。 第一和第二导电垫的边缘在其间界定第一表面的表面积。 在第一和第二导电焊盘和介电结构芯的第一表面上施加焊膏。 焊膏至少部分地覆盖第一和第二导电焊盘的边缘之间的第一表面的表面积，从而在第一和第二导电焊盘之间形成基本为零的信号劣化电连接。
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3.发明授权Printed circuit board having solder bridges for electronically connecting conducting pads and method of fabricating solder bridges 失效具有用于电连接导电焊盘的焊接桥的印刷电路板和制造焊接桥的方法公开(公告)号：US06664482B1
公开(公告)日：2003-12-16
申请号：US09561591
申请日：2000-05-01
IPC分类号： H05K111
CPC分类号： H05K3/3484 , H01R31/08 , H05K1/0293 , H05K3/1216 , H05K2201/0305 , H05K2203/043 , H05K2203/173
摘要： A method of fabricating a zero signal degradation solder bridge electrical connection for connecting adjacent conducting pads of a printed circuit board, and a printed circuit board having at least one of these solder bridge electrical connections. In the method, a stencil, having an opening that corresponds to the adjacent conducting pads and at least a portion of the surface area of the printed circuit board between the adjacent conducting pads, is placed on the surface of printed circuit board. Solder paste is then applied to the stencil such that the solder paste flows through the stencil opening and onto the adjacent conducting pads and at least a portion of the surface area of the printed circuit board between the pads. The stencil is then removed and the printed circuit board is subjected to reflow soldering, thereby fabricating a printed circuit board having a solder bridge electrical connector between adjacent conducting pads.
摘要翻译： 一种制造用于连接印刷电路板的相邻导电焊盘的零信号劣化焊桥电连接的方法以及具有这些焊桥电连接中的至少一个的印刷电路板。 在该方法中，将具有对应于相邻导电焊盘的开口和相邻导电焊盘之间的印刷电路板的表面区域的至少一部分的模板放置在印刷电路板的表面上。 然后将焊膏施加到模板上，使得焊膏流过模板开口并且流到衬垫之间的相邻导电焊盘和印刷电路板的表面区域的至少一部分。 然后去除模版，并且对印刷电路板进行回流焊接，从而制造在相邻导电焊盘之间具有焊料桥电连接器的印刷电路板。
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公开(公告)号：US06460170B1
公开(公告)日：2002-10-01
申请号：US09561808
申请日：2000-04-29
申请人： Ian P. Shaeffer , Everett Basham
发明人： Ian P. Shaeffer , Everett Basham
IPC分类号： G06F1750
CPC分类号： H05K7/1061 , H01R12/52 , H05K3/3436 , H05K3/368 , H05K2201/0949 , H05K2201/09509 , H05K2201/09536 , H05K2201/10378
摘要： A system and method is described for providing a robust mechanical and electrical connection between two or more circuit boards which may be employed for diagnostic purposes and/or for permanent connections. A spacer block, connection block, or pedestal, preferably made of PCB type material is preferably disposed between two PCBs. The pedestal is preferably dimensioned to space the two PCBs far enough apart that the surface mount components on two boards connected employing the inventive pedestal do not interfere with one another. The pedestal preferably provides for ample signal density and signal quality because of the block thickness and availability of insulation within the pedestal.
摘要翻译： 描述了一种用于在两个或更多个电路板之间提供坚固的机械和电连接的系统和方法，其可用于诊断目的和/或用于永久连接。 优选地由PCB型材料制成的间隔块，连接块或基座设置在两个PCB之间。 基座的尺寸优选地将两个PCB间隔得足够远，使得使用本发明基座连接的两个板上的表面安装部件不会彼此干涉。 基座优选地提供足够的信号密度和信号质量，因为基座中的块体厚度和绝缘的可用性。
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公开(公告)号：US06571357B1
公开(公告)日：2003-05-27
申请号：US09563006
申请日：2000-04-29
IPC分类号： H02H305
CPC分类号： G06F11/261
摘要： The application discloses a system and method for providing a compact and high speed mechanism for emulating an ASIC or other chip operating within a large computing system environment for diagnostic purposes. A two step process is disclosed for generating data patterns for fully exercising a chip and to then transmit these data patterns at a high frequency to a system under test. In phase one, a pattern generator preferably transmits test pattern data at a first frequency to a memory storage device. In phase two, the memory storage device is enabled to transmit the stored test pattern data at a high frequency to a system under test. Buffering the test pattern data in this manner enables the inventive system to bypass the data transmission speed limitation of the pattern generator while still employing the test patterns created by the pattern generator and to thereby test the system under test under high speed operating conditions.
摘要翻译： 本申请公开了一种系统和方法，用于提供用于仿真用于诊断目的的大型计算系统环境中运行的ASIC或其他芯片的紧凑且高速的机制。 公开了一种用于产生用于完全运动芯片并且然后以高频将这些数据模式传送到被测系统的数据模式的两步过程。 在第一阶段中，图案生成器优选地将测试图案数据以第一频率发送到存储器存储设备。 在第二阶段中，存储器存储装置能够将存储的测试模式数据以高频率发送到被测系统。 以这种方式缓冲测试图案数据使得本发明的系统能够绕过图案发生器的数据传输速度限制，同时仍然采用由图案发生器产生的测试图案，从而在高速运行条件下测试被测系统。
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6.发明申请Printed circuit board having solder bridges for electronically connecting conducting pads and method of fabricating solder bridges 失效具有用于电连接导电焊盘的焊接桥的印刷电路板和制造焊接桥的方法公开(公告)号：US20050044702A1
公开(公告)日：2005-03-03
申请号：US10654177
申请日：2003-09-03
申请人： Ian Shaeffer , Everett Basham , Christopher Price
发明人： Ian Shaeffer , Everett Basham , Christopher Price
CPC分类号： H05K1/0293 , H05K3/3484 , H05K2201/0305 , H05K2203/173 , Y10T29/49126 , Y10T29/49128
摘要： A method of fabricating a substantially zero signal degradation electrical connection on a printed circuit board includes providing a printed circuit board defined by a dielectric structure core. The dielectric structure core has a first surface, which includes a first connecting pad having an edge and a second connecting pad having an edge separated from an adjacent to the edge of the first conducting pad. The edges of the first and second conducting pads define therebetween a surface area of the first surface. A solder paste is applied on the first and second conducting pads and on the first surface of the dielectric structure core. The solder paste at least partially covers the surface area of the first surface between the edges of the first and second conducting pads, thereby forming a substantially zero signal degradation electrical connection between the first and second conducting pads.
摘要翻译： 在印刷电路板上制造基本上零信号劣化电连接的方法包括提供由电介质结构芯限定的印刷电路板。 电介质结构芯具有第一表面，其包括具有边缘的第一连接焊盘和具有与邻近第一导电焊盘的边缘分离的边缘的第二连接焊盘。 第一和第二导电垫的边缘在其间界定第一表面的表面积。 在第一和第二导电焊盘和介电结构芯的第一表面上施加焊膏。 焊膏至少部分地覆盖第一和第二导电焊盘的边缘之间的第一表面的表面积，从而在第一和第二导电焊盘之间形成基本为零的信号劣化电连接。
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