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公开(公告)号:US20230360989A1
公开(公告)日:2023-11-09
申请号:US17737486
申请日:2022-05-05
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Hans Hartung
CPC classification number: H01L23/3142 , H01L23/34 , H01L23/3121 , H01L23/298 , H01L21/56 , H01L25/072
Abstract: A semiconductor module includes a power electronics carrier including a metallization layer disposed on an electrically insulating substrate, a power semiconductor die mounted on the power electronics carrier, a housing that surrounds an interior volume over the power electronics carrier, a volume of electrically insulating encapsulant that fills the interior volume and encapsulates the power semiconductor die, and a pressure compensation element disposed on or within the electrically insulating encapsulant, wherein the electrically insulating encapsulant is a liquid, wherein the semiconductor module forms an impermeable seal that contains the volume of electrically insulating encapsulant, and wherein the pressure compensation element is configured to maintain the electrically insulating encapsulant at a substantially constant pressure during thermal expansion and thermal contraction of the electrically insulating encapsulant.
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公开(公告)号:US11318688B2
公开(公告)日:2022-05-03
申请号:US16803201
申请日:2020-02-27
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Olga Simon
Abstract: A method for joining at least two joining partners includes performing a plurality of ultrasonic joining operations in direct succession, wherein performing an individual ultrasonic joining operation includes, with a second joining tool, applying pressure to a second joining partner arranged adjacent to a first joining partner, thereby pressing the second joining partner against the first joining partner, and, with the second joining tool, applying high-frequency ultrasonic vibrations to the joining partners. The method further includes, during at least one intermediate time interval between two directly successive ultrasonic joining operations, at least one of actively cooling and heating the second joining tool.
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公开(公告)号:US12218018B2
公开(公告)日:2025-02-04
申请号:US17726045
申请日:2022-04-21
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Hans Hartung
IPC: H01L23/26 , H01L21/56 , H01L23/00 , H01L23/053 , H01L23/16 , H01L23/24 , H01L23/29 , H01L23/31 , H01L23/373 , H01L23/498 , H01L25/07
Abstract: A semiconductor module includes a power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, a power semiconductor die mounted on the power electronics carrier, a housing that surrounds an interior volume over the power electronics carrier, a reinforcing structure contained within the interior volume and including a textured surface that is accessible by fluid, a volume of curable encapsulant disposed within the interior volume and encapsulating the power semiconductor die, wherein the reinforcing structure is embedded within the volume of curable encapsulant such that the textured surface adheres to the encapsulant, and wherein the reinforcing structure has a tensile strength that is greater than a tensile strength of the curable encapsulant.
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公开(公告)号:US20240413025A1
公开(公告)日:2024-12-12
申请号:US18732716
申请日:2024-06-04
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Anita Herzer , Fabian Jäger , Markus Wiesemann
IPC: H01L23/10 , H01L21/48 , H01L21/56 , H01L23/053 , H01L23/31 , H01L23/373
Abstract: A method includes applying a first material to a first surface, the first material including a matrix material and an adhesion promoter. The matrix material is configured to cure when heated to a defined temperature for a defined period of time. The adhesion promoter is configured to be activated when heated to a temperature that is higher than the defined temperature and/or for a period of time that is longer than the defined period of time. The method further includes heating the first material to the defined temperature for the defined period of time such that the matrix material cures and the adhesion promoter remains inactive, thereby forming a pre-seal.
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公开(公告)号:US20200282663A1
公开(公告)日:2020-09-10
申请号:US16803201
申请日:2020-02-27
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Olga Simon
Abstract: A method for joining at least two joining partners includes performing a plurality of ultrasonic joining operations in direct succession, wherein performing an individual ultrasonic joining operation includes, with a second joining tool, applying pressure to a second joining partner arranged adjacent to a first joining partner, thereby pressing the second joining partner against the first joining partner, and, with the second joining tool, applying high-frequency ultrasonic vibrations to the joining partners. The method further includes, during at least one intermediate time interval between two directly successive ultrasonic joining operations, at least one of actively cooling and heating the second joining tool.
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公开(公告)号:US20250062175A1
公开(公告)日:2025-02-20
申请号:US18802475
申请日:2024-08-13
Applicant: Infineon Technologies AG
Inventor: Charles Rimbert-Riviere , Georg Troska , Lydia Lottspeich , Martin Goldammer , Ulrich Wilke , Benedikt Domes , Lars Böwer
Abstract: A method for producing a substrate for a semiconductor module includes: forming a first electrically conductive layer on a first side of a dielectric insulation layer; structuring the first electrically conductive layer by creating one or more incisions through the first electrically conductive layer that extend from an upper surface of the first electrically conductive layer down to the dielectric insulation layer, thereby completely separating different sections of the first electrically conductive layer; and forming a passivation layer covering the entire upper surface of the structured first electrically conductive layer.
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公开(公告)号:US20250014952A1
公开(公告)日:2025-01-09
申请号:US18762949
申请日:2024-07-03
Applicant: Infineon Technologies AG
Inventor: Georg Troska
IPC: H01L23/08 , H01L21/48 , H01L23/00 , H01L23/057 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/065
Abstract: A housing for a power semiconductor module arrangement includes sidewalls and a top. The top includes a first layer of a first material having a plurality of openings, and a second layer of a second material that is different from the first material. The second material has a comparative tracking index (CTI) that is higher than a comparative tracking index of the first material. The second layer partly covers at least one of a bottom surface of the first layer and a top surface of the first layer, and/or the first layer includes at least one gap sealed by a section of the second layer such that the second layer forms at least one section of the housing.
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公开(公告)号:US20230343661A1
公开(公告)日:2023-10-26
申请号:US17726045
申请日:2022-04-21
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Hans Hartung
CPC classification number: H01L23/26 , H01L21/56 , H01L23/296 , H01L23/3121
Abstract: A semiconductor module includes a power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, a power semiconductor die mounted on the power electronics carrier, a housing that surrounds an interior volume over the power electronics carrier, a reinforcing structure contained within the interior volume and including a textured surface that is accessible by fluid, a volume of curable encapsulant disposed within the interior volume and encapsulating the power semiconductor die, wherein the reinforcing structure is embedded within the volume of curable encapsulant such that the textured surface adheres to the encapsulant, and wherein the reinforcing structure has a tensile strength that is greater than a tensile strength of the curable encapsulant.
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公开(公告)号:US20220194023A1
公开(公告)日:2022-06-23
申请号:US17691255
申请日:2022-03-10
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Olga Simon
Abstract: A method for joining at least two joining partners includes performing a plurality of ultrasonic joining operations in direct succession, wherein performing an individual ultrasonic joining operation includes, with a second joining tool, applying pressure to a second joining partner arranged adjacent to a first joining partner, thereby pressing the second joining partner against the first joining partner, and, with the second joining tool, applying high-frequency ultrasonic vibrations to the joining partners. The method further includes, during at least one intermediate time interval between two directly successive ultrasonic joining operations, at least one of actively cooling and heating the second joining tool. The second joining tool is heated or cooled by a temperature unit. The temperature unit is inactive during each of the plurality of ultrasonic joining operations.
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公开(公告)号:US11211307B2
公开(公告)日:2021-12-28
申请号:US16671541
申请日:2019-11-01
Applicant: Infineon Technologies AG
Inventor: Georg Troska , Hans Hartung , Marianna Nomann
IPC: H01L23/373 , H01L23/15 , H01L25/07 , H01L23/498
Abstract: A semiconductor substrate includes a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer. The dielectric insulation layer includes a first material having a thermal conductivity of between 25 and 180 W/mK, and an insulation strength of between 15 and 50 kV/mm, and an electrically conducting or semiconducting second material evenly distributed within the first material.
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