公开(公告)号：US20230082571A1

公开(公告)日：2023-03-16

申请号：US17945494

申请日：2022-09-15

Applicant: Infineon Technologies AG

Inventor： Jochen HILSENBECK ,  Thomas SOELLRADL ,  Roman ROTH ,  Annette SAENGER ,  Ulrike FASTNER ,  Johanna SCHLAMINGER ,  Joachim HIRSCHLER ,  Andreas BEHRENDT

IPC: H01L23/00 ,  H01L23/31

Abstract: A power semiconductor device includes a semiconductor body and a first terminal at the semiconductor body. The first terminal has a first side for adjoining an encapsulation and a second side for adjoining the semiconductor body. The first terminal includes, at the first side, a top layer; and, at the second side, a base layer coupled with the top layer, wherein a sidewall of the top layer and/or a sidewall of the base layer is arranged in an angle smaller than 85° with respect to a plane.

公开(公告)号：US20230317542A1

公开(公告)日：2023-10-05

申请号：US18128506

申请日：2023-03-30

Applicant: Infineon Technologies AG

Inventor： Jochen HILSENBECK ,  Thomas SÖLLRADL ,  Roman ROTH ,  Richard GAISBERGER ,  Sophia OLES ,  Helmut Heinrich SCHOENHERR ,  Juergen STEINBRENNER

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/3192 ,  H01L23/3171 ,  H01L24/05 ,  H01L21/56 ,  H01L2224/05567 ,  H01L23/291

Abstract: A semiconductor device is proposed. The semiconductor device includes a contact pad structure over a first surface of a semiconductor body. The semiconductor device further includes a dielectric structure lining a sidewall and a boundary area on a top surface of the contact pad structure, wherein the dielectric structure includes a dielectric spacer at the sidewall of the contact pad structure.

公开(公告)号：US20160155714A1

公开(公告)日：2016-06-02

申请号：US14555736

申请日：2014-11-28

Applicant: Infineon Technologies AG

Inventor： Jochen HILSENBECK ,  Jens Peter KONRATH ,  Thomas FRANK ,  Roland RUPP

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L24/05 ,  H01L23/3121 ,  H01L23/585 ,  H01L24/03 ,  H01L24/06 ,  H01L29/0615 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/417 ,  H01L29/4238 ,  H01L29/43 ,  H01L29/7392 ,  H01L29/7396 ,  H01L29/74 ,  H01L29/7802 ,  H01L29/8083 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05558 ,  H01L2224/05623 ,  H01L2224/05624 ,  H01L2224/06181 ,  H01L2224/45124 ,  H01L2924/01014 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/0105 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/12031 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/141 ,  H01L2924/1421 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1435 ,  H01L2924/1436 ,  H01L2924/1461 ,  H01L2924/3512

Abstract: According to various embodiments, a semiconductor device may include: a layer stack formed at a surface of the semiconductor device, the layer stack including: a metallization layer including a first metal or metal alloy; a protection layer covering the metallization layer, the protection layer including a second metal or metal alloy, wherein the second metal or metal alloy is less noble than the first metal or metal alloy.

Abstract translation: 根据各种实施例，半导体器件可以包括：形成在半导体器件的表面处的层堆叠，所述层堆叠包括：包括第一金属或金属合金的金属化层; 覆盖金属化层的保护层，保护层包括第二金属或金属合金，其中第二金属或金属合金比第一金属或金属合金低。