公开(公告)号：US20220199478A1

公开(公告)日：2022-06-23

申请号：US17552914

申请日：2021-12-16

Applicant: Infineon Technologies AG

Inventor： Si Hao Vincent Yeo ,  Chan Lam Cha ,  Ying Dieh Cheong ,  Chau Fatt Chiang ,  Cher Hau Danny Koh ,  Wern Ken Daryl Wee ,  Swee Kah Lee ,  Desmond Jenn Yong Loo ,  Fortunato Lopez ,  Norliza Morban ,  Khay Chwan Andrew Saw ,  Sock Chien Tey ,  Mei Yong Wang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/495

Abstract: A package includes a dielectric carrier, an electronic component mounted on the dielectric carrier, and an encapsulant encapsulating at least part of the dielectric carrier and the electronic component. Corresponding methods of manufacturing the package are also described.

公开(公告)号：US20200328140A1

公开(公告)日：2020-10-15

申请号：US16379405

申请日：2019-04-09

Applicant: Infineon Technologies AG

Inventor： Sock Chien Tey ,  Chan Lam Cha ,  Hoe Jian Chong ,  Cher Hau Danny Koh ,  Kim Guan Tan ,  Mei Yong Wang

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A packaged semiconductor device includes a carrier having a die attach surface, a semiconductor die mounted on the die attach surface and comprising first and second conductive terminals disposed on an upper side, a first clip that extends over the semiconductor die and is electrically connected to the first conductive terminal, a second clip that extends over the semiconductor die and is electrically connected to the second conductive terminal, and an electrically insulating encapsulant body that encapsulates the semiconductor die. An outer end of the first clip is exposed from the encapsulant body and provides a point of external electrical contact for the first conductive terminal. An outer end of the second clip is exposed from the same or a different side face of the encapsulant body as the first clip and provides a point of external electrical contact for the second conductive terminal.

公开(公告)号：US12300559B2

公开(公告)日：2025-05-13

申请号：US17552914

申请日：2021-12-16

Applicant: Infineon Technologies AG

Inventor： Si Hao Vincent Yeo ,  Chan Lam Cha ,  Ying Dieh Cheong ,  Chau Fatt Chiang ,  Cher Hau Danny Koh ,  Wern Ken Daryl Wee ,  Swee Kat Lee ,  Desmond Jenn Yong Loo ,  Fortunato Lopez ,  Norliza Morban ,  Khay Chwan Andrew Saw ,  Sock Chien Tey ,  Mei Yong Wang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/495

Abstract: A package includes a dielectric carrier, an electronic component mounted on the dielectric carrier, and an encapsulant encapsulating at least part of the dielectric carrier and the electronic component. Corresponding methods of manufacturing the package are also described.

公开(公告)号：US11217511B2

公开(公告)日：2022-01-04

申请号：US16379405

申请日：2019-04-09

Applicant: Infineon Technologies AG

Inventor： Sock Chien Tey ,  Chan Lam Cha ,  Hoe Jian Chong ,  Cher Hau Danny Koh ,  Kim Guan Tan ,  Mei Yong Wang

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A packaged semiconductor device includes a carrier having a die attach surface, a semiconductor die mounted on the die attach surface and comprising first and second conductive terminals disposed on an upper side, a first clip that extends over the semiconductor die and is electrically connected to the first conductive terminal, a second clip that extends over the semiconductor die and is electrically connected to the second conductive terminal, and an electrically insulating encapsulant body that encapsulates the semiconductor die. An outer end of the first clip is exposed from the encapsulant body and provides a point of external electrical contact for the first conductive terminal. An outer end of the second clip is exposed from the same or a different side face of the encapsulant body as the first clip and provides a point of external electrical contact for the second conductive terminal.

公开(公告)号：US20140339690A1

公开(公告)日：2014-11-20

申请号：US13897620

申请日：2013-05-20

Applicant: Infineon Technologies AG

Inventor： Swee Guan Chan ,  Kong Yang Leong ,  Mei Yong Wang ,  Heinrich Koerner

IPC: H01L23/00

CPC classification number: H01L24/49 ,  H01L23/3107 ,  H01L23/3142 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/49 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/206

Abstract: An integrated-circuit module includes an integrated-circuit device having a first surface and a plurality of bond pads disposed on the first surface. The module further includes metallic bond wires or metallic ribbons, which are attached between respective ones of a first subset of the bond pads and a package substrate or leadframe, such that a second subset of the bond pads are not attached to either a package substrate or leadframe. A metallic stud bump is affixed to each of one or more of the second subset of the bond pads. The integrated-circuit module further comprises a molding compound that contacts at least the first surface of the integrated-circuit device and substantially surrounds the bond wires or ribbon wires and the metallic stud bumps.

Abstract translation: 集成电路模块包括具有第一表面和设置在第一表面上的多个接合焊盘的集成电路器件。 模块还包括金属接合线或金属带，其附接在接合焊盘的第一子集中的相应的一个和封装衬底或引线框之间，使得接合焊盘的第二子集不附接到封装衬底或 引线框架 金属柱头凸块固定到接合垫的第二子集中的一个或多个中的每一个上。 集成电路模块还包括模制化合物，该模制化合物至少与集成电路器件的第一表面接触并且基本上围绕结合线或带状线以及金属柱状凸块。