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公开(公告)号：US09312594B2
公开(公告)日：2016-04-12
申请号：US13626700
申请日：2012-09-25
Applicant: Intel Corporation
Inventor： Ian Burke , Jason Cook , Ahmad Khanifar
CPC classification number: H01P11/007 , C23C18/1605 , C23C18/1653 , C23C28/021 , C23C28/023 , H01P1/208 , H01P7/06 , H01P11/008
Abstract: Embodiments provide a novel fabrication method and structure for reducing structural weight in radio frequency cavity filters and radio subsystems such as antennas and filters. The novel structures are fabricated by electroplating the required structure over a mold, housing, or substrate. The electrodeposited composite layer may be formed by several layers of metal or metal alloys with compensating thermal expansion coefficients. The first or the top layer is a high conductivity material or compound such as silver having a thickness of several times the skin-depth at the intended frequency of operation. The top layer provides the vital low loss performance and high Q-factor required for such filter structures while the subsequent compound layers provide the mechanical strength.
Abstract translation: 实施例提供了一种用于减少射频空腔滤波器和诸如天线和滤波器的无线电子系统中的结构重量的新型制造方法和结构。 通过在模具，壳体或基底上电镀所需的结构来制造新颖的结构。 电沉积复合层可以由具有补偿热膨胀系数的几层金属或金属合金形成。 第一层或顶层是在预期的操作频率下具有厚度为皮肤深度的几倍的高导电性材料或诸如银的化合物。 顶层提供了这种过滤器结构所需的重要的低损耗性能和高Q因子，而随后的复合层提供了机械强度。
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公开(公告)号：US20160006401A1
公开(公告)日：2016-01-07
申请号：US14795456
申请日：2015-07-09
Applicant: Intel Corporation
Inventor： Nikolai Maslennikov , Ahmad Khanifar
CPC classification number: H03F1/0288 , H03F1/42 , H03F3/19 , H03F3/211 , H03F2200/192 , H03F2200/408 , H03F2200/451 , H03F2203/21106
Abstract: A multi-stage Doherty power amplifier (“PA”) circuit which achieves superior efficiency over broadband range of frequencies is disclosed. Conventional multi-stage amplifiers may offer potential for efficiency enhancement but may suffer from cost penalties and severe bandwidth limitation in practice. Embodiments may employ a driver in the peaking arm which is biased in class C which may alleviate such limitations. The amplifier topology and associated circuitry described in embodiments may achieve high efficiency, smooth PA gain, and enhanced phase characteristics over a 15% fractional bandwidth with reduced costs.
Abstract translation: 公开了一种在宽频带范围内实现优越效率的多级Doherty功率放大器（“PA”）电路。 传统的多级放大器可能提供提高效率的潜力，但是在实践中可能会遭受成本惩罚和严重的带宽限制。 实施例可以采用在C级偏置的峰值臂中的驱动器，其可以减轻这种限制。 实施例中描述的放大器拓扑和相关电路可以以15％的小数带宽实现高效率，平滑的PA增益和增强的相位特性，同时降低成本。
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公开(公告)号：US20170271744A1
公开(公告)日：2017-09-21
申请号：US15421640
申请日：2017-02-01
Applicant: Intel Corporation
Inventor： Ian Burke , Jason Cook , Ahmad Khanifar
CPC classification number: H01P11/007 , C23C18/1653 , C23C18/1657 , C23C28/021 , C23C28/023 , C25D1/02 , C25D7/00 , H01P1/208 , H01P1/2138 , H01P11/008 , H01Q9/0407
Abstract: Embodiments provide a novel fabrication method and structure for reducing structural weight in radio frequency cavity filters and novel filter structure. The novel filter structure is fabricated by electroplating the required structure over a mold. The electrodeposited composite layer may be formed by several layers of metal or metal alloys with compensating thermal expansion coefficients. The first or the top layer is a high conductivity material or compound such as silver having a thickness of several times the skin-depth at the intended frequency of operation. The top layer provides the vital low loss performance and high Q-factor required for such filter structures while the subsequent compound layers provide the mechanical strength.
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公开(公告)号：US09614480B2
公开(公告)日：2017-04-04
申请号：US14795456
申请日：2015-07-09
Applicant: Intel Corporation
Inventor： Nikolai Maslennikov , Ahmad Khanifar
CPC classification number: H03F1/0288 , H03F1/42 , H03F3/19 , H03F3/211 , H03F2200/192 , H03F2200/408 , H03F2200/451 , H03F2203/21106
Abstract: A multi-stage Doherty power amplifier (“PA”) circuit which achieves superior efficiency over broadband range of frequencies is disclosed. Conventional multi-stage amplifiers may offer potential for efficiency enhancement but may suffer from cost penalties and severe bandwidth limitation in practice. Embodiments may employ a driver in the peaking arm which is biased in class C which may alleviate such limitations. The amplifier topology and associated circuitry described in embodiments may achieve high efficiency, smooth PA gain, and enhanced phase characteristics over a 15% fractional bandwidth with reduced costs.
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