公开(公告)号：US20180189154A1

公开(公告)日：2018-07-05

申请号：US15394261

申请日：2016-12-29

Applicant: INTEL CORPORATION

Inventor： FENG ZHU ,  ALIASGAR S. MADRASWALA ,  XIN GUO

IPC: G06F11/20 ,  G06F3/06 ,  G11C7/14

CPC classification number: G06F3/0659 ,  G06F3/0619 ,  G11C7/14 ,  G11C29/00 ,  G11C29/52

Abstract: Examples herein include techniques for flash page retirement following one or more defects in nonvolatile memory. In some examples, a storage controller may retire a first logical page in response to a first read error, and write data to the one or more NMV devices in a program-erase (P/E) cycle without a dummy page being programmed or generated for the retired first logical page. The storage controller may further retire a second logical page in response to a second read error, wherein the first logical page has a higher order than the second logical page in a same physical memory page.

公开(公告)号：US20160170641A1

公开(公告)日：2016-06-16

申请号：US14572581

申请日：2014-12-16

Applicant: Intel Corporation

Inventor： DAVID J. PELSTER ,  XIN GUO ,  DAVID M. JONES

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0616 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/3034 ,  G06F11/3466 ,  G06F11/3485 ,  G06F2201/81 ,  G06F2201/88

Abstract: The present disclosure is directed to gradual context saving in a data storage device. An example data storage device may comprise at least a non-volatile memory and a control module. The control module may cause context data to be gradually saved to the non-volatile memory based on monitoring write activity to the nonvolatile memory, wherein the context data may correspond to a current state of the data storage device. The control module may cause context data to be saved based on a budget ratio. For example, a budget ratio may compare an amount of total budget consumed (e.g., based a capacity of the data storage device, an amount of data stored in the data storage device, a target time-to-ready for the data storage device, etc.) to an amount of total context data that has already been written to the non-volatile memory.

Abstract translation: 本公开涉及在数据存储设备中逐渐上下文保存。 示例性数据存储设备可以包括至少一个非易失性存储器和控制模块。 控制模块可以基于监视对非易失性存储器的写入活动，使上下文数据逐渐保存到非易失性存储器，其中上下文数据可对应于数据存储设备的当前状态。 控制模块可以基于预算比率来导致上下文数据被保存。 例如，预算比可以比较所消耗的总预算量（例如，基于数据存储设备的容量，存储在数据存储设备中的数据量，数据存储设备的准备时间， 等等）到已经写入非易失性存储器的总上下文数据的量。

公开(公告)号：US20190096490A1

公开(公告)日：2019-03-28

申请号：US15717835

申请日：2017-09-27

Applicant: Intel Corporation

Inventor： ALIASGAR S. MADRASWALA ,  XIN GUO ,  DAVID B. CARLTON ,  PURVAL S. SULE

IPC: G11C16/26 ,  G11C16/10

Abstract: Embodiments include apparatuses, methods, and computer devices including a multi-level NAND memory array and a memory controller coupled to the multi-level NAND memory array. The multi-level NAND memory array may include a first word line and a second word line. The memory controller may receive a first page of data and a second page of data together with a program command to program the first page of data and the second page of data into the multi-level NAND memory array. The memory controller may program the first page of data into a page of the first word line via a first pass, and further program the second page of data into a page of the second word line via a second pass, subsequent to the first pass. Other embodiments may also be described and claimed.

公开(公告)号：US20160180958A1

公开(公告)日：2016-06-23

申请号：US14579971

申请日：2014-12-22

Applicant: Intel Corporation

Inventor： SHYAM SUNDER RAGHUNATHAN ,  IWEN CHAO ,  XIN GUO ,  PRANAV KALAVADE ,  KRISHNA K. PARAT ,  FENG ZHU

IPC: G11C16/34 ,  G11C16/26 ,  G11C16/32 ,  G11C16/14

CPC classification number: G06F12/0246 ,  G06F11/1084 ,  G06F2212/7211 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  G11C16/32 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/021 ,  G11C29/028

Abstract: Apparatus, systems, and methods to implement dynamic memory management in nonvolatile memory devices are described. In one example, a controller comprises logic to monitor at least one performance parameter of a nonvolatile memory, determine when the at least one performance parameter passes a threshold which indicates a degradation in performance for the nonvolatile memory, and in response to the at least one performance parameter passing the threshold, to modify at least one operational attribute of the nonvolatile memory. Other examples are also disclosed and claimed.

Abstract translation: 描述了在非易失性存储器件中实现动态存储器管理的装置，系统和方法。 在一个示例中，控制器包括用于监视非易失性存储器的至少一个性能参数的逻辑，确定何时至少一个性能参数通过指示非易失性存储器性能下降的阈值，以及响应于该至少一个 性能参数通过阈值，以修改非易失性存储器的至少一个操作属性。 还公开并要求保护其他实例。