公开(公告)号：US07186588B1

公开(公告)日：2007-03-06

申请号：US10871188

申请日：2004-06-18

申请人： Jaime A. Bayan ,  Santhiran S/O Nadarajah ,  Chan Chee Ling ,  Ashok S. Prabhu ,  Hasfiza Ramley ,  Chan Peng Yeen

发明人： Jaime A. Bayan ,  Santhiran S/O Nadarajah ,  Chan Chee Ling ,  Ashok S. Prabhu ,  Hasfiza Ramley ,  Chan Peng Yeen

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/83 ,  H01L21/568 ,  H01L23/4951 ,  H01L23/4952 ,  H01L23/49548 ,  H01L23/544 ,  H01L24/27 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L24/97 ,  H01L2223/54486 ,  H01L2224/274 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of fabricating a micro-array IC package is recited. A wafer has a B-stageable adhesive applied, and the wafer is diced. The individual dice are applied to a lead-frame via their adhesive, and wirebonded to associated leads. The lead-frame is then encapsulated, and solder connectors are applied. The lead-frame is then singulated to produce a plurality of lead-frame based micro-array packages. The process thus allows lead-frame based manufacturing methods to be employed in the production of BGA-type packages, allowing such packages to be produced faster and more efficiently.

摘要翻译： 列举了制造微阵列IC封装的方法。 晶片具有可施加的B级粘合剂，并且晶片被切割。 单个骰子通过其粘合剂施加到引线框架，并且引线键合到相关联的引线。 然后封装引线框架，并应用焊接连接器。 引线框架然后被分割以产生多个基于引线框架的微阵列封装。 因此，该方法允许基于引线框架的制造方法用于生产BGA型封装，从而允许更快更有效地制造这种封装。

公开(公告)号：US07064419B1

公开(公告)日：2006-06-20

申请号：US10871320

申请日：2004-06-18

申请人： Jaime A. Bayan ,  Ashok S. Prabhu ,  Chan Chee Ling ,  Lye Meng Kong ,  Santhiran S O Nadarajah

发明人： Jaime A. Bayan ,  Ashok S. Prabhu ,  Chan Chee Ling ,  Lye Meng Kong ,  Santhiran S O Nadarajah

IPC分类号： H01L23/495

CPC分类号： H01L21/561 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T428/24843 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A die attach region for use in an IC package is described. The die attach region employs a number of posts interconnected with a number of support risers to provide a structure that upholds a semiconductor die while facilitating flow of an encapsulant material underneath the die during encapsulation. The posts and risers can be arranged in a number of configurations that each facilitate flow of encapsulant material. This die attach region can be incorporated into a lead-frame structure or a substrate panel for ease and efficiency of manufacture.

摘要翻译： 描述了用于IC封装的管芯附着区域。 管芯附接区域采用与多个支撑立管互连的多个柱，以提供支撑半导体管芯的结构，同时便于在封装期间在管芯下方的密封剂材料的流动。 柱和立管可以布置成多个构造，每个构造都促进密封材料的流动。 为了便于制造和效率，该管芯附着区域可以结合到引线框架结构或基板面板中。

公开(公告)号：US07598122B1

公开(公告)日：2009-10-06

申请号：US11372481

申请日：2006-03-08

申请人： Jaime A. Bayan ,  Nghia Thuc Tu ,  Lim Fong ,  Chan Peng Yeen

发明人： Jaime A. Bayan ,  Nghia Thuc Tu ,  Lim Fong ,  Chan Peng Yeen

IPC分类号： H01L21/00

CPC分类号： H01L23/4951 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49541 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to the leadframe as a series of dots, each dot corresponding to an associated prong of the stamping tool. In some embodiments the adhesive used to attach the semiconductor die to a leadframe is a black epoxy based adhesive material. In an apparatus aspect of the invention, lead traces in a microarray leadframe are arranged to have tails that extend beyond their associated contact posts on the side of the contact post that is opposite a wire bonding region such that such lead traces extends on two opposing sides of their associated contact posts. The tails do not attach to other structures within the lead frame (such as a die attach structure). The width of at least some of these tailed lead traces in a region that overlies their associated contact post is narrower than their associated contact post. Thus, these narrowed lead traces have extensions that extend beyond their associated contact posts. The extensions provide additional surface area that gives an adhesive applied to the narrowed lead trace (as for example by stamping) room to bleed (flow) along the top surface of the lead trace on both sides of the associated contact pad.

摘要翻译： 在本发明的一个方面，描述了将半导体管芯附着到微阵列引线框架的方法。 该方法包括使用多管齐下的印模工具将粘合剂冲压到微阵列引线框架的离散区域上。 将粘合剂作为一系列点施加到引线框架，每个点对应于冲压工具的相关插脚。 在一些实施例中，用于将半导体管芯附接到引线框架的粘合剂是黑色环氧基粘合剂材料。 在本发明的装置方面，微阵列引线框架中的导线布置成具有延伸超出其在接触柱侧面的与引线接合区域相对的相关接触柱的尾部，使得这种引线迹线在两个相对侧上延伸 的相关联系人员。 尾部不附着到引线框架内的其他结构（如模具附接结构）。 覆盖在其相关联的接触柱上的区域中的这些尾部引线的至少一些的宽度比其相关联的接触柱窄。 因此，这些狭窄的引线迹线具有延伸超出其相关接触柱的延伸。 这些延伸部分提供了额外的表面积，其给出了粘合剂施加到狭窄的引线迹线（例如通过冲压）沿着引线迹线的顶表面在相关接触焊盘的两侧上的流出（流动）。

公开(公告)号：US07859090B2

公开(公告)日：2010-12-28

申请号：US12549324

申请日：2009-08-27

申请人： Jaime A. Bayan ,  Nghia Thuc Tu ,  Lim Fong ,  Chan Peng Yeen

发明人： Jaime A. Bayan ,  Nghia Thuc Tu ,  Lim Fong ,  Chan Peng Yeen

IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L23/28

CPC分类号： H01L23/4951 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49541 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to the leadframe as a series of dots, each dot corresponding to an associated prong of the stamping tool. In some embodiments the adhesive used to attach the semiconductor die to a leadframe is a black epoxy based adhesive material. In an apparatus aspect of the invention, lead traces in a microarray leadframe are arranged to have tails that extend beyond their associated contact posts on the side of the contact post that is opposite a wire bonding region such that such lead traces extends on two opposing sides of their associated contact posts. The tails do not attach to other structures within the lead frame (such as a die attach structure). The width of at least some of these tailed lead traces in a region that overlies their associated contact post is narrower than their associated contact post. Thus, these narrowed lead traces have extensions that extend beyond their associated contact posts. The extensions provide additional surface area that gives an adhesive applied to the narrowed lead trace (as for example by stamping) room to bleed (flow) along the top surface of the lead trace on both sides of the associated contact pad.

摘要翻译： 在本发明的一个方面，描述了将半导体管芯附着到微阵列引线框架的方法。 该方法包括使用多管齐下的印模工具将粘合剂冲压到微阵列引线框架的离散区域上。 将粘合剂作为一系列点施加到引线框架，每个点对应于冲压工具的相关插脚。 在一些实施例中，用于将半导体管芯附接到引线框架的粘合剂是黑色环氧基粘合剂材料。 在本发明的装置方面，微阵列引线框架中的导线布置成具有延伸超出其在接触柱侧面的与引线接合区域相对的相关接触柱的尾部，使得这种引线迹线在两个相对侧上延伸 的相关联系人员。 尾部不附着到引线框架内的其他结构（如模具附接结构）。 覆盖在其相关联的接触柱上的区域中的这些尾部引线的至少一些的宽度比其相关联的接触柱窄。 因此，这些狭窄的引线迹线具有延伸超出其相关接触柱的延伸。 这些延伸部分提供了额外的表面积，其给出了粘合剂施加到狭窄的引线迹线（例如通过冲压）沿着引线迹线的顶表面在相关接触焊盘的两侧上的流出（流动）。

公开(公告)号：US20120326287A1

公开(公告)日：2012-12-27

申请号：US13170017

申请日：2011-06-27

申请人： Rajeev Joshi ,  Jaime A. Bayan ,  Ashok S. Prabhu

发明人： Rajeev Joshi ,  Jaime A. Bayan ,  Ashok S. Prabhu

IPC分类号： H01L23/495 ,  H05K1/11 ,  H01L21/82

CPC分类号： H01L23/49575 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L24/36 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0688 ,  H01L27/088 ,  H01L2224/05554 ,  H01L2224/40091 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/1306 ,  H01L2924/181 ,  H05K1/0296 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

摘要： Methods and systems are described for enabling the efficient fabrication of small form factor power converters and also the small form factor power converter devices.

摘要翻译： 描述了用于实现小尺寸功率转换器和小尺寸功率转换器装置的有效制造的方法和系统。

公开(公告)号：US20080241991A1

公开(公告)日：2008-10-02

申请号：US11691428

申请日：2007-03-26

申请人： Anindya Poddar ,  Jaime A. Bayan ,  Ashok S. Prabhu ,  Will K. Wong

发明人： Anindya Poddar ,  Jaime A. Bayan ,  Ashok S. Prabhu ,  Will K. Wong

IPC分类号： H01L21/00

CPC分类号： H01L23/49548 ,  H01L21/561 ,  H01L24/13 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68354 ,  H01L2224/11822 ,  H01L2224/16245 ,  H01L2224/81001 ,  H01L2224/81011 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81 ,  H01L2224/0401

摘要： An improved method and apparatus for packaging integrated circuits are described. More particularly, a method and apparatus for use in securing a plurality of integrated circuit dice to a lead frame panel are described. Each integrated circuit die includes an active surface having a multiplicity of solder bumps. The lead frame panel includes an array of device areas, each including a plurality of leads. The method includes positioning a plurality of dice into designated positions on a carrier such that the active surfaces of the dice are facing upwards. The carrier includes a carrier frame including an associated array of carrier device areas. A lead frame panel may be positioned over the carrier such that the solder bumps on the active surfaces of the dice are adjacent and in contact with the associated leads of the associated device areas.

摘要翻译： 描述了用于封装集成电路的改进的方法和装置。 更具体地，描述了用于将多个集成电路芯片固定到引线框架面板的方法和装置。 每个集成电路管芯包括具有多个焊料凸点的有源表面。 引线框架面板包括一组设备区域，每个设备区域包括多个引线。 该方法包括将多个骰子定位在载体上的指定位置，使得骰子的活动表面朝上。 载体包括载体框架，其包括相关的载体装置区域阵列。 引线框架面板可以定位在载体上方，使得骰子的有效表面上的焊料凸块相邻并与相关联的器件区域的相关引线接触。

公开(公告)号：US07087986B1

公开(公告)日：2006-08-08

申请号：US10871313

申请日：2004-06-18

申请人： Jaime A. Bayan ,  Ashok S. Prabhu ,  Shaw Wei Lee

发明人： Jaime A. Bayan ,  Ashok S. Prabhu ,  Shaw Wei Lee

IPC分类号： H01L23/495 ,  H01L23/04

CPC分类号： H01L23/49541 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A solder pad configuration for use in an IC package is described. Various embodiments of the invention describe IC packages, lead-frames, or substrate panels configured with generally noncircular solder pads at their bottom surfaces. The noncircular shapes allow for greater surface area than circular solder pads having diameters equal to a major dimension of the noncircular shapes, while maintaining the same metal-to-metal clearance between the pads and adjacent leads. This increased surface area provides for stronger and more reliable solder joints.

摘要翻译： 描述了用于IC封装中的焊盘配置。 本发明的各种实施例描述了在其底表面上配置有大致非圆形焊盘的IC封装，引线框架或基板。 非圆形形状允许比具有等于非圆形形状的主要尺寸的直径的圆形焊盘更大的表面积，同时在焊盘和相邻引线之间保持相同的金属与金属间隙。 这种增加的表面积提供了更坚固和更可靠的焊点。

公开(公告)号：US06364089B1

公开(公告)日：2002-04-02

申请号：US09549241

申请日：1999-12-10

申请人： Inderjit Singh ,  Jaime A. Bayan ,  Hem Takiar ,  Ashok S. Prabhu

发明人： Inderjit Singh ,  Jaime A. Bayan ,  Hem Takiar ,  Ashok S. Prabhu

IPC分类号： B65G4724

CPC分类号： H01L21/67132 ,  B65G47/848 ,  H01L21/6838

摘要： The invention relates to apparatus and methods for semiconductor device handling. In one aspect, the invention relates to a rotary flipper including a wheel having a plurality of stations. A semiconductor device is placed within a first station in a first orientation. While the semiconductor device is held, the wheel portion of the rotary flipper rotates and the next station receives another semiconductor device. When the first station is in an unloading position, the semiconductor device is released. At this point, the semiconductor device is oriented in a second position. In one aspect, the semiconductor device is released into a cavity of a tape and reel. In another aspect, vacuum pressure is applied to hold the die. In one embodiment, the invention relates to a semiconductor device handling apparatus and apparatus that includes of a rotary semiconductor device flipper.

摘要翻译： 本发明涉及半导体器件处理的装置和方法。 一方面，本发明涉及一种包括具有多个站的车轮的旋转导板。 半导体器件以第一取向放置在第一工位内。 在保持半导体器件的同时，旋转推板的轮部分旋转并且下一个站接收另一个半导体器件。 当第一站处于卸载位置时，半导体器件被释放。 此时，半导体器件被定向在第二位置。 在一个方面，半导体器件被释放到带和卷的空腔中。 另一方面，施加真空压力以保持模具。 在一个实施例中，本发明涉及一种包括旋转半导体器件引脚的半导体器件处理装置和装置。

公开(公告)号：US08377267B2

公开(公告)日：2013-02-19

申请号：US12571223

申请日：2009-09-30

申请人： Jaime A. Bayan ,  Nghia Thuc Tu ,  Will K. Wong

发明人： Jaime A. Bayan ,  Nghia Thuc Tu ,  Will K. Wong

IPC分类号： C25D17/00 ,  B65G49/02

CPC分类号： C25D5/028 ,  C25D7/0635 ,  H01L23/49582 ,  H01L24/45 ,  H01L2224/45144 ,  H01L2224/48639 ,  H01L2224/85439 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2224/48 ,  H01L2924/00

摘要： Arrangements for plating a single surface of a thin foil are described. In one aspect, a metal foil is wrapped tightly at least partially around a plating solution drum. The drum is partially immersed in a plating solution such that the waterline of the metal plating solution is below a break point where the metallic foil strip begins to unwind from the plating solution drum. With this arrangement, one side of the metallic foil strip is exposed to the metal plating solution, while the opposing back side of the metallic foil strip does not come in substantial contact with the metal plating solution. In this manner, the exposed side of the foil is plated while the back surface of the foil is not plated. The drum may be rotated to convey the foil through the plating solution.

摘要翻译： 描述了用于镀覆薄箔的单个表面的布置。 在一个方面，金属箔至少部分地围绕电镀液桶包裹。 将滚筒部分地浸入电镀溶液中，使得金属电镀溶液的水线低于金属箔带开始从电镀液滚筒放卷的断点。 通过这种布置，金属箔条的一侧暴露于金属镀液，而金属箔条的相对背面不与金属电镀液基本接触。 以这种方式，箔的暴露面被镀覆，而箔的背面不被镀覆。 滚筒可以旋转以将箔传送通过电镀溶液。

公开(公告)号：US07612435B2

公开(公告)日：2009-11-03

申请号：US11963388

申请日：2007-12-21

申请人： Jaime A. Bayan ,  Anindya Poddar

发明人： Jaime A. Bayan ,  Anindya Poddar

IPC分类号： H01L23/495

CPC分类号： H01L23/49548 ,  H01L23/3185 ,  H01L23/49537 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2924/09701 ,  H01L2924/19041

摘要： A method of packaging an integrated circuit die having a plurality of I/O pads is described. The method includes positioning the die within a die attach area of a first leadframe that includes a plurality of first leads. The method also includes positioning a second leadframe that includes a plurality of second leads over the first leadframe. The method further includes electrically connecting each of the second leads to both an associated I/O pad and a first lead.

摘要翻译： 描述了一种封装具有多个I / O焊盘的集成电路管芯的方法。 该方法包括将管芯定位在包括多个第一引线的第一引线框的管芯附着区域内。 该方法还包括在第一引线框上定位包括多个第二引线的第二引线框架。 该方法还包括将每个第二引线电连接到相关联的I / O焊盘和第一引线。