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    Sending and/or receiving serial data with bit timing and parallel data conversion
    1.
    发明申请
    Sending and/or receiving serial data with bit timing and parallel data conversion 有权
    使用位定时和并行数据转换发送和/或接收串行数据

    公开(公告)号：US20050231399A1

    公开(公告)日：2005-10-20

    申请号：US10824747

    申请日：2004-04-15

    申请人： Michael Fowler ,  James Boomer

    发明人： Michael Fowler ,  James Boomer

    IPC分类号： H03M7/00 ,  H03M9/00 ,  H04J3/06 ,  H04L7/00 ,  H04L7/033

    CPC分类号： H03M9/00 ,  H04J3/0614 ,  H04L7/0091 ,  H04L7/033

    摘要： A serializer and a deserializer are disclosed and shown operating singly or as a pair. The invention operates independently from any outside system reference clock. The inventive system provides an internal bit clock that serializes the data when sending and de-serializes the data when receiving. A bit clock or pulse travels with the data word bits to define when a bit is stable. The system uses word boundary bits operating with a bit clock to distinguish different data words, as described in the parent application. The system operates either synchronously or asynchronously with the base computer or other such digital system, including I/O devices. The invention finds use where new data to be sent is strobed into the serializer, but also where a change in the data bit content itself will cause the changed data to be loaded into the serializer and sent bit by bit. The system operates where new data is strobed or loaded by the serializer (not the base computer system) when the last data word has been sent. In this case a signal is generated when the last word has been sent in the serializer that causes new data to be loaded for sending. Half duplex and full duplex configurations as disclosed. Similar, corresponding operations occur at the deserializer.

    摘要翻译： 串行器和解串器被公开并示出为单独操作或一对操作。 本发明独立于任何外部系统参考时钟工作。 本发明的系统提供内部位时钟，其在接收时发送和解串行化数据时串行化数据。 一个位时钟或脉冲随着数据字位移动，以定义位何时稳定。 系统使用以位时钟操作的字边界位来区分不同的数据字，如父应用程序所述。 该系统与基本计算机或其他此类数字系统（包括I / O设备）同步或异步运行。 本发明用于将要发送的新数据选通到串行器中，而且数据位内容本身的变化将导致改变的数据被加载到串行器中并逐位发送的地方。 当最后一个数据字被发送时，该系统在串行器（而不是基本计算机系统）选通或加载新数据的情况下运行。 在这种情况下，当序列化程序中发送最后一个单词时会产生一个信号，从而导致新的数据被加载发送。 所公开的半双工和全双工配置。 类似的，相应的操作发生在解串器。

    Architecture for bidirectional serializers and deserializer
    2.
    发明申请
    Architecture for bidirectional serializers and deserializer 审中-公开
    双向串行器和解串器的架构

    公开(公告)号：US20050219083A1

    公开(公告)日：2005-10-06

    申请号：US10802372

    申请日：2004-03-16

    申请人： James Boomer ,  Michael Fowler

    发明人： James Boomer ,  Michael Fowler

    IPC分类号： H03M9/00 ,  H04L7/00 ,  H04L7/04 ,  H04L7/06 ,  H04L25/49

    CPC分类号： H04L7/0008 ,  H04L7/04 ,  H04L7/06 ,  H04L2007/045

    摘要： A bi-directional serializer/deserializer is disclosed using a single bi-directional data line and a single bi-directional clock line. Gated buffers are controlled to operate either sending or receiving data, and a phase locked loop provides a clock to shift data out from a shift register. A reference clock is supplied to the PLL and the PLL generates a synchronous bit clock. The bit clock is sent over the clock line in parallel with the serial data bits, and the PLL bit clock is synchronized to the data bits. The receiving system will use the bit clock to serial load a receiving shift register. When a word is received a word clock is available to inform the receiving system. An embodiment of the system sends data to a receiving system using a clock generated at the sending system. Another embodiment receives data but uses a clock that is sent from the receiving system to the sending system, wherein the sending system uses the received clock to generate a clock to send the data and a synchronous clock that is sent back to the receiving system to load the data from the data line.

    摘要翻译： 公开了使用单个双向数据线和单个双向时钟线的双向串行器/解串器。 门控缓冲器被控制以发送或接收数据，并且锁相环提供用于从移位寄存器移出数据的时钟。 参考时钟提供给PLL，PLL产生同步位时钟。 位时钟通过时钟线与串行数据位并行发送，PLL位时钟与数据位同步。 接收系统将使用位时钟来串行加载接收移位寄存器。 当接收到一个字时，可以使用一个字时钟通知接收系统。 系统的一个实施例使用在发送系统产生的时钟将数据发送到接收系统。 另一个实施例接收数据，但是使用从接收系统发送到发送系统的时钟，其中发送系统使用所接收的时钟来产生发送数据的时钟和发送回接收系统的同步时钟以加载 来自数据线的数据。

    BIT CLOCK WITH EMBEDDED WORD CLOCK BOUNDARY
    3.
    发明申请
    BIT CLOCK WITH EMBEDDED WORD CLOCK BOUNDARY 审中-公开
    具有嵌入式字时钟边界的位时钟

    公开(公告)号：US20050207280A1

    公开(公告)日：2005-09-22

    申请号：US10802436

    申请日：2004-03-16

    申请人： Michael Fowler ,  James Boomer ,  Nathan Charland

    发明人： Michael Fowler ,  James Boomer ,  Nathan Charland

    IPC分类号： H03M9/00 ,  H04L5/14 ,  H04L7/00 ,  H04L7/04 ,  H04L7/06 ,  H04L25/45 ,  H04L25/49 ,  G04B47/00 ,  G06F11/00 ,  H03M13/00

    CPC分类号： H04L7/0008 ,  H03M9/00 ,  H04L5/14 ,  H04L7/04 ,  H04L7/06 ,  H04L25/45 ,  H04L2007/045

    摘要： A bi-directional serializer/deserializer is disclosed using a single bi-directional data line and a single bi-directional clock line. Gated buffers are controlled to operate either sending or receiving data, and a phase locked loop provides a clock to shift data out from a shift register. A reference clock is supplied to the PLL and the PLL generates a synchronous bit clock. The bit clock is sent over the clock line in parallel with the serial data bits, and the PLL bit clock is synchronized to the data bits. Two data boundary bits are inserted between the word data bits, the boundary data bits are arranged with a logic level transition between the two data boundary bits. Also, at the boundary of the words during the sending of the two boundary data bits, the synchronous bit clock is arranged to have no logic level transition. The receiving system will use the bit clock to serial load the received word and boundary data bits into a shift register. A word boundary is detected by sensing a data bit transition while there is no bit clock.

    摘要翻译： 公开了使用单个双向数据线和单个双向时钟线的双向串行器/解串器。 门控缓冲器被控制以发送或接收数据，并且锁相环提供用于从移位寄存器移出数据的时钟。 参考时钟提供给PLL，PLL产生同步位时钟。 位时钟通过时钟线与串行数据位并行发送，PLL位时钟与数据位同步。 在字数据位之间插入两个数据边界位，边界数据位以两个数据边界位之间的逻辑电平转换排列。 而且，在发送两个边界数据位期间的字边界处，同步位时钟被布置成没有逻辑电平转换。 接收系统将使用位时钟将接收的字和边界数据位串行加载到移位寄存器中。 通过在没有位时钟的情况下感测数据位转换来检测字边界。

    Implantable access port
    5.
    发明授权
    Implantable access port 有权

    公开(公告)号：US06997914B2

    公开(公告)日：2006-02-14

    申请号：US10114343

    申请日：2002-04-02

    申请人： David A. Smith ,  Michael Fowler

    发明人： David A. Smith ,  Michael Fowler

    IPC分类号： A61M5/00 ,  A61M25/00 ,  A61M11/16

    CPC分类号： A61M39/0208

    摘要： An implantable access port for use in transferring a fluid transdermally between an external fluid storage or dispensing device and a site within a patient's body is disclosed. The access port includes a base, a bowl-shaped reservoir defined within the base by a smooth surfaced wall, and a septum secured to the base and enclosing the reservoir within the base. The access port also includes a reservoir outlet defined centrally within the reservoir. The bowl-shaped reservoir is defined by a continuous smooth-surfaced curvilinear wall. The reservoir may thus be sized and shaped as a parabola, or may be hemispherical or semi-hemispherical in cross-section. The reservoir outlet is defined at a center point on the bottom of the reservoir wall, may be partially or fully recessed within the bottom of the reservoir wall, and is also defined in the base tangentially with respect to the bottom of the reservoir wall. The access port also has an outlet passageway defined within the base and extending in communication with the reservoir outlet and an external opening defined in the exterior of the base.

    SYSTEM AND METHOD FOR DISTRIBUTED DATA MANAGEMENT IN WIRELESS NETWORKS
    6.
    发明申请
    SYSTEM AND METHOD FOR DISTRIBUTED DATA MANAGEMENT IN WIRELESS NETWORKS 有权
    无线网络分布式数据管理系统与方法

    公开(公告)号：US20140269284A1

    公开(公告)日：2014-09-18

    申请号：US13834826

    申请日：2013-03-15

    申请人： Ashwin Amanna, III ,  Joseph Mitola, III ,  Thomas Charles Clancy, III ,  Jeffrey H. Reed ,  Robert W. McGweir ,  Seth Hitefield ,  Andrew Pham ,  Sergio Bernales ,  Michael Fowler

    发明人： Ashwin Amanna, III ,  Joseph Mitola, III ,  Thomas Charles Clancy, III ,  Jeffrey H. Reed ,  Robert W. McGweir ,  Seth Hitefield ,  Andrew Pham ,  Sergio Bernales ,  Michael Fowler

    IPC分类号： H04W28/10

    CPC分类号： H04L5/0037 ,  H04L47/22 ,  H04W16/14 ,  H04W72/08 ,  H04W72/10 ,  H04W76/50

    摘要： Described are systems and methods for managing data traffic to a plurality of mobile devices over a wireless network. For each mobile device, a facility is provided that is capable of: (i) assigning a utility function to mathematically represent the value of a plurality of applications running on that mobile device with respect to a factor, (ii) aggregating the plurality of utility functions to generate an aggregated utility function corresponding to that mobile device, and (ii) communicating at least one of the associated aggregate utility function and a bid price based on the associated aggregate utility function over a network. A resource allocation is determined among a plurality of mobile devices based on a bidding process which accounts for the aggregate utility functions, and the data traffic between the mobile devices and the resource is managed using a network traffic shaping element according to the resource allocation.

    摘要翻译： 描述了用于通过无线网络管理到多个移动设备的数据业务的系统和方法。 对于每个移动设备，提供能够：（i）分配效用函数来数学地表示相对于因素在该移动设备上运行的多个应用的​​值的设施，（ii）聚合多个实用程序 用于生成对应于该移动设备的聚合效用函数，以及（ii）基于通过网络的相关联的聚合效用函数来传达相关联的聚合效用函数和投标价格中的至少一个。 基于考虑了综合效用函数的投标处理，在多个移动装置之间确定资源分配，根据资源分配，使用网络流量整形单元来管理移动装置与资源之间的数据业务。

    Implantable access port
    8.
    发明申请
    Implantable access port 审中-公开

    公开(公告)号：US20060184141A1

    公开(公告)日：2006-08-17

    申请号：US11317284

    申请日：2005-12-23

    申请人： David Smith ,  Michael Fowler

    发明人： David Smith ,  Michael Fowler

    IPC分类号： A61M31/00 ,  A61M37/00

    CPC分类号： A61M39/0208

    摘要： An implantable access port for use in transferring a fluid transdermally between an external fluid storage or dispensing device and a site within a patient's body is disclosed. The access port includes a base, a bowl-shaped reservoir defined within the base by a smooth surfaced wall, and a septum secured to the base and enclosing the reservoir within the base. The access port also includes a reservoir outlet defined centrally within the reservoir. The bowl-shaped reservoir is defined by a continuous smooth-surfaced curvilinear wall. The reservoir may thus be sized and shaped as a parabola, or may be hemispherical or semi-hemispherical in cross-section. The reservoir outlet is defined at a center point on the bottom of the reservoir wall, may be partially or fully recessed within the bottom of the reservoir wall, and is also defined in the base tangentially with respect to the bottom of the reservoir wall. The access port also has an outlet passageway defined within the base and extending in communication with the reservoir outlet and an external opening defined in the exterior of the base.

    Coating compositions and processes
    9.
    发明授权
    Coating compositions and processes 有权
    涂料组合物和工艺

    公开(公告)号：US06899924B1

    公开(公告)日：2005-05-31

    申请号：US09646505

    申请日：1999-03-16

    申请人： Peter Carson ,  Rodney Ralph Brooks ,  Michael Fowler

    发明人： Peter Carson ,  Rodney Ralph Brooks ,  Michael Fowler

    IPC分类号： B05D1/36 ,  B05D5/00 ,  B05D7/00 ,  C09D5/00 ,  C09D7/12 ,  C09D9/00 ,  C09D163/02 ,  C09D167/00 ,  C09D201/00 ,  B05D3/02

    CPC分类号： C09D163/00 ,  B05D5/00 ,  B05D7/52 ,  C08K5/09 ,  C08K5/13 ,  C08K5/18 ,  C08K5/3465 ,  C09D7/63 ,  C09D167/00 ,  Y10T428/31511 ,  Y10T428/31855 ,  Y10T428/31909 ,  C08L2666/28

    摘要： An undercoat composition comprises a film-forming synthetic resin and contains a non-volatile acidic aromatic polar organic compound in free acid or salt form, which compound facilitates the removal by a stripping composition of a top coat paint which is subsequently applied over the undercoat. A top coat composition for applying as the outer coating on a substrate comprises a film-forming synthetic resin having functional groups and a curing agent for crosslinking the synthetic resin and contains a non-volatile acidic aromatic polar organic compound in free acid or salt form, which compound facilitates the removal of the cured top coat by a stripping composition from a cured undercoat of similar composition which does not contain the said acidic aromatic polar organic compound.

    摘要翻译： 底涂层组合物包含成膜合成树脂，并含有游离酸或盐形式的非挥发性酸性芳族极性有机化合物，该化合物有利于通过汽提组合物去除随后涂覆在底涂层上的面漆涂料。 将作为外涂层涂布在基材上的面漆组合物包括具有官能团的成膜合成树脂和用于交联合成树脂的固化剂，并含有游离酸或盐形式的非挥发性酸性芳族极性有机化合物， 该化合物有助于通过剥离组合物从不含所述酸性芳族极性有机化合物的类似组成的固化底涂层去除固化的外涂层。

    Crosspoint switch with serializer and deserializer functions
    10.
    发明申请
    Crosspoint switch with serializer and deserializer functions 失效

    公开(公告)号：US20050040848A1

    公开(公告)日：2005-02-24

    申请号：US10947573

    申请日：2004-09-22

    申请人： Michael Fowler

    发明人： Michael Fowler

    IPC分类号： H04Q3/52 ,  G06F13/00 ,  H03K17/00 ,  H03K19/173 ,  H04L12/56

    CPC分类号： H04L49/101 ,  H03K17/002 ,  H04L49/201

    摘要： A programmable switch of three or more ports, each port having data lines separate from lines sharing control and addressing. The programmable switch includes internal logic control and electronic modules that accept and deserialize the control and address signals. The logic control directs the data in signals to one or more of the output data lines. Since the data and control and addressing lines are separate, the control may act concurrently with the data to direct the data properly. The sending unit must synchronize such operations to ensure data coherency and proper timing. The data signal path from any input to any or all outputs is designed to have, typically, only a single logic gate or on transistor switch delay.