Magnetoresistive memory SOI cell
    1.
    发明申请
    Magnetoresistive memory SOI cell 有权
    磁电阻存储器SOI单元

    公开(公告)号:US20050242382A1

    公开(公告)日:2005-11-03

    申请号:US11116874

    申请日:2005-04-28

    摘要: A ferromagnetic thin-film based digital memory having a substrate formed of a base supporting an electrically insulating material primary substrate layer in turn supporting a plurality of current control devices each having an interconnection arrangement with each of said plurality of current control devices being separated from one another by spacer material therebetween and being electrically interconnected with information storage and retrieval circuitry. A plurality of bit structures are each supported on and electrically connected to a said interconnection arrangement of a corresponding one of said plurality of current control devices and have magnetic material films in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained of which two are separated by at least one intermediate layer of a nonmagnetic material having two major surfaces on opposite sides thereof. A plurality of word line structures located across from a corresponding one of the bit structures on an opposite side of the intermediate layer of a corresponding one of said bit structures from its interconnection arrangement supporting that bit structure. Sufficient electrical current selectively drawn through each of these bit structures as interconnected can cause substantial heating of that bit structure to raise temperatures thereof to have at least one of the magnetic material films therein at least approach its corresponding associated critical temperature while being substantially above temperatures of at least an adjacent said bit structure because of sufficient thermal isolation.

    摘要翻译: 一种基于铁磁薄膜的数字存储器,其具有由支撑电绝缘材料主基底层的基底形成的基底,其又支撑多个电流控制装置,每个电流控制装置具有与所述多个电流控制装置中的每一个的互连装置, 另一个通过其间的间隔物材料并且与信息存储和检索电路电互连。 多个位结构分别被支撑在所述多个电流控制装置中的对应的一个电流控制装置的所述互连装置上并与其电连接,并且具有磁性材料膜,其中特性磁性能基本上保持在相关的临界温度以下, 磁性不保持,其中两个被至少一个在其相对侧上具有两个主表面的非磁性材料的中间层隔开。 多个字线结构,位于相对应的所述位结构的中间层的相对侧上的对应的一个位线结构,以及支撑该位结构的互连布置。 通过互连的这些位结构中的每一个选择性地抽出足够的电流可引起该位结构的实质加热以升高其温度,使其中的至少一个磁性材料膜至少接近其对应的相关临界温度,同时基本上高于 至少相邻的所述位结构由于足够的热隔离。

    Enclosure tamper detection and protection
    2.
    发明申请
    Enclosure tamper detection and protection 有权
    外壳防拆检测和保护

    公开(公告)号:US20080042834A1

    公开(公告)日:2008-02-21

    申请号:US11788616

    申请日:2007-04-20

    IPC分类号: G08B13/24

    摘要: A tamper detecting enclosure arrangement for enclosures containing an interior space in which a protected item is positioned having a magnetoresistive sensing memory storage cell positioned in or near the protected item in the enclosure having a two state offset magnetoresistance versus externally applied magnetic field. A magnet is positioned at a selected separation distance from the magnetoresistive sensing memory storage cell to thereby provide a magnetic field about the magnetoresistive sensing memory storage cell if said enclosure has not been opened in such a manner as to result in substantially increasing said separation distance.

    摘要翻译: 一种用于包含内部空间的篡改检测外壳装置,其中被保护物品被定位在其中,其具有位于所述外壳中的受保护物品内或附近的磁阻感测存储器单元,其具有与外部施加的磁场相对的两个状态偏移磁阻。 磁体位于与磁阻感测存储单元相隔一定距离的距离处,从而如果所述外壳未被打开,从而提供磁阻感测存储单元周围的磁场,导致大大增加所述间隔距离。

    Magnetic annealing sequences for patterned MRAM synthetic antiferromagnetic pinned layers

    公开(公告)号:US20060234397A1

    公开(公告)日:2006-10-19

    申请号:US11451925

    申请日:2006-06-12

    申请人: James Deak

    发明人: James Deak

    IPC分类号: H01L21/00

    摘要: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.

    Magnetic annealing sequences for patterned MRAM synthetic antiferromagnetic pinned layers
    4.
    发明申请
    Magnetic annealing sequences for patterned MRAM synthetic antiferromagnetic pinned layers 有权
    用于图案化MRAM合成反铁磁固定层的磁退火序列

    公开(公告)号:US20050164414A1

    公开(公告)日:2005-07-28

    申请号:US10764832

    申请日:2004-01-26

    申请人: James Deak

    发明人: James Deak

    摘要: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.

    摘要翻译: 提供了一种制造用于MRAM器件的固定层的方法。 该方法包括提供固定层。 固定层包括衬底上的反铁磁钉扎层和钉扎层上的铁磁性钉扎层,钉扎层具有第一厚度。 固定层还包括被钉扎层上的间隔层,以及间隔层上方的铁磁参考层,参考层具有第二厚度。 该方法还包括使用时间温度/磁场分布对固定层进行退火,该轮廓具有最大磁场强度(H H 3退火)。 基于被钉扎层的第一厚度和参考层的第二厚度来选择轮廓。

    Thermomagnetically assisted spin-momentum-transfer switching memory
    5.
    发明申请
    Thermomagnetically assisted spin-momentum-transfer switching memory 有权
    热磁辅助自旋动量转换开关存储器

    公开(公告)号:US20060077707A1

    公开(公告)日:2006-04-13

    申请号:US11249046

    申请日:2005-10-12

    申请人: James Deak

    发明人: James Deak

    IPC分类号: G11C11/14

    CPC分类号: H01L27/228 G11C11/16

    摘要: A ferromagnetic thin-film based digital memory having a substrate supporting bit structures that are electrically interconnected with information storage and retrieval circuitry and having first and second oppositely oriented relatively fixed magnetization layers and a ferromagnetic material film in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained. This ferromagnetic material film is separated from the first and second fixed magnetization films by corresponding layers of a nonmagnetic materials one being electrically insulative and that one remaining being electrically conductive. Each bit structure has an interconnection structure providing electrical contact thereto at a contact surface thereof substantially parallel to the intermediate layer positioned between the first contact surface and the substrate. A plurality of word line structures located across from a corresponding one of the bit structures on an opposite side. Electrical current selectively drawn through each of these bit structures and its interconnection structure can cause substantial heating of that bit structure to raise temperatures thereof while being above temperatures of at least an adjacent said bit structure because of sufficient thermal isolation.

    摘要翻译: 一种基于铁磁薄膜的数字存储器,其具有支撑位结构的衬底,所述衬底支撑位结构,其与信息存储和检索电路电互连并且具有第一和第二相对定向的相对固定的磁化层和铁磁材料膜,其中特性磁性能基本上保持在低于 相关的临界温度,高于该临界温度,这种磁性不能保持。 该铁磁材料膜通过非磁性材料的相应层与第一和第二固定磁化膜分离,一个是电绝缘的,另一个是导电的。 每个位结构具有在其基本平行于位于第一接触表面和衬底之间的中间层的接触表面处提供与其接触的互连结构。 多个字线结构,位于相对侧上的相应一个位结构的两侧。 通过这些位结构中的每一个及其互连结构选择性地拉伸的电流可以导致该位结构的实质加热,以便由于足够的热隔离而在至少相邻的所述位结构的温度之上升高其温度。

    Self-aligned, low-resistance, efficient memory array
    6.
    发明申请
    Self-aligned, low-resistance, efficient memory array 有权
    自对准,低电阻,高效率的存储器阵列

    公开(公告)号:US20060003471A1

    公开(公告)日:2006-01-05

    申请号:US11212646

    申请日:2005-08-29

    申请人: James Deak

    发明人: James Deak

    IPC分类号: H01L21/00

    摘要: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.

    摘要翻译: 本发明寻求通过使用在凹形写入导体内形成读取导体的工艺来减少写入操作所需的电流量,写入导体本身形成在绝缘层的沟槽内。 本发明通过隔离写入导体并且使得能够减少写入一位信息所需的电流来保护MTJ免受由写入导体产生的电压的影响。

    System and method for reducing shorting in memory cells
    7.
    发明申请
    System and method for reducing shorting in memory cells 有权
    用于减少存储器单元短路的系统和方法

    公开(公告)号:US20050079638A1

    公开(公告)日:2005-04-14

    申请号:US10684967

    申请日:2003-10-14

    IPC分类号: H01L21/00 H01L27/22

    摘要: An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting across the barrier layers of the memory cells, spacers can be formed around the upper conductive layer and, after the layers of the magnetic memory cells have been etched, the memory cells can be oxidized to transform any conductive particles that are deposited along the sidewalls of the memory cells as byproducts of the etching process into nonconductive particles. Alternatively, the lower conductive layer can be repeatedly subjected to partial oxidation and partial etching steps such that only nonconductive particles can be thrown up along the sidewalls of the memory cells as byproducts of the etching process.

    摘要翻译: MRAM器件包括具有由阻挡层隔开的上导电层和下导电层的磁存储单元的阵列。 为了减少跨越存储器单元的阻挡层的电短路的可能性,可以在上导电层周围形成间隔物,并且在已经蚀刻了磁存储单元的层之后,可以将存储单元氧化以转换任何导电颗粒 沿着存储器单元的侧壁沉积作为蚀刻工艺的副产物而形成非导电颗粒。 或者,下导电层可以重复进行部分氧化和部分蚀刻步骤,使得只有非导电颗粒可以作为蚀刻工艺的副产物沿着存储器单元的侧壁被抛出。

    Method for forming MRAM bit having a bottom sense layer utilizing electroless plating
    8.
    发明申请
    Method for forming MRAM bit having a bottom sense layer utilizing electroless plating 有权
    用于形成具有利用无电镀的底部感测层的MRAM钻头的方法

    公开(公告)号:US20070161127A1

    公开(公告)日:2007-07-12

    申请号:US11657725

    申请日:2007-01-25

    IPC分类号: H01L21/00

    CPC分类号: H01L27/222 H01L43/12

    摘要: The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor in a trench is provided in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a dielectric layer is deposited to a thickness slightly greater than the desired final thickness of a sense layer, which is formed later. The dielectric layer is then patterned and etched to form an opening for the cell shapes over the first conductor. Then, a permalloy is electroplated in the cell shapes to form the sense layer. The sense layer and dielectric layer are flattened and then a nonmagnetic tunnel barrier layer is deposited. Finally, the pinned layer is formed over the tunnel barrier layer.

    摘要翻译: 本发明提供一种形成MRAM单元的方法,该方法在制造期间使电短路的发生最小化。 沟槽中的第一导体设置在绝缘层中,并且绝缘层和第一导体的上表面被平坦化。 然后,电介质层被沉积成稍大于稍后形成的感应层的期望最终厚度的厚度。 然后对电介质层进行图案化和蚀刻,以形成第一导体上的电池形状的开口。 然后,将坡莫合金电镀在电池形状中以形成感测层。 感应层和电介质层被平坦化,然后沉积非磁性隧道势垒层。 最后,在隧道势垒层上方形成钉扎层。

    Magnetic annealing sequences for patterned MRAM synthetic antiferromagnetic pinned layers

    公开(公告)号:US20060192304A1

    公开(公告)日:2006-08-31

    申请号:US11415601

    申请日:2006-05-01

    申请人: James Deak

    发明人: James Deak

    IPC分类号: H01L21/00

    摘要: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.