公开(公告)号：US20070005997A1

公开(公告)日：2007-01-04

申请号：US11173784

申请日：2005-06-30

申请人： James Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

发明人： James Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/325

摘要： Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.

摘要翻译： 描述了各种方法，装置和系统，其中芯片组控制器具有控制与计算设备中的外围设备的通信的电路。 芯片组控制器具有逻辑配置1）当外围设备连接到芯片组控制器时检测插件事件，以及2）基于逻辑检测来将芯片组控制器从低功耗状态转换到更高功耗状态 插件事件。

公开(公告)号：US20070005995A1

公开(公告)日：2007-01-04

申请号：US11173220

申请日：2005-06-30

申请人： James Kardach ,  Barnes Cooper ,  Paul Diefenbaugh ,  Seh Kwa ,  Animesh Mishra

发明人： James Kardach ,  Barnes Cooper ,  Paul Diefenbaugh ,  Seh Kwa ,  Animesh Mishra

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/325 ,  Y02D10/126 ,  Y02D50/20

摘要： A power management system for a computing platform is described. In one embodiment, the power management system provides additional device states which the device controllers of the platform assume when the device controllers are operational but idle. These additional device states are states in which the device controller commits to certain types of inactivity. In another embodiment, the power management system provides additional platform modes which guarantee processor inactivity and/or deference of particular platform events while the mode is in effect.

摘要翻译： 描述了一种用于计算平台的电源管理系统。 在一个实施例中，电源管理系统提供当设备控制器可操作但空闲时，平台的设备控制器假设的附加设备状态。 这些附加设备状态是设备控制器执行某些类型的不活动状态。 在另一个实施例中，电源管理系统提供额外的平台模式，其在模式有效时保证处理器不活动和/或尊重特定平台事件。

公开(公告)号：US20070005859A1

公开(公告)日：2007-01-04

申请号：US11171833

申请日：2005-06-29

申请人： Paul Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie Cline

发明人： Paul Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie Cline

IPC分类号： G06F13/24

CPC分类号： G06F13/24 ,  G06F13/12

摘要： In one embodiment, a data processing system includes, but is not limited to, a processor, a memory coupled to the processor, and a universal serial bus (USB) controller coupled to the processor and the memory. The USB controller includes a local memory to cache at least one activity descriptor of at least a portion of a periodic schedule having multiple frames stored in the main memory. The USB controller defers to service an active USB device described by one of the activity descriptors until a corresponding frame is scheduled to be serviced subsequently. Other methods and apparatuses are also described.

摘要翻译： 在一个实施例中，数据处理系统包括但不限于处理器，耦合到处理器的存储器以及耦合到处理器和存储器的通用串行总线（USB）控制器。 USB控制器包括本地存储器，以缓存具有存储在主存储器中的多个帧的周期性调度的至少一部分的至少一个活动描述符。 USB控制器延迟服务于其中一个活动描述符描述的活动USB设备，直到相应的帧被安排在随后的服务中。 还描述了其它方法和装置。

公开(公告)号：US20060288240A1

公开(公告)日：2006-12-21

申请号：US11153950

申请日：2005-06-16

申请人： James Kardach ,  David Williams ,  Animesh Mishra

发明人： James Kardach ,  David Williams ,  Animesh Mishra

IPC分类号： G06F1/26

CPC分类号： G06F1/3228 ,  G06F1/3237 ,  G06F1/3253 ,  G06F1/3275 ,  G06F1/3287 ,  Y02D10/128 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/171

摘要： Systems and methods of power management provide for controlling the idleness of a processor based on an operating system schedule. The idleness of at least one device is synchronized with the idleness of the processor. Idleness synchronization may involve deferring bus transactions, suspending memory refresh, turning off power to clock sources and turning off power to combinatorial logic during an idle window in the OS schedule.

摘要翻译： 电源管理的系统和方法提供了基于操作系统调度来控制处理器的空闲状态。 至少一个设备的空闲与处理器的空闲同步。 空闲同步可能涉及延迟总线事务，暂停内存刷新，关闭时钟源的电源，并在OS调度的空闲窗口期间关闭组合逻辑的电源。

公开(公告)号：US20070079150A1

公开(公告)日：2007-04-05

申请号：US11241376

申请日：2005-09-30

申请人： Brian Belmont ,  Animesh Mishra ,  James Kardach

发明人： Brian Belmont ,  Animesh Mishra ,  James Kardach

IPC分类号： G06F1/26

CPC分类号： G06F9/4418 ,  G06F1/3228 ,  G06F1/3275 ,  G06F1/3293 ,  G06F9/3867 ,  G06F9/4401 ,  G06F12/0842 ,  G06F13/4282 ,  G06F15/80 ,  Y02D10/151

摘要： An embodiment of the present invention is a technique to dynamically swap processor cores. A first core has a first instruction set. The first core executes a program at a first performance level. The first core stops executing the program when a triggering event occurs. A second core has a second instruction set compatible with the first instruction set and has a second performance level different than the first performance level. The second core is in a power down state when the first core is executing the program. A circuit powers up the second core after the first core stops executing the program such that the second core continues executing the program at the second performance level.

摘要翻译： 本发明的实施例是用于动态地交换处理器核心的技术。 第一个核心有一个第一个指令集。 第一个核心以第一个性能级别执行程序。 当触发事件发生时，第一个内核停止执行程序。 第二核心具有与第一指令集兼容的第二指令集，并且具有与第一性能级别不同的第二性能级别。 当第一个核心执行程序时，第二个内核处于掉电状态。 在第一核心停止执行程序之后，电路对第二核心供电，使得第二核心继续在第二性能级别执行程序。

公开(公告)号：US20070006000A1

公开(公告)日：2007-01-04

申请号：US11174375

申请日：2005-06-30

申请人： Sandeep Jain ,  Paul Diefenbaugh ,  James Kardach ,  Ramkumar Vankatachary

发明人： Sandeep Jain ,  Paul Diefenbaugh ,  James Kardach ,  Ramkumar Vankatachary

IPC分类号： G06F1/00

CPC分类号： G06F1/3275 ,  G06F1/3228 ,  Y02D10/14

摘要： The methods for fine-grained power management of physical system memory allow portions of the system volatile memory to be independently power managed. The system volatile memory may be partitioned into a plurality of power management units (PMUs). Each PMU may have a pre-determined size or a variable size, which may be less than the size of a memory chip. Each PMU may be placed in a different memory state and independently power managed according to the memory state. At opportune times during the system active state, a fractional potion of the system volatile memory is shadowed into the system nonvolatile memory. Active data in the system volatile memory is rearranged prior to entering a power-saving mode and the PMUs containing the shadowed data may be powered off. Thus, power efficiency of the system volatile memory is improved.

摘要翻译： 用于物理系统存储器的细粒度电源管理的方法允许系统易失性存储器的一部分被独立地进行功率管理。 系统易失性存储器可以被划分成多个电源管理单元（PMU）。 每个PMU可以具有预定尺寸或可变尺寸，其可以小于存储器芯片的尺寸。 每个PMU可以被放置在不同的存储器状态，并且根据存储器状态独立地进行功率管理。 在系统活动状态期间的适时时刻，系统易失性存储器的分数部分被遮蔽到系统非易失性存储器中。 在进入省电模式之前，系统易失性存储器中的有效数据被重新排列，并且包含阴影数据的PMU可能被关闭。 因此，提高了系统易失性存储器的功率效率。

公开(公告)号：US07281074B2

公开(公告)日：2007-10-09

申请号：US11171833

申请日：2005-06-29

申请人： Paul S. Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie E. Cline

发明人： Paul S. Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie E. Cline

IPC分类号： G06F13/10 ,  G06F13/38 ,  G06F13/14

CPC分类号： G06F13/24 ,  G06F13/12

摘要： In one embodiment, a data processing system includes, but is not limited to, a processor, a memory coupled to the processor, and a universal serial bus (USB) controller coupled to the processor and the memory. The USB controller includes a local memory to cache at least one activity descriptor of at least a portion of a periodic schedule having multiple frames stored in the main memory. The USB controller defers to service an active USB device described by one of the activity descriptors until a corresponding frame is scheduled to be serviced subsequently. Other methods and apparatuses are also described.

公开(公告)号：US20070002036A1

公开(公告)日：2007-01-04

申请号：US11169509

申请日：2005-06-29

申请人： James Kardach ,  David Williams ,  Achintya Bhowmik ,  Barnes Cooper

发明人： James Kardach ,  David Williams ,  Achintya Bhowmik ,  Barnes Cooper

IPC分类号： G09G5/00

CPC分类号： G09G5/006 ,  G09G3/3648 ,  G09G5/363 ,  G09G2330/021 ,  G09G2340/0435

摘要： Apparatus and systems, as well as methods and articles, may operate to update video display pixels. A video display bus can communicate data to a video display according to specified clock frequencies and a refresh time period. Power conservation can be enhanced by adjusting the specified clock frequencies and/or refresh time period to provide idle time on the video display bus.

摘要翻译： 设备和系统以及方法和物品可以操作来更新视频显示像素。 视频显示总线可以根据指定的时钟频率和刷新时间周期将数据传送到视频显示器。 可以通过调整指定的时钟频率和/或刷新时间来提高功率节省，从而在视频显示总线上提供空闲时间。

公开(公告)号：US06446153B1

公开(公告)日：2002-09-03

申请号：US08818048

申请日：1997-03-14

申请人： Barnes Cooper ,  James Kardach

发明人： Barnes Cooper ,  James Kardach

IPC分类号： G06F946

摘要： A computer system is described where one or more processors executing operating system (OS) code and System Management (SM) code can access the same host interface of an embedded controller. The embedded controller, in turn, is coupled to one or more system devices such as an IDE power plane switch, a thermal A/D monitor, a System Management Bus (SMBus), etc. The embedded controller asserts a system management interrupt (SMI) to the system management environment of the processing unit(s) as well as a system control interrupt to the operating system environment of the processing unit(s). Accordingly, the processing unit(s) executing operating system code and system management code is able to control and/or monitor a number of system devices in the computer system by communicating with the embedded controller via its host interface and interrupts.

公开(公告)号：US08254995B2

公开(公告)日：2012-08-28

申请号：US12941814

申请日：2010-11-08

申请人： Roy Want ,  James Kardach ,  Graham D. Kirby ,  Trevor A. Pering

发明人： Roy Want ,  James Kardach ,  Graham D. Kirby ,  Trevor A. Pering

IPC分类号： H04W24/00

CPC分类号： H04W88/02 ,  H04L63/0209 ,  H04M1/72519 ,  H04M2250/02 ,  H04W12/08

摘要： A wireless device is disclosed. The wireless device includes a wireless communication module, a data storage module, and a controller for controlling the storage and/or retrieval of data from the data storage module. The wireless communication module communicates with each of a plurality of remote devices and the data storage module defines a first storage area and a second storage area. The controller controls the communication of data between the first storage area and the remote device, and the second storage area and the remote device dependent upon access rights associated with the remote device. The first storage area typically defines a public storage area with which data is exchanged in a relatively free manner, and the second storage area typically defines a private storage area with which data is exchanged in a relatively restricted manner.

摘要翻译： 公开了一种无线设备。 无线设备包括无线通信模块，数据存储模块和用于控制来自数据存储模块的数据的存储和/或检索的控制器。 无线通信模块与多个远程设备中的每一个进行通信，数据存储模块定义第一存储区域和第二存储区域。 控制器控制第一存储区域和远程设备之间的数据通信，以及依赖于与远程设备相关联的访问权限的第二存储区域和远程设备的通信。 第一存储区域通常定义以相对自由的方式交换数据的公共存储区域，并且第二存储区域通常定义以相对有限的方式交换数据的专用存储区域。