公开(公告)号：US20070005859A1

公开(公告)日：2007-01-04

申请号：US11171833

申请日：2005-06-29

申请人： Paul Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie Cline

发明人： Paul Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie Cline

IPC分类号： G06F13/24

CPC分类号： G06F13/24 ,  G06F13/12

摘要： In one embodiment, a data processing system includes, but is not limited to, a processor, a memory coupled to the processor, and a universal serial bus (USB) controller coupled to the processor and the memory. The USB controller includes a local memory to cache at least one activity descriptor of at least a portion of a periodic schedule having multiple frames stored in the main memory. The USB controller defers to service an active USB device described by one of the activity descriptors until a corresponding frame is scheduled to be serviced subsequently. Other methods and apparatuses are also described.

摘要翻译： 在一个实施例中，数据处理系统包括但不限于处理器，耦合到处理器的存储器以及耦合到处理器和存储器的通用串行总线（USB）控制器。 USB控制器包括本地存储器，以缓存具有存储在主存储器中的多个帧的周期性调度的至少一部分的至少一个活动描述符。 USB控制器延迟服务于其中一个活动描述符描述的活动USB设备，直到相应的帧被安排在随后的服务中。 还描述了其它方法和装置。

公开(公告)号：US20070005997A1

公开(公告)日：2007-01-04

申请号：US11173784

申请日：2005-06-30

申请人： James Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

发明人： James Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/325

摘要： Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.

摘要翻译： 描述了各种方法，装置和系统，其中芯片组控制器具有控制与计算设备中的外围设备的通信的电路。 芯片组控制器具有逻辑配置1）当外围设备连接到芯片组控制器时检测插件事件，以及2）基于逻辑检测来将芯片组控制器从低功耗状态转换到更高功耗状态 插件事件。

公开(公告)号：US20070005995A1

公开(公告)日：2007-01-04

申请号：US11173220

申请日：2005-06-30

申请人： James Kardach ,  Barnes Cooper ,  Paul Diefenbaugh ,  Seh Kwa ,  Animesh Mishra

发明人： James Kardach ,  Barnes Cooper ,  Paul Diefenbaugh ,  Seh Kwa ,  Animesh Mishra

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/325 ,  Y02D10/126 ,  Y02D50/20

摘要： A power management system for a computing platform is described. In one embodiment, the power management system provides additional device states which the device controllers of the platform assume when the device controllers are operational but idle. These additional device states are states in which the device controller commits to certain types of inactivity. In another embodiment, the power management system provides additional platform modes which guarantee processor inactivity and/or deference of particular platform events while the mode is in effect.

摘要翻译： 描述了一种用于计算平台的电源管理系统。 在一个实施例中，电源管理系统提供当设备控制器可操作但空闲时，平台的设备控制器假设的附加设备状态。 这些附加设备状态是设备控制器执行某些类型的不活动状态。 在另一个实施例中，电源管理系统提供额外的平台模式，其在模式有效时保证处理器不活动和/或尊重特定平台事件。

公开(公告)号：US20060132109A1

公开(公告)日：2006-06-22

申请号：US11019791

申请日：2004-12-21

申请人： Jorge Rodriguez ,  Leslie Cline ,  Barnes Cooper

发明人： Jorge Rodriguez ,  Leslie Cline ,  Barnes Cooper

IPC分类号： G05F1/40

CPC分类号： G06F1/3203

摘要： An audio noise mitigation approach. For one aspect, a first voltage associated with a first power management state is provided. A signal responsive to an indication associated with at least a first type of periodic exit event is received and responsive to the signal, a transition to a second voltage associated with a second state is initiated, a rate of the transition to the second voltage being slower than a similar voltage transition initiated in response to a non-periodic exit event.

摘要翻译： 音频噪声缓解方法。 一方面，提供与第一电源管理状态相关联的第一电压。 接收响应于与至少第一类型的周期性退出事件相关联的指示的信号并且响应于该信号，开始向与第二状态相关联的第二电压的转变，到第二电压的转变的速率较慢 而不是响应于非周期性退出事件而发起的类似电压转换。

公开(公告)号：US07631199B2

公开(公告)日：2009-12-08

申请号：US11173784

申请日：2005-06-30

申请人： James P. Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

发明人： James P. Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/325

摘要： Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.

摘要翻译： 描述了各种方法，装置和系统，其中芯片组控制器具有控制与计算设备中的外围设备的通信的电路。 芯片组控制器具有逻辑配置1）当外围设备连接到芯片组控制器时检测插件事件，以及2）基于逻辑检测来将芯片组控制器从低功耗状态转换到更高功耗状态 插件事件。

公开(公告)号：US07430673B2

公开(公告)日：2008-09-30

申请号：US11173220

申请日：2005-06-30

申请人： James P. Kardach ,  Barnes Cooper ,  Paul Diefenbaugh ,  Seh Kwa ,  Animesh Mishra

发明人： James P. Kardach ,  Barnes Cooper ,  Paul Diefenbaugh ,  Seh Kwa ,  Animesh Mishra

IPC分类号： G06F1/00 ,  G06F1/26 ,  G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G06F1/325 ,  Y02D10/126 ,  Y02D50/20

摘要： A power management system for a computing platform is described. In one embodiment, the power management system provides additional device states which the device controllers of the platform assume when the device controllers are operational but idle. These additional device states are states in which the device controller commits to certain types of inactivity. In another embodiment, the power management system provides additional platform modes which guarantee processor inactivity and/or deference of particular platform events while the mode is in effect.

摘要翻译： 描述了一种用于计算平台的电源管理系统。 在一个实施例中，电源管理系统提供当设备控制器可操作但空闲时，平台的设备控制器假设的附加设备状态。 这些附加设备状态是设备控制器执行某些类型的不活动状态。 在另一个实施例中，电源管理系统提供额外的平台模式，其在模式有效时保证处理器不活动和/或尊重特定平台事件。

公开(公告)号：US20100083013A1

公开(公告)日：2010-04-01

申请号：US12632548

申请日：2009-12-07

申请人： James P. Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

发明人： James P. Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/325

摘要： Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.

摘要翻译： 描述了各种方法，装置和系统，其中芯片组控制器具有控制与计算设备中的外围设备的通信的电路。 芯片组控制器具有逻辑配置1）当外围设备连接到芯片组控制器时检测插件事件，以及2）基于逻辑检测来将芯片组控制器从低功耗状态转换到更高功耗状态 插件事件。

公开(公告)号：US09052893B2

公开(公告)日：2015-06-09

申请号：US12632548

申请日：2009-12-07

申请人： James P. Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

发明人： James P. Kardach ,  Barnes Cooper ,  Seh Kwa ,  Animesh Mishra ,  Paul Diefenbaugh

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/325

摘要： Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.

公开(公告)号：US07281074B2

公开(公告)日：2007-10-09

申请号：US11171833

申请日：2005-06-29

申请人： Paul S. Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie E. Cline

发明人： Paul S. Diefenbaugh ,  James Kardach ,  Barnes Cooper ,  Leslie E. Cline

IPC分类号： G06F13/10 ,  G06F13/38 ,  G06F13/14

CPC分类号： G06F13/24 ,  G06F13/12

摘要： In one embodiment, a data processing system includes, but is not limited to, a processor, a memory coupled to the processor, and a universal serial bus (USB) controller coupled to the processor and the memory. The USB controller includes a local memory to cache at least one activity descriptor of at least a portion of a periodic schedule having multiple frames stored in the main memory. The USB controller defers to service an active USB device described by one of the activity descriptors until a corresponding frame is scheduled to be serviced subsequently. Other methods and apparatuses are also described.

公开(公告)号：US20070002036A1

公开(公告)日：2007-01-04

申请号：US11169509

申请日：2005-06-29

申请人： James Kardach ,  David Williams ,  Achintya Bhowmik ,  Barnes Cooper

发明人： James Kardach ,  David Williams ,  Achintya Bhowmik ,  Barnes Cooper

IPC分类号： G09G5/00

CPC分类号： G09G5/006 ,  G09G3/3648 ,  G09G5/363 ,  G09G2330/021 ,  G09G2340/0435

摘要： Apparatus and systems, as well as methods and articles, may operate to update video display pixels. A video display bus can communicate data to a video display according to specified clock frequencies and a refresh time period. Power conservation can be enhanced by adjusting the specified clock frequencies and/or refresh time period to provide idle time on the video display bus.

摘要翻译： 设备和系统以及方法和物品可以操作来更新视频显示像素。 视频显示总线可以根据指定的时钟频率和刷新时间周期将数据传送到视频显示器。 可以通过调整指定的时钟频率和/或刷新时间来提高功率节省，从而在视频显示总线上提供空闲时间。