公开(公告)号：US06927996B2

公开(公告)日：2005-08-09

申请号：US10676465

申请日：2003-09-30

申请人： James R. Eaton, Jr. ,  Kenneth J. Eldredge

发明人： James R. Eaton, Jr. ,  Kenneth J. Eldredge

IPC分类号： G11C11/15 ,  G11C7/00 ,  G11C7/12 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08

CPC分类号： G11C11/16 ,  G11C7/12

摘要： A magnetic random access memory (MRAM) includes an array of magnetic memory cells arranged on a cross-point grid. Spurious voltages that build up on the stray wiring capacitance of unselected bit and word select lines are limited and discharged by diodes. The control of such spurious voltages improves device operating margins and allows the construction of larger arrays.

摘要翻译： 磁性随机存取存储器（MRAM）包括布置在交叉点网格上的磁存储器单元的阵列。 在未选择位和字选择线的杂散布线电容上形成的杂散电压受到二极管的限制和放电。 这种杂散电压的控制提高了器件工作裕度，并允许构建更大的阵列。

公开(公告)号：US07376004B2

公开(公告)日：2008-05-20

申请号：US10661448

申请日：2003-09-11

申请人： James R. Eaton, Jr. ,  Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

发明人： James R. Eaton, Jr. ,  Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

IPC分类号： G11C11/00 ,  G11C11/14

CPC分类号： G11C11/16

摘要： A method for making magnetic random access memories (MRAM) isolates each and every memory cell in an MRAM array during operation until selected. Some embodiments use series connected diodes for such electrical isolation. Only a selected one of the memory cells will then conduct current between respective ones of the bit and word lines. A better, more uniform distribution of read and data-write data access currents results to all the memory cells. In another embodiment, this improvement is used to increase the number of rows and columns to support a larger data array. In a further embodiment, such improvement is used to increase operating margins and reduce necessary data-write voltages and currents.

摘要翻译： 用于制造磁随机存取存储器（MRAM）的方法在操作期间隔离MRAM阵列中的每个存储单元直到被选择。 一些实施例使用用于这种电隔离的串联连接的二极管。 只有选定的一个存储器单元将在相应的位和字线之间传导电流。 读取和写入数据访问电流的更好，更均匀的分布会导致所有存储单元。 在另一个实施例中，该改进用于增加支持较大数据阵列的行数和列数。 在另一实施例中，这种改进用于增加操作裕度并减少必要的数据写入电压和电流。

公开(公告)号：US20120278684A1

公开(公告)日：2012-11-01

申请号：US13543191

申请日：2012-07-06

申请人： Kenneth J. Eldredge ,  Stephen P. Van Aken

发明人： Kenneth J. Eldredge ,  Stephen P. Van Aken

IPC分类号： G06F12/06 ,  H03M13/05 ,  G06F11/10 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5641

摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.

摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储单元定义多个数据值的目标电荷电平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。

公开(公告)号：US07877564B2

公开(公告)日：2011-01-25

申请号：US11834565

申请日：2007-08-06

申请人： Kenneth J. Eldredge ,  Stephen P. Van Aken

发明人： Kenneth J. Eldredge ,  Stephen P. Van Aken

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5641

摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.

摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储器单元定义多个数据值的目标充电水平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。

公开(公告)号：US07310298B2

公开(公告)日：2007-12-18

申请号：US10849752

申请日：2004-05-20

申请人： Richard L Hilton ,  Kenneth J. Eldredge

发明人： Richard L Hilton ,  Kenneth J. Eldredge

IPC分类号： G11B7/00

CPC分类号： G11B9/1472 ,  B82Y10/00

摘要： A storage device includes a probe and a storage medium having a plurality of storage cells. The probe is able to form a first structure and a second structure in the storage medium, where a first storage cell containing a transition between the first structure and a second structure contains a data bit having a first state, and where a second storage cell not including a transition between the first structure and the second structure contains a data bit having a second state.

摘要翻译： 存储装置包括探针和具有多个存储单元的存储介质。 探针能够在存储介质中形成第一结构和第二结构，其中包含第一结构和第二结构之间的转变的第一存储单元包含具有第一状态的数据位，并且其中第二存储单元不 包括第一结构和第二结构之间的转换包含具有第二状态的数据位。

公开(公告)号：US06873544B2

公开(公告)日：2005-03-29

申请号：US10696826

申请日：2003-10-30

申请人： Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

发明人： Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

IPC分类号： G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  G11C11/00

CPC分类号： G11C11/15 ,  G11C11/16 ,  G11C13/004 ,  G11C27/02 ,  G11C2013/0057

摘要： A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

摘要翻译： 一种包括电阻式存储单元阵列的数据存储装置。 电阻存储单元可以包括磁性隧道结（MTJ）和薄膜二极管。 该装置可以包括电连接到阵列的电路，并且还能够监测流过所选择的存储器单元的信号电流。 一旦已经监视了信号电流，电路就可以将信号电流与平均参考电流进行比较，以确定所选择的存储单元处于第一电阻状态和第二电阻状态。另外，一种操作方法 数据存储设备。

公开(公告)号：US06757188B2

公开(公告)日：2004-06-29

申请号：US10151915

申请日：2002-05-22

申请人： Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

发明人： Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

IPC分类号： G11C1100

CPC分类号： G11C11/15 ,  G11C11/16 ,  G11C13/004 ,  G11C27/02 ,  G11C2013/0057

摘要： A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

公开(公告)号：US20110093761A1

公开(公告)日：2011-04-21

申请号：US12975153

申请日：2010-12-21

申请人： Kenneth J. Eldredge ,  Stephen P. Van Aken

发明人： Kenneth J. Eldredge ,  Stephen P. Van Aken

IPC分类号： H03M13/09 ,  G06F11/16 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5641

摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.

摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储器单元定义多个数据值的目标充电水平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。

公开(公告)号：US07535754B2

公开(公告)日：2009-05-19

申请号：US11264539

申请日：2005-11-01

申请人： Frederick A. Perner ,  Kenneth J. Eldredge

发明人： Frederick A. Perner ,  Kenneth J. Eldredge

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： A memory device and method of reading the memory device is disclosed. The memory device includes a first string of MRAM cells and a second string of MRAM cells. The first string of MRAM cells include a plurality of MRAM cells connected in series and the second string of MRAM cells include another plurality of MRAM cells connected in series. A common connection is controllably connectable to one end of the first string of MRAM cells, and to one end of the second string of MRAM cells.

摘要翻译： 公开了一种读取存储器件的存储器件和方法。 存储器件包括MRAM单元的第一串和MRAM单元的第二串。 MRAM单元的第一串包括串联连接的多个MRAM单元，并且第二串MRAM单元包括串联连接的另外多个MRAM单元。 公共连接可控地连接到MRAM单元的第一串的一端，并连接到第二串MRAM单元的一端。

公开(公告)号：US06671778B2

公开(公告)日：2003-12-30

申请号：US09922436

申请日：2001-08-03

申请人： Steven Louis Naberhuis ,  Kenneth J. Eldredge

发明人： Steven Louis Naberhuis ,  Kenneth J. Eldredge

IPC分类号： G06F1200

CPC分类号： G06F3/0655 ,  G06F3/0625 ,  G06F3/0689 ,  G06F11/1076 ,  G06F2211/1042 ,  G11B9/10 ,  Y02D10/154

摘要： A redundant array of independent storage devices is disclosed herein. The redundant storage device includes one or more atomic resolution storage devices and a control system. The atomic resolution storage device is configured to communicate with the control system as a redundant array of independent storage devices. Each atomic resolution storage device is a non-volatile memory component including a plurality of electron emitters, a medium having medium partitions, and a plurality of micromovers wherein each micromover is independently operable to move a medium partition relative to one or more electron emitters for redundant reading and writing of data at the media.

摘要翻译： 本文公开了独立存储设备的冗余阵列。 冗余存储设备包括一个或多个原子分辨率存储设备和控制系统。 原子分辨率存储装置被配置为作为独立存储装置的冗余阵列与控制系统进行通信。 每个原子分辨率存储装置是包括多个电子发射器，具有介质分隔器的介质和多个小型的非易失性存储器组件，其中每个微型单元可独立地可操作以相对于一个或多个电子发射器移动介质分区用于冗余 在媒体上阅读和写入数据。