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    Conductive path compensation for matching output driver impedance
    3.
    发明授权
    Conductive path compensation for matching output driver impedance 失效
    匹配输出驱动器阻抗的导电路径补偿

    公开(公告)号：US06756858B2

    公开(公告)日：2004-06-29

    申请号：US10015350

    申请日：2001-12-12

    申请人： Jason Gonzalez ,  M. Jason Welch

    发明人： Jason Gonzalez ,  M. Jason Welch

    IPC分类号： H03H740

    CPC分类号： H03H11/30

    摘要： A method for matching output impedance of a driver to a load impedance. In representative embodiments an external impedance is attached between an external contact and a first source potential, wherein the load impedance includes the external impedance plus impedance of interconnections between an output terminal of the driver and the external impedance. An adjustable impedance, which can be field effect transistors which can be turned on separately and in combination to change the value of the adjustable impedance and which can be located on an integrated circuit, are connected between a second source potential and the output terminal of the driver. A reference potential, wherein the reference potential has a value half-way between the first source potential and the second source potential is obtained. And a load matching impedance is obtained by changing the adjustable impedance until the absolute value of the difference between the voltage of the output terminal of the driver and the reference potential is less than a preselected value.

    摘要翻译： 一种将驱动器的输出阻抗与负载阻抗相匹配的方法。 在代表性的实施例中，外部阻抗附着在外部接触件和第一源极电势之间，其中负载阻抗包括驱动器的输出端子与外部阻抗之间的互连的外部阻抗加阻抗。 可调阻抗，其可以是可以单独接通和组合以改变可调阻抗的值并且可以位于集成电路上的场效应晶体管，其连接在第二源电位和第二源电位的输出端之间 司机。 参考电位，其中参考电位具有在第一源极电位和第二源极电位之间的中间值。 并且通过改变可调阻抗直到驱动器的输出端子的电压与参考电位之间的差的绝对值小于预选值来获得负载匹配阻抗。

    Integrated circuit with multi-function controlled impedance output drivers
    4.
    发明授权
    Integrated circuit with multi-function controlled impedance output drivers 有权

    公开(公告)号：US06373300B1

    公开(公告)日：2002-04-16

    申请号：US09753966

    申请日：2001-01-02

    申请人： M. Jason Welch ,  Brian Cardanha

    发明人： M. Jason Welch ,  Brian Cardanha

    IPC分类号： H03B100

    摘要： A multi-function output driver that may be used with at least two types of busses includes a multiplexer that shifts calibration bits to the pull-down transistors. This shifting changes which transistors of the transistor array are turned on when the pull-down drive transistors are driving. By changing which transistors are turned on, the impedance of the driver is changed. This shifting is used with a disable function on the pull-up drive-transistors to allow the driver to be used as an end-of-line termination, an open-drain driver, or as a source-terminated driver.

    Electrically adjustable pulse delay circuit
    6.
    发明授权
    Electrically adjustable pulse delay circuit 失效
    电可调脉冲延时电路

    公开(公告)号：US06469558B1

    公开(公告)日：2002-10-22

    申请号：US09558460

    申请日：2000-04-25

    申请人： Shad R. Shepston ,  M. Jason Welch

    发明人： Shad R. Shepston ,  M. Jason Welch

    IPC分类号： H03H1126

    CPC分类号： H03K5/133 ,  H03K5/08 ,  H03K2005/00058

    摘要： A voltage ramp/threshold variable pulse delay circuit implemented on an IC varies the R instead of the C, which may be fixed. A variable R is formed by a plurality of FET's arranged in parallel. The FET's are sized according to a weighting scheme, which may be binary, and the amount of R produced is determined by which combination of FET's is switched ON, rather than by analog variations in their drive level. If the plurality of sized parallel FET's is made up of individual FET's all of the same polarity, then an undesirable reduction in voltage comparison range will obtain, which may produce an objectionable reduction in available pulse delay if VDD is reduced such that it is no longer many times larger than FET threshold voltage. That reduction in voltage comparison range can be eliminated by replacing each such individual FET with a pair of similarly sized FET's in parallel, the members of which pair are of opposite polarities. The additional FET's have their own drive signals that correspond to the original drive signals.

    摘要翻译： 在IC上实现的电压斜坡/阈值可变脉冲延迟电路改变R而不是可以固定的C。 变量R由并排布置的多个FET形成。 根据加权方案，FET的尺寸可以是二进制的，并且产生的R R的量由FET的组合被接通而不是其驱动电平的模拟变化来确定。 如果多个大小的并联FET由相同极性的单个FET组成，则电压比较范围将不利地减小，如果VDD被减小，则可能产生令人不快的可用脉冲延迟降低 比FET阈值电压多很多倍。 可以通过用一对类似尺寸的FET并联来替换每个这样的单个FET来消除电压比较范围的减小，其中成对具有相反的极性。 额外的FET具有与原始驱动信号对应的自己的驱动信号。

    Method for increasing power supply bypassing while decreasing chip layer density variations
    7.
    发明授权
    Method for increasing power supply bypassing while decreasing chip layer density variations 失效
    增加电源旁路同时降低芯片层密度变化的方法

    公开(公告)号：US6118169A

    公开(公告)日：2000-09-12

    申请号：US204021

    申请日：1998-12-01

    申请人： Paul D Nuber ,  Dan Stotz ,  M. Jason Welch ,  Stephen E. Clarke ,  Guy H. Humphrey ,  C. Stephen Dondale

    发明人： Paul D Nuber ,  Dan Stotz ,  M. Jason Welch ,  Stephen E. Clarke ,  Guy H. Humphrey ,  C. Stephen Dondale

    IPC分类号： H01L27/04 ,  H01L21/77 ,  H01L21/822 ,  H01L27/118

    CPC分类号： H01L27/118

    摘要： A method for increasing the layer density uniformity across a conductive layer, which comprises a plurality of functional blocks, of an integrated circuit is presented. Increased uniformity is achieved by tiling a plurality of capacitors in between the functional blocks. The configuration of the capacitor array and number of the capacitor cells in the array is arranged so as to provide approximate uniformity in the conductor-to-non-conductor density across the entire conductive layer. The capacitor array may be used to reduce power supply switching noise by coupling one or more of the capacitor cells making up the capacitor array between a high power rail and a low power rail.

    摘要翻译： 提出了一种用于增加集成电路的包括多个功能块的导电层之间的层密度均匀性的方法。 通过在功能块之间平铺多个电容器来实现均匀性的提高。 布置电容器阵列的配置和阵列中的电容器单元的数量，以便在整个导电层上提供导体与非导体密度的近似均匀性。 电容器阵列可以用于通过将构成电容器阵列的一个或多个电容器单元耦合在高功率轨道和低功率轨道之间来降低电源开关噪声。

    System and method for dynamic modification of integrated circuit functionality
    8.
    发明授权
    System and method for dynamic modification of integrated circuit functionality 失效
    用于动态修改集成电路功能的系统和方法

    公开(公告)号：US06614260B1

    公开(公告)日：2003-09-02

    申请号：US09627696

    申请日：2000-07-28

    申请人： M. Jason Welch ,  Paul D Nuber

    发明人： M. Jason Welch ,  Paul D Nuber

    IPC分类号： H03K19177

    CPC分类号： H03K19/17776 ,  H03K19/17732 ,  H03K19/17752 ,  H03K19/17756

    摘要： Programmable circuit blocks and programmable interconnection blocks are utilized to effectively modify the functionality of a section of the IC. The use of a fixed ion beam machine or similar device is unnecessary, allowing functional modifications of the IC by way of electrically programming the device. As a result, the IC designer is not limited in the number of ICs that may be modified, which facilitates faster testing of IC design changes. Also, an IC may be modified multiple times by simply reprogramming the device.

    摘要翻译： 可编程电路块和可编程互连块被用于有效地修改IC的一部分的功能。 使用固定离子束机器或类似装置是不必要的，通过电气编程器件来实现IC的功能修改。 因此，IC设计人员不受限于可修改的IC数量，这有助于更快速地对IC设计变更进行测试。 此外，可以通过简单地重新编程器件来修改IC多次。

    Multi-function controlled impedance output driver
    9.
    发明授权
    Multi-function controlled impedance output driver 有权
    多功能控制阻抗输出驱动器

    公开(公告)号：US06194924B1

    公开(公告)日：2001-02-27

    申请号：US09298228

    申请日：1999-04-22

    申请人： M. Jason Welch ,  Brian Cardanha

    发明人： M. Jason Welch ,  Brian Cardanha

    IPC分类号： H03B100

    CPC分类号： H03K19/0005

    摘要： A multi-function output driver that may be used with at least two types of busses includes a multiplexer that shifts calibration bits to the pull-down transistors. This shifting changes which transistors of the transistor array are turned on when the pull-down drive transistors are driving. By changing which transistors are turned on, the impedance of the driver is changed. This shifting is used with a disable function on the pull-up drive-transistors to allow the driver to be used as an end-of-line termination, an open-drain driver, or as a source-terminated driver.

    摘要翻译： 可以与至少两种类型的总线一起使用的多功能输出驱动器包括将校准位移位到下拉晶体管的多路复用器。 当下拉驱动晶体管正在驱动时，该移位改变晶体管阵列的晶体管导通。 通过改变哪些晶体管导通，改变驱动器的阻抗。 这种转换与上拉驱动晶体管上的禁用功能一起使用，以允许驱动器用作线路终端终端，开漏驱动器或源终端驱动器。