公开(公告)号：US20070011223A1

公开(公告)日：2007-01-11

申请号：US11133477

申请日：2005-05-18

申请人： Jean Calvignac ,  Chih-jen Chang ,  Joseph Logan ,  Fabrice Verplanken ,  Daniel Wind

发明人： Jean Calvignac ,  Chih-jen Chang ,  Joseph Logan ,  Fabrice Verplanken ,  Daniel Wind

IPC分类号： G06F15/16

CPC分类号： H04L47/527 ,  H04L47/50 ,  H04L47/522 ,  H04L47/568 ,  H04L47/58

摘要： A network processor dataflow chip and method for flexible dataflow are provided. The dataflow chip comprises a plurality of on-chip data transmission and scheduling circuit structures. The data transmission and scheduling circuit structures are selected responsive to indicators. Data transmission circuit structures may comprise selectable frame processing and data transmission functions. Selectable frame processing may comprise cut and paste, full dispatch and store and dispatch frame processing. Scheduling functions include full internal scheduling, calendar scheduling in communication with an external scheduler, and external calendar scheduling. In another aspect of the present invention, data transmission functions may comprise low latency and normal latency external processor interfaces for selectively providing privileged access to dataflow chip resources.

摘要翻译： 提供了一种用于灵活数据流的网络处理器数据流芯片和方法。 数据流芯片包括多个片上数据传输和调度电路结构。 响应于指标选择数据传输和调度电路结构。 数据传输电路结构可以包括可选择的帧处理和数据传输功能。 可选择的帧处理可以包括剪切和粘贴，完全调度和存储和调度帧处理。 调度功能包括完整的内部调度，与外部调度器进行通信的日历调度以及外部日历调度。 在本发明的另一方面，数据传输功能可以包括用于选择性地提供对数据流芯片资源的特权访问的低延迟和正常等待时间的外部处理器接口。

公开(公告)号：US20060215677A1

公开(公告)日：2006-09-28

申请号：US11091245

申请日：2005-03-28

申请人： Claude Basso ,  Jean Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Joseph Logan ,  Fabrice Verplanken

发明人： Claude Basso ,  Jean Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Joseph Logan ,  Fabrice Verplanken

IPC分类号： H04L12/26 ,  H04L12/56

CPC分类号： H04L12/5601 ,  H04L49/90 ,  H04L2012/5642 ,  H04L2012/5652 ,  H04L2012/5658 ,  H04L2012/5681

摘要： A communication network used to link information handling systems together utilizes a switching network to transmit data among senders and receivers. Each individual packet of data is described and controlled by an FCB. The bandwidth associated with the storing and distribution of data is optimized by chaining the data packets in different types of queues, or operating without chaining outside a queue. When a frame is in an output queue, the third word contains an RFCBA for egress of the frame to a line port, and an MCID for ingress from an output queue to a switch port. The RFCBA and the MCID have multicast capabilities. The format does not require a third word when a frame is in an input queue.

摘要翻译： 用于将信息处理系统链接在一起的通信网络利用交换网络在发送者和接收者之间传送数据。 每个单独的数据包由FCB描述和控制。 与存储和分发数据相关联的带宽通过将数据分组链接在不同类型的队列中进行优化，或者在不在队列外链接的情况下运行。 当帧位于输出队列中时，第三个字包含用于将帧从线路端口排出的RFCBA，以及用于从输出队列进入交换机端口的MCID。 RFCBA和MCID具有多播功能。 当帧在输入队列中时，格式不需要第三个字。

公开(公告)号：US20060209827A1

公开(公告)日：2006-09-21

申请号：US11070060

申请日：2005-03-02

申请人： Jean Calvignac ,  Chih-jen Chang ,  Joseph Logan ,  Fabrice Verplanken

发明人： Jean Calvignac ,  Chih-jen Chang ,  Joseph Logan ,  Fabrice Verplanken

IPC分类号： H04L12/56 ,  H04L12/28

CPC分类号： H04L49/901 ,  H04L49/90

摘要： Systems and methods for implementing counters in a network processor with cost effective memory are disclosed. Embodiments include systems and methods for implementing counters in a network processor using less expensive memory such as DRAM. A network processor receives packets and implements accounting functions including counting packets in each of a plurality of flow queues. Embodiments include a counter controller that may increment counter values more than once during a R-M-W cycle. Each time a counter controller receives a request to update a counter during a R-M-W cycle that has been initiated for the counter, the counter controller increments the counter value received from memory. The incremented value is written to memory during the write cycle of the R-M-W cycle. A write disable unit disables writes that would otherwise occur during R-M-W cycles initiated for the counter during the earlier initiated R-M-W cycle.

摘要翻译： 公开了在具有成本效益的存储器的网络处理器中实现计数器的系统和方法。 实施例包括用于在使用诸如DRAM的廉价存储器的网络处理器中实现计数器的系统和方法。 网络处理器接收分组并实现计费功能，包括在多个流队列中的每一个中计数分组。 实施例包括可以在R-M-W周期期间多次增加计数器值的计数器控制器。 每当计数器控制器在已经为计数器启动的R-M-W周期期间接收到更新计数器的请求时，计数器控制器增加从存储器接收的计数器值。 在R-M-W周期的写周期期间，递增的值被写入存储器。 写禁止单元禁用在较早启动的R-M-W周期期间为计数器启动的R-M-W周期期间将发生的写入。

公开(公告)号：US20060101172A1

公开(公告)日：2006-05-11

申请号：US11320277

申请日：2005-12-27

申请人： Claude Basso ,  Jean Calvignac ,  Marco Heddes ,  Joseph Logan ,  Fabrice Verplanken

发明人： Claude Basso ,  Jean Calvignac ,  Marco Heddes ,  Joseph Logan ,  Fabrice Verplanken

IPC分类号： G06F5/00

CPC分类号： H04L49/901 ,  H04L49/103 ,  H04L49/3018 ,  H04L49/90 ,  H04L49/9094

摘要： A method and structure for determining when a frame of information comprised of one or more buffers of data being transmitted in a network processor has completed transmission is provided. The network processor includes several control blocks, one for each data buffer, each containing control information linking one buffer to another. Each control block has a last bit feature which is a single bit settable to “one or “zero” and indicates the transmission of when the data buffer having the last bit. The last bit is in a first position when an additional data buffer is to be chained to a previous data buffer indicating an additional data buffer is to be transmitted and a second position when no additional data buffer is to be chained to a previous data buffer. The position of the last bit is communicated to the network processor indicating the ending of a particular frame.

摘要翻译： 提供了一种用于确定在网络处理器中正在发送的一个或多个数据缓冲器组成的信息帧何时完成传输的方法和结构。 网络处理器包括几个控制块，每个数据缓冲器一个，每个包含将一个缓冲器链接到另一个的控制信息。 每个控制块具有最后一位特征，其是可设置为“一个或”零“的单个位，并且指示何时数据缓冲器具有最后位，当最后一位处于第一位置时，当附加数据缓冲器为 被链接到先前的数据缓冲器，指示要发送附加数据缓冲器，并且当没有附加数据缓冲器被链接到先前的数据缓冲器时的第二位置，最后位的位置被传送到指示结束的网络处理器 的特定框架。

公开(公告)号：US20070002172A1

公开(公告)日：2007-01-04

申请号：US11469390

申请日：2006-08-31

申请人： Jean Calvignac ,  Marco Heddes ,  Joseph Logan ,  Fabrice Verplanken

发明人： Jean Calvignac ,  Marco Heddes ,  Joseph Logan ,  Fabrice Verplanken

IPC分类号： H04N11/00

CPC分类号： H04L49/3081 ,  G06F13/4243 ,  H04L2012/5681

摘要： A method and system for reducing memory accesses by inserting qualifiers in control blocks. In one embodiment, a system comprises a processor configured to process frames of data. The processor may comprise a plurality of buffers configured to store frames of data where each frame of data may be associated with a frame control block. Each frame control block associated with a frame of data may be associated with one or more buffer control blocks. Each control block, e.g., frame control block, buffer control block, may comprise one or more qualifier fields that comprise information unrelated to the current control block. Instead, qualifiers may comprise information related to an another control block. The last frame control block in a queue as well as the last buffer control block associated with a frame control block may comprise fields with no information thereby reducing memory accesses to access information in those fields.

摘要翻译： 一种通过在控制块中插入限定符来减少存储器访问的方法和系统。 在一个实施例中，系统包括被配置为处理数据帧的处理器。 处理器可以包括多个缓冲器，其被配置为存储数据帧，其中每个数据帧可以与帧控制块相关联。 与数据帧相关联的每个帧控制块可以与一个或多个缓冲器控制块相关联。 每个控制块，例如帧控制块，缓冲器控制块，可以包括包含与当前控制块无关的信息的一个或多个限定符字段。 相反，限定符可以包括与另一个控制块有关的信息。 队列中的最后帧控制块以及与帧控制块相关联的最后一个缓冲器控制块可以包括没有信息的字段，从而减少对这些字段中的访问信息的存储器访问。

公开(公告)号：US20060229629A1

公开(公告)日：2006-10-12

申请号：US11353711

申请日：2006-02-13

申请人： Richard Manzi ,  Joseph Logan ,  Steven Wysocki ,  Frank Bono ,  Spanky Raymond

发明人： Richard Manzi ,  Joseph Logan ,  Steven Wysocki ,  Frank Bono ,  Spanky Raymond

IPC分类号： A61B17/58

CPC分类号： A61B17/8852 ,  A61B17/025 ,  A61B17/1285 ,  A61B2017/0256 ,  A61F2/4455

摘要： An apparatus and method for distracting, in a given direction, and supporting two tissue surfaces is provided. A plurality of wafers are consecutively inserted using a wafer insertion apparatus between the two tissue surfaces to create a column of wafers. A detachable wafer assembly is provided that includes a base wafer initially associated with a track assembly of a wafer insertion apparatus. The base wafer is dislodged from the track assembly so that the base wafer is left within the distraction site as the track assembly is removed. A top cap wafer is provided that is situated at the top of the wafer stack, in which the top cap wafer is larger than the remaining wafers to form a gap surrounding the stack to receive biologic material.

摘要翻译： 提供了一种用于在给定方向上分散并支撑两个组织表面的装置和方法。 使用在两个组织表面之间的晶片插入装置连续地插入多个晶片以产生晶片列。 提供了一种可拆卸的晶片组件，其包括最初与晶片插入装置的轨道组件相关联的基底晶片。 底座晶片从轨道组件移出，使得当轨道组件被移除时，基底晶片留在牵引位置内。 提供顶盖晶片，其位于晶片堆叠的顶部，其中顶盖晶片大于其余晶片，以形成围绕堆叠以接收生物材料的间隙。

公开(公告)号：US20060058880A1

公开(公告)日：2006-03-16

申请号：US11211347

申请日：2005-08-25

申请人： Steve Wysocki ,  Joseph Logan ,  Richard Manzi ,  Robert Paxson ,  John Pafford ,  Mark LoGuidice ,  Tyler Lipschultz ,  Carl Nilsson ,  Daniel Savage

发明人： Steve Wysocki ,  Joseph Logan ,  Richard Manzi ,  Robert Paxson ,  John Pafford ,  Mark LoGuidice ,  Tyler Lipschultz ,  Carl Nilsson ,  Daniel Savage

IPC分类号： A61F2/44 ,  A61B17/88 ,  A61F2/46

CPC分类号： A61F2/447 ,  A61B2017/0256 ,  A61F2/442 ,  A61F2/4425 ,  A61F2/4455 ,  A61F2/4465 ,  A61F2/4611 ,  A61F2002/30383 ,  A61F2002/30476 ,  A61F2002/30492 ,  A61F2002/3052 ,  A61F2002/30556 ,  A61F2002/30599 ,  A61F2002/30601 ,  A61F2002/30904 ,  A61F2002/448 ,  A61F2220/0025 ,  A61F2250/0009 ,  A61F2250/0063

摘要： An expandable interbody fusion device for implantation into the intradiscal space between two opposing vertebral bodies of a spine comprises a superior endplate member having an upper surface for engaging a superior vertebral body in a spine, and an inferior endplate member having a lower surface for engaging an inferior vertebral body in the spine. The superior endplate member and the inferior endplate member are releasably coupled and define a cavity therebetween. At least one expansion member is configured to be introduced into the cavity to move the superior endplate and the inferior endplate members relatively apart upon introduction and to thereby decouple the superior endplate member and the inferior endplate member. An inserter may be releasably coupled to the device to facilitate insertion of the device as well as to provide a track for insertion of the expansion members.

摘要翻译： 用于植入脊柱的两个相对椎体之间的椎间盘内空间的可扩展的椎体间融合装置包括具有用于与脊柱中的上椎体接合的上表面的上端板构件，以及具有下表面的下端板构件 脊椎下椎体。 上端板构件和下端板构件可释放地联接并且在它们之间限定空腔。 至少一个膨胀构件被构造成引入空腔中，以在引入时使上端板和下端板构件相对分开，从而使上端板构件和下端板构件分离。 插入器可以可释放地联接到装置以便于装置的插入以及提供用于插入扩张构件的轨道。

公开(公告)号：US20050003322A1

公开(公告)日：2005-01-06

申请号：US10655781

申请日：2003-09-05

申请人： Joseph Logan ,  Raymond Knox

发明人： Joseph Logan ,  Raymond Knox

IPC分类号： A61C13/15 ,  A61N5/06 ,  B29C35/08 ,  G02B6/42 ,  A61C3/00

CPC分类号： A61C19/004 ,  A61N2005/0652 ,  B29C35/08 ,  B29C2035/0833 ,  G02B6/4298 ,  Y10S362/80

摘要： An instrument and method for curing light-curable compounds in the mouth of a patient, the instrument comprising a housing and a plurality of solid state, light-emitting elements on a substrate supported by the housing. The elements form a collective array on the substrate operable for collectively emitting light having wavelengths within a narrow band of wavelengths. An optical focusing device is positioned to intercept the light emitted by the array of elements and includes a non-imaging optical device which is operable for collimating the light from the array into a beam to be directed onto a compound for curing the compound. A disposable sleeve covers the housing and array and may incorporate the optical focusing device. The sleeve is removed and discarded after use to eliminate the need to autoclave the instrument.

摘要翻译： 一种用于固化患者口腔中的光可固化化合物的仪器和方法，所述仪器包括壳体和在由所述壳体支撑的基底上的多个固态发光元件。 这些元件在基板上形成集体阵列，可操作用于共同发射具有在窄波段范围内的波长的光。 光学聚焦装置被定位成截取由元件阵列发射的光，并且包括非成像光学装置，其可操作用于将来自阵列的光准直成束以引导到用于固化化合物的化合物上。 一次性套管覆盖壳体和阵列，并且可以结合光学聚焦装置。 套管在使用后取出并丢弃，以消除对仪器进行高压灭菌的需要。

公开(公告)号：US20080063009A1

公开(公告)日：2008-03-13

申请号：US11934810

申请日：2007-11-05

申请人： Kerry Imming ,  John Irish ,  Joseph Logan ,  Tolga Ozguner ,  Michael Siegel

发明人： Kerry Imming ,  John Irish ,  Joseph Logan ,  Tolga Ozguner ,  Michael Siegel

IPC分类号： H04J3/16

CPC分类号： H04L49/901 ,  H04L49/90

摘要： A method, apparatus and computer program product are provided for implementing a pointer and stake model for frame alteration code in a network processor. A current pointer and a stake are provided for a packet selected for transmit. The current pointer is maintained for tracking a current position for frame alteration operations in the packet. The stake is maintained for tracking a start of a current header for frame alteration operations in the packet. The current pointer is used by frame alteration code instructions to specify a sequence of operations relative to the current pointer. The specified frame alteration sequence is compact in terms of code size to operate on data within a small window of bytes. Advance pointer instructions allow the current and stake pointers to be advanced an arbitrary number of bytes into the packet.

摘要翻译： 提供了一种方法，装置和计算机程序产品，用于在网络处理器中实现用于帧改变码的指针和拍摄模型。 为选择用于发送的分组提供当前指针和分支。 保持当前指针用于跟踪分组中帧更改操作的当前位置。 保留该批次用于跟踪该分组中的帧更改操作的当前报头的开始。 当前指针由帧改变代码指令使用以指定相对于当前指针的操作序列。 指定的帧改变序列在代码大小方面是紧凑的，以便在小的字节窗口内对数据进行操作。 高级指针指令允许当前和指针指针以任意数量的字节进入数据包。

公开(公告)号：US20070191674A1

公开(公告)日：2007-08-16

申请号：US11787850

申请日：2007-04-18

申请人： Christopher Zirps ,  Timothy Membrino ,  David Copeland ,  Sean Silva ,  Eric Mears ,  Joseph Logan ,  Stephen Yardan

发明人： Christopher Zirps ,  Timothy Membrino ,  David Copeland ,  Sean Silva ,  Eric Mears ,  Joseph Logan ,  Stephen Yardan

IPC分类号： A61B1/00

CPC分类号： A61B17/12013 ,  A61B1/00039 ,  A61B1/00087 ,  A61B1/00133 ,  A61B1/0014 ,  A61B1/018 ,  A61B2017/00296 ,  A61B2017/00367 ,  A61B2017/0042 ,  A61B2017/12018

摘要： The present invention provides an endoscopic accessory control system that resides externally of the endoscope. The system comprises the endoscopic accessory with a working end to be placed at the distal end of the endoscope, a control sheath extending proximally external to the endoscope and a control handle joined to the proximal end of the control sheath. The control handle is slidably mounted to the exterior surface of the endoscope shaft and is configured to permit grasping of both the shaft and the handle. With the control handle and endoscope shaft grasped with one hand, the other hand of the user is left free to manipulate the endoscope distal tip controls. Additionally, the external arrangement of the control sheath leaves the working channel of the endoscope free for use of accessories or operations.

摘要翻译： 本发明提供一种位于内窥镜外部的内窥镜附件控制系统。 该系统包括具有放置在内窥镜的远端的工作端的内窥镜附件，在内窥镜外部向近侧延伸的控制护套和连接到控制护套的近端的控制手柄。 所述控制手柄可滑动地安装在所述内窥镜轴的外表面上，并且构造成能够抓住所述轴和所述手柄。 用一只手握住控制手柄和内窥镜轴，使用者的另一只手可以自由地操纵内窥镜远端尖端控制。 此外，控制护套的外部布置使得内窥镜的工作通道免于使用附件或操作。