公开(公告)号：US08476692B2

公开(公告)日：2013-07-02

申请号：US13037502

申请日：2011-03-01

申请人： Jeeyong Kim ,  WoonKyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

发明人： Jeeyong Kim ,  WoonKyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

IPC分类号： H01L29/778

CPC分类号： H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 半导体器件包括形成在衬底上的电荷存储图案; 形成在电荷存储图案上的电介质图案; 第一导电图案，包括掺杂有第一浓度的第一杂质的硅，所述第一导电图案设置在所述电介质图案上; 以及第二导电图案，其包括掺杂有第二浓度的第二杂质的金属硅化物，所述第二导电图案设置在所述第一导电图案上。 第一浓度可能高于第二浓度。

公开(公告)号：US20110215392A1

公开(公告)日：2011-09-08

申请号：US13037502

申请日：2011-03-01

申请人： Jeeyong Kim ,  WoonKyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

发明人： Jeeyong Kim ,  WoonKyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

IPC分类号： H01L29/788 ,  H01L21/28 ,  H01L23/48 ,  H01L29/792

CPC分类号： H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 半导体器件包括形成在衬底上的电荷存储图案; 形成在电荷存储图案上的电介质图案; 第一导电图案，包括掺杂有第一浓度的第一杂质的硅，所述第一导电图案设置在所述电介质图案上; 以及第二导电图案，其包括掺杂有第二浓度的第二杂质的金属硅化物，所述第二导电图案设置在所述第一导电图案上。 第一浓度可能高于第二浓度。

公开(公告)号：US20150145018A1

公开(公告)日：2015-05-28

申请号：US14568737

申请日：2014-12-12

申请人： Jeeyong Kim ,  Woonkyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

发明人： Jeeyong Kim ,  Woonkyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

IPC分类号： H01L29/49 ,  H01L27/115 ,  H01L29/788

CPC分类号： H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 半导体器件包括形成在衬底上的电荷存储图案; 形成在电荷存储图案上的电介质图案; 第一导电图案，包括掺杂有第一浓度的第一杂质的硅，所述第一导电图案设置在所述电介质图案上; 以及第二导电图案，其包括掺杂有第二浓度的第二杂质的金属硅化物，所述第二导电图案设置在所述第一导电图案上。 第一浓度可能高于第二浓度。

公开(公告)号：US09443863B2

公开(公告)日：2016-09-13

申请号：US14819841

申请日：2015-08-06

申请人： Jeeyong Kim ,  Woonkyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

发明人： Jeeyong Kim ,  Woonkyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

IPC分类号： H01L29/49 ,  H01L27/115 ,  H01L23/535 ,  H01L29/78 ,  H01L21/28 ,  H01L23/48 ,  H01L29/788 ,  H01L29/792 ,  H01L21/768

CPC分类号： H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

公开(公告)号：US09129950B2

公开(公告)日：2015-09-08

申请号：US14568737

申请日：2014-12-12

申请人： Jeeyong Kim ,  Woonkyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

发明人： Jeeyong Kim ,  Woonkyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

IPC分类号： H01L29/49 ,  H01L21/28 ,  H01L23/48 ,  H01L29/788 ,  H01L29/792 ,  H01L21/768 ,  H01L27/115

CPC分类号： H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 半导体器件包括形成在衬底上的电荷存储图案; 形成在电荷存储图案上的电介质图案; 第一导电图案，包括掺杂有第一浓度的第一杂质的硅，所述第一导电图案设置在所述电介质图案上; 以及第二导电图案，其包括掺杂有第二浓度的第二杂质的金属硅化物，所述第二导电图案设置在所述第一导电图案上。 第一浓度可能高于第二浓度。

公开(公告)号：US20120181693A1

公开(公告)日：2012-07-19

申请号：US13241741

申请日：2011-09-23

申请人： Jeeyong Kim ,  Jong-Hyun Park ,  Jin-Kyu Kang ,  Joonhee Lee

发明人： Jeeyong Kim ,  Jong-Hyun Park ,  Jin-Kyu Kang ,  Joonhee Lee

IPC分类号： H01L23/532

CPC分类号： H01L23/5226 ,  H01L21/76834 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L23/53285 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device may include an upper interconnection on a substrate and an anti-reflection pattern disposed on the upper interconnection. The anti-reflection pattern may include a compound including a metal, carbon and nitrogen.

摘要翻译： 半导体器件可以包括在衬底上的上互连和设置在上互连上的抗反射图案。 抗反射图案可以包括包含金属，碳和氮的化合物。

公开(公告)号：US20060157711A1

公开(公告)日：2006-07-20

申请号：US11324669

申请日：2006-01-03

申请人： Jin-Kyu Kang

发明人： Jin-Kyu Kang

IPC分类号： H01L29/04

CPC分类号： H01L27/1296

摘要： A thin film transistor (TFT) array display panel is provided, which includes: a substrate; a plurality of semiconductor islands formed on the substrate (including a plurality of transistor source, channel, and drain regions); a gate insulating layer covering the semiconductor islands; a plurality of gate lines (including gate electrodes overlapping the channel regions) formed on the gate insulating layer; a plurality of data lines connected to the source regions and formed on the gate insulating layer; and a plurality of pixel electrodes connected to the drain regions. the number or at grain boundaries of the portion of the semiconductor that is selected as the gate region is varied (different, unequal) among the semiconductors in the same column of the array which prevents visible stripes due to current leakage caused by protrusions. The position of each semiconductor island (e.g., relative to one of the data lines) is varied (e.g., randomly) among semiconductors in the same column of the array. Alternatively, the position of the gate electrode which defines the gate region of the semiconductor island is varied (e.g., randomly) among uniformly positioned semiconductors in the same column of the array.

摘要翻译： 提供薄膜晶体管（TFT）阵列显示面板，其包括：基板; 形成在基板上的多个半导体岛（包括多个晶体管源极，沟道和漏极区）; 覆盖半导体岛的栅极绝缘层; 形成在栅极绝缘层上的多条栅极线（包括与沟道区重叠的栅极） 连接到源极区并形成在栅极绝缘层上的多条数据线; 以及与漏极区域连接的多个像素电极。 选择为栅极区域的半导体部分的数量或晶粒边界在阵列的同一列中的半导体之间变化（不同，不相等），防止由于突起导致的电流泄漏引起的可见条纹。 每个半导体岛的位置（例如，相对于数据线之一）在阵列的同一列中的半导体之间变化（例如，随机）。 或者，限定半导体岛的栅极区域的栅电极的位置在阵列的同一列中的均匀定位的半导体中变化（例如，随机）。

公开(公告)号：US20060231846A1

公开(公告)日：2006-10-19

申请号：US11455367

申请日：2006-06-19

申请人： Mun-Pyo Hong ,  Wan-Shick Hong ,  Sang-Il Kim ,  Soo-Guy Rho ,  Jin-Kyu Kang ,  Snag-Gab Kim

发明人： Mun-Pyo Hong ,  Wan-Shick Hong ,  Sang-Il Kim ,  Soo-Guy Rho ,  Jin-Kyu Kang ,  Snag-Gab Kim

IPC分类号： H01L33/00

CPC分类号： G02F1/136227 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/136222 ,  H01L27/12 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908

摘要： A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode. A data wire including a source electrode and a drain electrode that are made of a same layer on the ohmic contact layers and separated from each other, and a data line connected to the source electrode and defining the pixels of a matrix array by crossing the gate line is formed on the gate insulating layer. A passivation layer covering the data wire and having contact holes exposing the gate pad and the data pad is formed, and a pixel wire including a pixel electrode, a redundant gate pad, a redundant data pad that are respectively connected to the drain electrode, the gate pad and the data pad through the contact holes.

摘要翻译： 形成在显示区域中具有矩阵阵列的像素的开口的黑矩阵，包括公共焊盘和公共信号线的公共线，以及外围区域中的栅极焊盘以及外部区域中的对准键来对准层间薄膜 在绝缘基板上。 在绝缘基板上的像素处形成与黑矩阵重叠的边缘的红色，蓝色和绿色滤色片，并且在其上形成覆盖黑矩阵和滤色器并且具有暴露栅极接触孔的接触孔的有机绝缘层 。 在有机绝缘层上形成包括通过接触孔连接到栅极焊盘的栅极线和连接到栅极线的栅极的栅极线，并且在有机绝缘层上形成覆盖栅极线的栅极绝缘层。 半导体图案和欧姆接触层依次形成在栅电极的栅极绝缘层上。 一种数据线，包括在欧姆接触层上由相同层制成并彼此分离的源电极和漏电极，以及连接到源电极并通过跨越栅极定义矩阵阵列的像素的数据线 线形成在栅极绝缘层上。 形成覆盖数据线并具有露出栅极焊盘和数据焊盘的接触孔的钝化层，并且包括分别连接到漏电极的像素电极，冗余栅极焊盘，冗余数据焊盘的像素线， 栅极焊盘和数据焊盘通过接触孔。

公开(公告)号：US09679659B2

公开(公告)日：2017-06-13

申请号：US14859637

申请日：2015-09-21

申请人： Sunil Shim ,  Joon-sung Lim ,  Jin-Kyu Kang ,  Euido Kim ,  Jang-Gn Yun

发明人： Sunil Shim ,  Joon-sung Lim ,  Jin-Kyu Kang ,  Euido Kim ,  Jang-Gn Yun

IPC分类号： G11C16/04 ,  G11C16/16 ,  G11C16/34 ,  G11C11/56

CPC分类号： G11C16/16 ,  G11C11/5635 ,  G11C16/3445

摘要： An operating method of a nonvolatile memory device is provided which sequentially performs a plurality of erase loops to erase at least one of a plurality of memory blocks. The operating method comprises performing at least one of the plurality of erase loops; performing a post-program operation on the at least one memory block after the at least one erase loop is executed; and performing remaining erase loops of the plurality of erase loops. The post-program operation is not performed when each of the remaining erase loops is executed.

公开(公告)号：US08237156B2

公开(公告)日：2012-08-07

申请号：US12662583

申请日：2010-04-23

申请人： Jin-Kyu Kang

发明人： Jin-Kyu Kang

IPC分类号： H01L35/24

CPC分类号： H01L27/326 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3246 ,  H01L27/3262 ,  H01L27/3265

摘要： Provided are an organic light emitting display device and a method of manufacturing the same. The organic light emitting display device includes a substrate; at least one thin film transistor including a gate electrode including a metal oxide layer and a metal layer, a semiconductor layer including source/drain regions and a channel layer; at least one capacitor including a first electrode formed on a layer on which the gate electrode is formed by using a material forming the gate electrode, and a second electrode formed on a layer on which the source/drain electrodes are formed by using a material used to form the source/drain electrodes; and at least one organic light emitting device including a pixel electrode formed on a layer on which the gate electrode is formed by using a material used to form the gate electrode and connected to the source/drain electrodes via a contact hole.

摘要翻译： 提供一种有机发光显示装置及其制造方法。 有机发光显示装置包括：基板; 包括包括金属氧化物层和金属层的栅电极的至少一个薄膜晶体管，包括源极/漏极区域和沟道层的半导体层; 至少一个电容器，包括通过使用形成栅电极的材料形成在其上形成栅电极的层上的第一电极和形成在其上通过使用所使用的材料形成源/漏电极的层上的第二电极 以形成源极/漏极; 以及至少一个有机发光器件，其包括通过使用用于形成栅电极并通过接触孔连接到源/漏电极的材料形成在其上形成栅电极的层上的像素电极。