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公开(公告)号：US10101660B2
公开(公告)日：2018-10-16
申请号：US15345910
申请日：2016-11-08
申请人： Jeong-Ju Park , Seung-Chul Kwon , Eun-Sung Kim , Kyeong-Mi Lee , Shi-Yong Yi , Tsuyosh Kurosawa , Katsumi Ohmori , Tasuku Matsumiya
发明人： Jeong-Ju Park , Seung-Chul Kwon , Eun-Sung Kim , Kyeong-Mi Lee , Shi-Yong Yi , Tsuyosh Kurosawa , Katsumi Ohmori , Tasuku Matsumiya
IPC分类号： G03F7/004 , G03F7/16 , H01L27/108 , C08F20/28 , B82Y10/00 , B82Y40/00 , C08L53/00 , G03F7/20 , G03F7/00 , G03F7/40 , H01L21/033 , H01L21/311 , H01L21/3213 , H01L49/02
摘要： In a method of forming patterns, an object layer is formed on a substrate. Guide patterns are formed on the object layer. A brush layer is formed using a brush polymer on surfaces of the guide patterns. The brush polymer includes at least one of a first brush polymer and a second brush polymer. The first brush polymer includes a hydrophobic repeating unit and a hydrophilic terminal group having at least two hydroxyl groups. The second brush polymer includes a hydrophobic repeating unit and a hydrophilic random repeating unit having a hydroxyl group. A self-aligned layer is formed using a block copolymer on the brush layer to form blocks aligned around the guide patterns. At least a portion of the blocks is transferred to the object layer.
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公开(公告)号：US20110312183A1
公开(公告)日：2011-12-22
申请号：US13217544
申请日：2011-08-25
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
IPC分类号： H01L21/306 , H01L21/31
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
摘要翻译： 为了在集成电路制造期间进行图案化，形成第一掩模结构的第一图案，并且在第一掩模结构的暴露表面上形成缓冲层。 此外，在第一掩蔽结构的侧壁处的缓冲层之间的凹部中形成第二掩模结构的第二图案。 此外，第一掩模结构和掩模结构由各自含高含碳材料的旋涂形成。 这样的第一和第二掩模结构以比传统光刻法更高的间距对目标层进行图案化。
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公开(公告)号：US20090155725A1
公开(公告)日：2009-06-18
申请号：US12283449
申请日：2008-09-12
申请人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
发明人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
IPC分类号： G03F7/20
CPC分类号： H01L21/0332 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
摘要翻译： 为了在集成电路制造期间进行图案化，图像层被激活用于在两个最近的激活区域中的每一个处形成相应的第一类型聚合物块。 在图像层上形成一层嵌段共聚物，多个第一类聚合物嵌段和多个第二和第三类聚合物嵌段形成在图像层的两个最近活化区域的外边缘之间的区域上 ，来自嵌段共聚物。 第一，第二和第三类型的聚合物嵌段中的至少一种被去除以形成各种掩模结构。
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公开(公告)号：US08334089B2
公开(公告)日：2012-12-18
申请号：US13239555
申请日：2011-09-22
申请人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
发明人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
CPC分类号： H01L21/0332 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
摘要翻译： 对于在集成电路制造期间的图案化，图像层被激活用于在两个最近的激活区域中的每一个处形成相应的第一类型聚合物块。 在图像层上形成一层嵌段共聚物，多个第一类聚合物嵌段和多个第二和第三类聚合物嵌段形成在图像层的两个最近活化区域的外边缘之间的区域上 ，来自嵌段共聚物。 第一，第二和第三类型的聚合物嵌段中的至少一种被去除以形成各种掩模结构。
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公开(公告)号：US08053163B2
公开(公告)日：2011-11-08
申请号：US12283449
申请日：2008-09-12
申请人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
发明人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
CPC分类号： H01L21/0332 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
摘要翻译： 对于在集成电路制造期间的图案化，图像层被激活用于在两个最近的激活区域中的每一个处形成相应的第一类型聚合物块。 在图像层上形成一层嵌段共聚物，多个第一类聚合物嵌段和多个第二和第三类聚合物嵌段形成在图像层的两个最近活化区域的外边缘之间的区域上 ，来自嵌段共聚物。 第一，第二和第三类型的聚合物嵌段中的至少一种被去除以形成各种掩模结构。
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公开(公告)号：US20090176376A1
公开(公告)日：2009-07-09
申请号：US12217784
申请日：2008-07-09
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
IPC分类号： H01L21/308
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
摘要翻译： 为了在集成电路制造期间进行图案化，形成第一掩模结构的第一图案，并且在第一掩模结构的暴露表面上形成缓冲层。 此外，在第一掩蔽结构的侧壁处的缓冲层之间的凹部中形成第二掩模结构的第二图案。 此外，第一掩模结构和掩模结构由各自含高含碳材料的旋涂形成。 这样的第一和第二掩模结构以比传统光刻法更高的间距对目标层进行图案化。
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公开(公告)号：US07070910B2
公开(公告)日：2006-07-04
申请号：US11033300
申请日：2005-01-12
申请人： Kyoung-Mi Kim , Yeu-Young Youn , Jae-Ho Kim , Young-Ho Kim , Shi-Yong Yi
发明人： Kyoung-Mi Kim , Yeu-Young Youn , Jae-Ho Kim , Young-Ho Kim , Shi-Yong Yi
IPC分类号： G03C5/00
CPC分类号： G03F7/0752 , C07F7/12 , G03F7/0751
摘要： An adhesive compound for use with a photoresist, the compound represented in accordance with the following chemical formula, A method for forming a photoresist pattern using the adhesive compound is also disclosed.
摘要翻译： 还公开了与光致抗蚀剂一起使用的粘合剂化合物，根据以下化学式表示的化合物，A，使用该粘合剂形成光致抗蚀剂图案的方法。
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公开(公告)号：US08349200B2
公开(公告)日：2013-01-08
申请号：US13217544
申请日：2011-08-25
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
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公开(公告)号：US07998357B2
公开(公告)日：2011-08-16
申请号：US12217782
申请日：2008-07-09
申请人： Nam-Myun Cho , Myeong-Cheol Kim , Shi-Yong Yi , Young-Hoon Song , Young-Ju Park
发明人： Nam-Myun Cho , Myeong-Cheol Kim , Shi-Yong Yi , Young-Hoon Song , Young-Ju Park
CPC分类号： H01L21/02118 , H01L21/02282 , H01L21/0337 , H01L21/3086 , H01L21/31058 , H01L21/312 , H01L21/32139 , H01L27/105 , H01L27/1052
摘要： For integrated circuit fabrication, at least one spacer support structure is formed in a first area over a semiconductor substrate, and a mask material is deposited on exposed surfaces of the spacer support structure and on a second area over the semiconductor substrate. A masking structure is formed on a portion of the mask material in the second area, and the mask material is patterned to form spacers on sidewalls of the spacer support structure and to form a mask pattern under the masking structure. The spacer support structure and the masking structure are comprised of respective high carbon content materials that have been spin-coated and have substantially a same etch selectivity.
摘要翻译： 对于集成电路制造，在半导体衬底上的第一区域中形成至少一个间隔件支撑结构，并且掩模材料沉积在间隔件支撑结构的暴露表面上并在半导体衬底上的第二区域上。 在第二区域中的掩模材料的一部分上形成掩模结构，并且掩模材料被图案化以在间隔物支撑结构的侧壁上形成间隔物，并在掩模结构下方形成掩模图案。 间隔物支撑结构和掩蔽结构由已经旋涂并具有基本上相同蚀刻选择性的相应的高碳含量材料构成。
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公开(公告)号：US20090246966A1
公开(公告)日：2009-10-01
申请号：US12217782
申请日：2008-07-09
申请人： Nam-Myun Cho , Myeong-Cheol Kim , Shi-Yong Yi , Young-Hoon Song , Young-Ju Park
发明人： Nam-Myun Cho , Myeong-Cheol Kim , Shi-Yong Yi , Young-Hoon Song , Young-Ju Park
IPC分类号： H01L21/308
CPC分类号： H01L21/02118 , H01L21/02282 , H01L21/0337 , H01L21/3086 , H01L21/31058 , H01L21/312 , H01L21/32139 , H01L27/105 , H01L27/1052
摘要： For integrated circuit fabrication, at least one spacer support structure is formed in a first area over a semiconductor substrate, and a mask material is deposited on exposed surfaces of the spacer support structure and on a second area over the semiconductor substrate. A masking structure is formed on a portion of the mask material in the second area, and the mask material is patterned to form spacers on sidewalls of the spacer support structure and to form a mask pattern under the masking structure. The spacer support structure and the masking structure are comprised of respective high carbon content materials that have been spin-coated and have substantially a same etch selectivity.
摘要翻译： 对于集成电路制造，在半导体衬底上的第一区域中形成至少一个间隔件支撑结构，并且掩模材料沉积在间隔件支撑结构的暴露表面上并在半导体衬底上的第二区域上。 在第二区域中的掩模材料的一部分上形成掩模结构，并且掩模材料被图案化以在间隔物支撑结构的侧壁上形成间隔物，并在掩模结构下方形成掩模图案。 间隔物支撑结构和掩蔽结构由已经旋涂并具有基本上相同蚀刻选择性的相应的高碳含量材料构成。
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