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    SUPER CMOS DEVICES ON A MICROELECTRONICS SYSTEM
    4.
    发明申请
    SUPER CMOS DEVICES ON A MICROELECTRONICS SYSTEM 有权

    公开(公告)号：US20170125404A1

    公开(公告)日：2017-05-04

    申请号：US15358049

    申请日：2016-11-21

    Applicant: SCHOTTKY LSI, INC.

    Inventor： AUGUSTINE WEI-CHUN CHANG

    IPC: H01L27/06 ,  H01L27/112 ,  H01L31/07 ,  H01L21/8238 ,  H01L31/0376 ,  H01L27/11526 ,  H01L29/872

    CPC classification number: H01L27/0629 ,  H01L21/8238 ,  H01L25/065 ,  H01L27/0207 ,  H01L27/0727 ,  H01L27/105 ,  H01L27/10897 ,  H01L27/112 ,  H01L27/11253 ,  H01L27/11286 ,  H01L27/11293 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11807 ,  H01L28/20 ,  H01L29/66143 ,  H01L29/872 ,  H01L31/032 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/07 ,  H01L31/072 ,  H01L31/074 ,  H01L2924/0002 ,  H03K19/17728 ,  Y02E10/50 ,  H01L2924/00

    Abstract: This application is directed to a low cost IC solution that provides Super CMOS microelectronics macros. Hereinafter, SCMOS refers to Super CMOS and Schottky CMOS. SCMOS device solutions includes a niche circuit element, such as complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co, Ti, Ni or other metal atoms or compounds) to P- and N-Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros are composed of diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form (i) generic logic gates, (ii) functional blocks of microprocessors and microcontrollers such as but not limited to data paths, multipliers, muliplier-accumaltors, (ii) memory cells and control circuits of various types (SRAM's with single or multiple read/write port(s), binary and ternary CAM's), (iii) multiplexers, crossbar switches, switch matrices in network processors, graphics processors and other processors to implement a variety of communication protocols and algorithms of data processing engines for (iv) Analytics, (v) block-chain and encryption-based security engines (vi) Artificial Neural Networks with specific circuits to emulate or to implement a self-learning data processor similar to or derived from the neurons and synapses of human or animal brains, (vii) analog circuits and functional blocks from simple to the complicated including but not limited to power conversion, control and management either based on charge pumps or inductors, sensor signal amplifiers and conditioners, interface drivers, wireline data transceivers, oscillators and clock synthesizers with phase and/or delay locked loops, temperature monitors and controllers; all the above are built from discrete components to all grades of VLSI chips. Solar photovoltaic electricity conversion, bio-lab-on-a-chip, hyperspectral imaging (capture/sensing and processing), wireless communication with various transceiver and/or transponder circuits for ranges of frequency that extend beyond a few 100 MHz, up to multi-THz, ambient energy harvesting either mechanical vibrations or antenna-based electromagnetic are newly extended or nacent fields of the SCMOS IC applications.

    METHOD FOR PRODUCING A PHOTOVOLTAIC CELL HAVING A HETEROJUNCTION, AND RESULTING PHOTOVOLTAIC CELL
    6.
    发明申请
    METHOD FOR PRODUCING A PHOTOVOLTAIC CELL HAVING A HETEROJUNCTION, AND RESULTING PHOTOVOLTAIC CELL 有权
    用于生产具有异位的光伏电池的方法和结晶光伏电池

    公开(公告)号：US20150280030A1

    公开(公告)日：2015-10-01

    申请号：US14429654

    申请日：2013-09-23

    Applicant: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

    Inventor： Anne-Sophie Ozanne ,  Maria-Delfina Munoz ,  Nathalie Nguyen

    IPC: H01L31/0376 ,  H01L31/074 ,  H01L31/20

    CPC classification number: H01L31/0376 ,  H01L31/074 ,  H01L31/0747 ,  H01L31/208 ,  Y02E10/50

    Abstract: A method for producing a heterojunction solar cell including the following successive steps: providing a substrate made from crystalline semiconductor material, doped with a first type of doping, and provided with a first main face; depositing a first layer of intrinsic amorphous semiconductor material on said first main face of the substrate; and forming a second layer of amorphous semiconductor material on the first layer. The method includes deposition of a barrier layer between the first and second layers, said barrier layer being of different nature from those of the first and second layers and includes doping of the second layer by ion implantation.

    Abstract translation: 一种用于制造异质结太阳能电池的方法，包括以下连续步骤：提供掺杂有第一类型掺杂的晶体半导体材料制成的衬底，并设置有第一主面; 在衬底的所述第一主面上沉积第一层本征非晶半导体材料; 以及在所述第一层上形成第二非晶半导体材料层。 该方法包括在第一和第二层之间沉积阻挡层，所述阻挡层与第一和第二层的性质不同，并且包括通过离子注入来掺杂第二层。

    Active Matrix Light Emitting Diode Array and Projector Display Comprising It
    7.
    发明申请
    Active Matrix Light Emitting Diode Array and Projector Display Comprising It 有权
    有源矩阵发光二极管阵列和投影仪显示器

    公开(公告)号：US20150249197A1

    公开(公告)日：2015-09-03

    申请号：US14620910

    申请日：2015-02-12

    Applicant: Chan- Long Shieh ,  Gang Yu

    Inventor： Chan- Long Shieh ,  Gang Yu

    IPC: H01L33/64 ,  H01L33/62 ,  H01L33/44 ,  H01L33/46 ,  H01L27/12 ,  H01L33/00

    CPC classification number: H01L33/642 ,  H01L23/3677 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1262 ,  H01L27/1463 ,  H01L27/14663 ,  H01L27/14692 ,  H01L31/0368 ,  H01L31/0376 ,  H01L31/20 ,  H01L33/0075 ,  H01L33/44 ,  H01L33/46 ,  H01L33/62 ,  H01L2933/0025 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2933/0075

    Abstract: A method of fabricating a pixelated projector display includes providing a wafer with a supporting substrate, a first semiconductive layer, an emission layer, and a second semiconductive layer. The wafer is patterned into an array of LEDs/LDs and a planarization layer is deposited over the array. One via for each LED/LD element is formed through the planarization layer. A MOTFT backplane is positioned on the planarization layer, one driver circuit in controlling electrical communication with each via through the planarization layer. A passivation layer is deposited over the MOTFT backplane and heat plugs are extended through the passivation layer, the MOTFT backplane, the planarization layer, and the III-V LED/LD wafer partially through the first semiconductive layer to thermally couple heat from the array of LEDs/LDs to the surface of the passivation layer. An upper end of the heat plugs is accessible for thermal coupling to a heat spreader and/or a heatsink.

    Abstract translation: 制造像素化投影仪显示器的方法包括向晶片提供支撑衬底，第一半导体层，发射层和第二半导体层。 将晶片图案化成LED / LD阵列，并且平坦化层沉积在阵列上。 通过平坦化层形成每个LED / LD元件的一个通孔。 MFTFT背板位于平坦化层上，一个驱动电路通过平坦化层控制与每个通孔的电连通。 钝化层沉积在MOTFT背板上，并且热插塞通过钝化层，MOTFT背板，平坦化层和III-V LED / LD晶片部分延伸穿过第一半导体层，以热耦合来自 LED / LDs到钝化层的表面。 散热器和/或散热器的热连接可以接近热塞的上端。

    PHOTOELECTRIC CONVERSION ELEMENT AND METHOD FOR MANUFACTURING SAME
    8.
    发明申请
    PHOTOELECTRIC CONVERSION ELEMENT AND METHOD FOR MANUFACTURING SAME 有权
    光电转换元件及其制造方法

    公开(公告)号：US20150249169A1

    公开(公告)日：2015-09-03

    申请号：US14429433

    申请日：2013-09-19

    Applicant: SHARP KABUSHIKI KAISHA

    Inventor： Toshihiko Sakai ,  Kenji Kimoto ,  Naoki Koide ,  Yoshitaka Yamamoto

    IPC: H01L31/0224 ,  H01L31/18 ,  H01L31/0376

    CPC classification number: H01L31/022466 ,  H01L31/022483 ,  H01L31/0376 ,  H01L31/0747 ,  H01L31/1884 ,  Y02E10/547

    Abstract: The photoelectric conversion element includes a semiconductor substrate, a first amorphous film of a first conductivity type disposed on an entire surface of one surface of the semiconductor substrate, a first conductive oxide layer disposed on the first amorphous film, a second amorphous film of the first conductivity type disposed on a part of the other surface of the semiconductor substrate, a second conductive oxide layer disposed on the second amorphous film, a third amorphous film of a second conductivity type disposed on the other part of the other surface of the semiconductor substrate, and a third conductive oxide layer disposed on the third amorphous film. Electric conductivity of the first conductive oxide layer is lower than electric conductivities of the second and the third conductive oxide layer. Transmittance of the first conductive oxide layer is higher than transmittances of the second and the third conductive oxide layer.

    Abstract translation: 光电转换元件包括半导体衬底，设置在半导体衬底的一个表面的整个表面上的第一导电类型的第一非晶膜，设置在第一非晶膜上的第一导电氧化物层，第一非晶膜的第二非晶膜 设置在所述半导体衬底的另一表面的一部分上的导电类型，设置在所述第二非晶膜上的第二导电氧化物层，设置在所述半导体衬底的另一表面的另一部分上的第二导电类型的第三非晶膜， 以及设置在第三非晶膜上的第三导电氧化物层。 第一导电氧化物层的导电率低于第二导电氧化物层和第三导电氧化物层的导电率。 第一导电氧化物层的透射率高于第二和第三导电氧化物层的透射率。

    SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME
    9.
    发明申请
    SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME 有权
    太阳能电池及其制造方法

    公开(公告)号：US20150162467A1

    公开(公告)日：2015-06-11

    申请号：US14605394

    申请日：2015-01-26

    Applicant: LG Electronics Inc.

    Inventor： Kyoungsoo Lee ,  Seongeun Lee

    IPC: H01L31/0376 ,  H01L31/0224

    CPC classification number: H01L31/0376 ,  H01L25/042 ,  H01L27/142 ,  H01L31/022425 ,  H01L31/04 ,  H01L31/06 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/18 ,  H01L31/1804 ,  H01L31/1876 ,  H01L2924/0002 ,  Y02E10/547 ,  Y02P70/521 ,  H01L2924/00

    Abstract: A method for manufacturing a solar cell includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductivity type dopant.

    Abstract translation: 一种制造太阳能电池的方法包括：制备具有第一导电型掺杂剂的半导体衬底; 将前非晶化元件离子注入半导体衬底的前表面以形成非晶层; 以及通过将第二导电型掺杂剂离子注入到所述半导体衬底的前表面中形成发射极层。 然后该方法还包括热处理层以激活第二导电型掺杂剂。 该方法还包括通过离子注入第一导电型掺杂剂在半导体衬底的背面形成背表面场层。

    THIN FILM SOLAR CELL
    10.
    发明申请
    THIN FILM SOLAR CELL 审中-公开
    薄膜太阳能电池

    公开(公告)号：US20150083203A1

    公开(公告)日：2015-03-26

    申请号：US14394642

    申请日：2013-04-02

    Applicant: LG ELECTRONICS INC.

    Inventor： Soohyun Kim ,  Hongcheol Lee ,  Jinwon Chung ,  Sehwon Ahn

    IPC: H01L31/0368 ,  H01L31/077 ,  H01L31/0376

    CPC classification number: H01L31/03685 ,  H01L31/0376 ,  H01L31/03762 ,  H01L31/076 ,  H01L31/077 ,  Y02E10/545 ,  Y02E10/548

    Abstract: A thin film solar cell includes a substrate, a first electrode and a second electrode positioned on one surface of the substrate, and a photoelectric conversion unit positioned between the first electrode and the second electrode. The photoelectric conversion unit includes a plurality of photoelectric conversion layers each including a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer. At least one of the p-type semiconductor layers of the plurality of photoelectric conversion layers contains microcrystalline silicon (mc-Si) and amorphous silicon oxide (a-SiOx).

    Abstract translation: 薄膜太阳能电池包括位于基板的一个表面上的基板，第一电极和第二电极以及位于第一电极和第二电极之间的光电转换单元。 光电转换单元包括多个光电转换层，每个光电转换层包括p型半导体层，i型半导体层和n型半导体层。 多个光电转换层中的至少一个p型半导体层含有微晶硅（mc-Si）和非晶氧化硅（a-SiOx）。

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