RECESSED GATE MEMORY APPARATUSES AND METHODS
    1.
    发明申请
    RECESSED GATE MEMORY APPARATUSES AND METHODS 审中-公开
    闭门器记忆装置和方法

    公开(公告)号:US20130334594A1

    公开(公告)日:2013-12-19

    申请号:US13524803

    申请日:2012-06-15

    摘要: Some embodiments include a memory device and a method of forming the memory device. One such memory device includes a string of stacked memory cells. Each of the memory cells in the string includes a charge storage structure and a recessed control gate. The recessed control gate has a substantially smooth surface separated from the charge storage structure by dielectric material. One such method includes etching heavily boron doped polysilicon selective to oxide to form a recessed control gate having a surface with nubs. A smoothing solution is applied to the surface of the recessed control gate to smoothen the nubs. Additional apparatuses and methods are described.

    摘要翻译: 一些实施例包括存储器件和形成存储器件的方法。 一个这样的存储器件包括一堆堆叠的存储器单元。 串中的每个存储单元包括电荷存储结构和凹入控制门。 凹陷的控制栅极具有通过介电材料与电荷存储结构分离的基本平滑的表面。 一种这样的方法包括蚀刻对氧化物选择性的重硼掺杂多晶硅以形成具有带有凸块的表面的凹陷控制栅极。 将平滑解决方案应用于凹入控制门的表面以平滑微调。 描述附加的装置和方法。

    Etching processes for integrated circuit manufacturing including methods of forming capacitors
    4.
    发明授权
    Etching processes for integrated circuit manufacturing including methods of forming capacitors 失效
    用于集成电路制造的蚀刻工艺,包括形成电容器的方法

    公开(公告)号:US06790786B2

    公开(公告)日:2004-09-14

    申请号:US10092875

    申请日:2002-03-05

    IPC分类号: H01L21302

    摘要: The invention includes semiconductor processing methods, including methods of forming capacitors. In one implementation, a semiconductor processing method includes providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form. The metal comprises an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof. At least a portion of the layer is etched in a halogenide, ozone and H2O comprising ambient.

    摘要翻译: 本发明包括半导体处理方法,包括形成电容器的方法。 在一个实施方式中,半导体处理方法包括提供半导体衬底,该半导体衬底包括包含元素或金属合金形式的至少一种金属的层。 金属包括选自铂,钌,铑,钯,铱及其混合物的元素。 该层的至少一部分在包含环境的卤化物,臭氧和H 2 O中被蚀刻。