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    A/D converter comprising a voltage comparator device
    1.
    发明授权
    A/D converter comprising a voltage comparator device 有权
    A / D转换器包括电压比较器装置

    公开(公告)号：US07652600B2

    公开(公告)日：2010-01-26

    申请号：US12191059

    申请日：2008-08-13

    申请人： Geert Van der Plas ,  Johan Bauwelinck ,  Zhisheng Li ,  Guy Torfs ,  Jan Vandewege ,  Xin Yin

    发明人： Geert Van der Plas ,  Johan Bauwelinck ,  Zhisheng Li ,  Guy Torfs ,  Jan Vandewege ,  Xin Yin

    IPC分类号： H03M1/10

    CPC分类号： H03M1/1061 ,  H03M1/0809 ,  H03M1/0863 ,  H03M1/361

    摘要： The present invention discloses an analogue-to-digital converter comprising at least two voltage comparator devices. Each of the voltage comparator devices comprises a differential structure of transistors and is arranged for being fed with a same input signal and for generating an own internal voltage reference by means of an imbalance in the differential structure, said two internal voltage references being different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of the input signal.

    摘要翻译： 本发明公开了一种包括至少两个电压比较器装置的模拟 - 数字转换器。 每个电压比较器装置包括晶体管的差分结构，并且被布置为被馈送相同的输入信号并且通过差分结构中的不平衡来产生自己的内部参考电压，所述两个内部电压基准是不同的。 每个电压比较器被布置用于产生指示输入信号的数字近似的位位置的输出信号。

    Circuit for end-of-burst detection
    4.
    发明授权
    Circuit for end-of-burst detection 有权
    脉冲串检测电路

    公开(公告)号：US08380079B2

    公开(公告)日：2013-02-19

    申请号：US12886298

    申请日：2010-09-20

    申请人： Cedric Mélange ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    发明人： Cedric Mélange ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    IPC分类号： H04B10/00 ,  H04B10/06

    CPC分类号： H04L7/042

    摘要： A circuit for end-of-burst detection in a portion of a received bit stream is disclosed. The circuit comprises: a first counter for counting the number of bits in the portion, a second counter for counting the number of bit value transitions in the portion, and a circuit for comparing the counted number of bits in the portion and the counted number of bit value transitions therein with preset values, the circuit for comparing is further arranged for generating a signal indicative of end-of-burst detection based on the result of the comparison.

    摘要翻译： 公开了一种用于在接收的比特流的一部分中进行爆发结束检测的电路。 该电路包括：第一计数器，用于对该部分中的比特数进行计数;第二计数器，用于对该部分中的比特值转换的数量进行计数;以及电路，用于比较该部分中计数的比特数和计数的 其中具有预设值的位值转换，用于比较的电路还被布置为基于比较的结果来产生指示爆发结束检测的信号。

    Communication system over a power line distribution network
    5.
    发明授权
    Communication system over a power line distribution network 失效
    通过电力线分配网络的通信系统

    公开(公告)号：US08432940B2

    公开(公告)日：2013-04-30

    申请号：US12101108

    申请日：2008-04-10

    申请人： Johan Bauwelinck ,  Els De Backer ,  Cedric Mélange ,  Jan Vandewege

    发明人： Johan Bauwelinck ,  Els De Backer ,  Cedric Mélange ,  Jan Vandewege

    IPC分类号： H04J1/00 ,  H04J1/02

    CPC分类号： H04B3/54 ,  H04B2203/5416 ,  H04B2203/5425 ,  H04B2203/5491

    摘要： The present disclosure provides a system for receiving signals over a power line distribution. Typically, problems of noise and interference are being solved at the receiver side. Systems of the present disclosure, however, are not limited to the receiver-side solution. Systems according to the present disclosure may also be used at the transmitter side. The receiver comprises a high pass filter, a preselect crossover filter, and an analog front-end receiver architecture.

    摘要翻译： 本公开提供了一种用于通过电力线分布接收信号的系统。 通常，接收机端正在解决噪声和干扰问题。 然而，本公开的系统不限于接收机侧解决方案。 根据本公开的系统也可以在发射机侧使用。 接收机包括高通滤波器，预选交叉滤波器和模拟前端接收器架构。

    Communication System over a Power Line Distribution Network
    6.
    发明申请
    Communication System over a Power Line Distribution Network 失效
    通过电力线分配网络的通信系统

    公开(公告)号：US20080310456A1

    公开(公告)日：2008-12-18

    申请号：US12101108

    申请日：2008-04-10

    申请人： Johan Bauwelinck ,  Els De Backer ,  Cedric Melange ,  Jan Vandewege

    发明人： Johan Bauwelinck ,  Els De Backer ,  Cedric Melange ,  Jan Vandewege

    IPC分类号： H04J1/02

    CPC分类号： H04B3/54 ,  H04B2203/5416 ,  H04B2203/5425 ,  H04B2203/5491

    摘要： The present disclosure provides a system for receiving signals over a power line distribution. Typically, problems of noise and interference are being solved at the receiver side. Systems of the present disclosure, however, are not limited to the receiver-side solution. Systems according to the present disclosure may also be used at the transmitter side. The receiver comprises a high pass filter, a preselect crossover filter, and an analog front-end receiver architecture.

    摘要翻译： 本公开提供了一种用于通过电力线分布接收信号的系统。 通常，接收机端正在解决噪声和干扰问题。 然而，本公开的系统不限于接收机侧解决方案。 根据本公开的系统也可以在发射机侧使用。 接收机包括高通滤波器，预选交叉滤波器和模拟前端接收器架构。

    Circuit for End-of-Burst Detection
    7.
    发明申请
    Circuit for End-of-Burst Detection 有权
    电路用于突发检测

    公开(公告)号：US20110069952A1

    公开(公告)日：2011-03-24

    申请号：US12886298

    申请日：2010-09-20

    申请人： Cedric Mélange ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    发明人： Cedric Mélange ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    IPC分类号： H04B10/08

    CPC分类号： H04L7/042

    摘要： A circuit for end-of-burst detection in a portion of a received bit stream is disclosed. The circuit comprises: a first counter for counting the number of bits in the portion, a second counter for counting the number of bit value transitions in the portion, and a circuit for comparing the counted number of bits in the portion and the counted number of bit value transitions therein with preset values, the circuit for comparing is further arranged for generating a signal indicative of end-of-burst detection based on the result of the comparison.

    摘要翻译： 公开了一种用于在接收的比特流的一部分中进行爆发结束检测的电路。 该电路包括：第一计数器，用于对该部分中的比特数进行计数;第二计数器，用于对该部分中的比特值转换的数量进行计数;以及电路，用于比较该部分中计数的比特数和计数的 其中具有预设值的位值转换，用于比较的电路还被布置为基于比较的结果来产生指示爆发结束检测的信号。

    Device and Method for Signal Detection in a TDMA Network
    8.
    发明申请
    Device and Method for Signal Detection in a TDMA Network 审中-公开
    TDMA网络中信号检测的装置和方法

    公开(公告)号：US20100321072A1

    公开(公告)日：2010-12-23

    申请号：US12680011

    申请日：2008-11-19

    申请人： Johan Bauwelinck ,  Tine De Ridder ,  Cedric Melange ,  Peter Ossieur ,  Bart Baekelandt ,  Xing Zhi Qiu ,  Jan Vandewege

    发明人： Johan Bauwelinck ,  Tine De Ridder ,  Cedric Melange ,  Peter Ossieur ,  Bart Baekelandt ,  Xing Zhi Qiu ,  Jan Vandewege

    IPC分类号： H03L7/00 ,  G06G7/18

    CPC分类号： H04L7/042 ,  H04L5/22 ,  H04L7/0041 ,  H04L25/062

    摘要： The present invention is related to a circuit (1) for detecting activity in a burst-mode receiver. The circuit is arranged for receiving an input signal (2) comprising a preamble. The circuit comprises a differentiator (11) for detecting signal transitions in the input signal (2) whereby the preamble comprises information on operating said differentiator (11). In a preferred embodiment, the information is a time constant. The circuit further comprises an integrator (12) arranged for being fed with an output of the differentiator. The resulting signal is compared to a reference (16). If this reference is crossed, activity is detected. In an embodiment a front-end circuit is presented comprising next to a circuit for detecting activity, a reset circuit arranged for resetting the front-end circuit and a clock phase alignment circuit arranged for recovering the phase.

    摘要翻译： 本发明涉及一种用于检测突发模式接收机中的活动的电路（1）。 电路被布置成用于接收包括前导码的输入信号（2）。 电路包括用于检测输入信号（2）中的信号转换的微分器（11），由此前置码包括关于操作所述微分器（11）的信息。 在优选实施例中，信息是时间常数。 电路还包括积分器（12），其被布置为馈送微分器的输出。 将所得信号与参考（16）进行比较。 如果该引用被越过，则检测到活动。 在一个实施例中，提供了前端电路，其包括用于检测活动的电路，用于复位前端电路的复位电路和布置成恢复相位的时钟相位对准电路。

    Systems and methods for transferring single-ended burst signal onto differential lines, especially for use in burst-mode receiver
    9.
    发明授权
    Systems and methods for transferring single-ended burst signal onto differential lines, especially for use in burst-mode receiver 有权
    将单端突发信号传输到差分线路上的系统和方法，特别适用于突发模式接收机

    公开(公告)号：US08150272B2

    公开(公告)日：2012-04-03

    申请号：US12089316

    申请日：2008-04-04

    申请人： Peter Ossieur ,  Tine De Ridder ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    发明人： Peter Ossieur ,  Tine De Ridder ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    IPC分类号： H04B10/06

    CPC分类号： H04B10/6931 ,  H04B10/272

    摘要： Systems and methods for transferring incoming single-ended burst signals of which at least one characteristic varies widely from burst to burst onto a pair of differential lines. The systems comprise an input for receiving an incoming burst signal, a signal adaptation block for adapting said widely varying characteristic and a single-ended-to-differential converter. In a first aspect a reset signal for resetting a settings determination block, which controls the signal adaptation block, is sent backwards over the differential lines, preferably using a common-mode signal. In a second aspect, a status freezing mechanism is employed for freezing the settings of the settings determination block after the end of the preamble of an incoming burst.

    摘要翻译： 用于传送其输入的单端突发信号的系统和方法，其中至少一个特征从突发到突发到一对差分线之间广泛变化。 该系统包括用于接收输入突发信号的输入端，用于调整所述广泛变化的特性的信号调整块和单端到差分转换器。 在第一方面，优选地使用共模信号，通过差分线路向后发送用于复位控制信号适配块的设置确定块的复位信号。 在第二方面，采用状态冻结机制来冻结输入突发的前导码结束之后的设置确定块的设置。

    Systems and Methods for Transferring Single-Ended Burst Signal Onto Differential Lines, Especially for Use in Burst-Mode Receiver
    10.
    发明申请
    Systems and Methods for Transferring Single-Ended Burst Signal Onto Differential Lines, Especially for Use in Burst-Mode Receiver 有权
    将单端突发信号传输到差分线的系统和方法，特别用于突发模式接收机

    公开(公告)号：US20110311227A9

    公开(公告)日：2011-12-22

    申请号：US12089316

    申请日：2008-04-04

    申请人： Peter Ossieur ,  Tine De Ridder ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    发明人： Peter Ossieur ,  Tine De Ridder ,  Johan Bauwelinck ,  Xing Zhi Qiu ,  Jan Vandewege

    IPC分类号： H04J14/00

    CPC分类号： H04B10/6931 ,  H04B10/272

    摘要： Systems and methods for transferring incoming single-ended burst signals of which at least one characteristic varies widely from burst to burst onto a pair of differential lines. The systems comprise an input for receiving an incoming burst signal, a signal adaptation block for adapting said widely varying characteristic and a single-ended-to-differential converter. In a first aspect a reset signal for resetting a settings determination block, which controls the signal adaptation block, is sent backwards over the differential lines, preferably using a common-mode signal. In a second aspect, a status freezing mechanism is employed for freezing the settings of the settings determination block after the end of the preamble of an incoming burst.

    摘要翻译： 用于传送其输入的单端突发信号的系统和方法，其中至少一个特征从突发到突发到一对差分线之间广泛变化。 该系统包括用于接收输入突发信号的输入端，用于调整所述广泛变化的特性的信号调整块和单端到差分转换器。 在第一方面，优选地使用共模信号，通过差分线路向后发送用于复位控制信号适配块的设置确定块的复位信号。 在第二方面，采用状态冻结机制来冻结输入突发的前导码结束之后的设置确定块的设置。