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    Metallization performance in electronic devices
    1.
    发明授权
    Metallization performance in electronic devices 有权
    电子设备的金属化性能

    公开(公告)号：US07339274B2

    公开(公告)日：2008-03-04

    申请号：US10919591

    申请日：2004-08-17

    申请人： John C. Desko, Jr. ,  Bailey R. Jones ,  Sean Lian ,  Simon John Molloy ,  Vivian Ryan

    发明人： John C. Desko, Jr. ,  Bailey R. Jones ,  Sean Lian ,  Simon John Molloy ,  Vivian Ryan

    IPC分类号： H01L21/283

    CPC分类号： H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Phenomena such as electromigration and stress-induced migration occurring in metal interconnects of devices such as integrated circuits are inhibited by use of underlying non-planarities. Thus the material underlying the interconnect is formed to have non-planarities typically of at least 0.02 μm in height and advantageously within 100 μm of another such non-planarity. Such non-planarities, it is contemplated, reduce grain boundary movement in the overlying interconnect with a concomitant reduction in void aggregation.

    摘要翻译： 诸如集成电路的器件的金属互连中发生的诸如电迁移和应力诱发迁移的现象通过使用下面的非平面性被抑制。 因此，互连下面的材料形成为具有通常在高度上通常为至少0.02μm的非平坦度，并且有利地在另一个这样的非平面性的100μm之内。 可以预期的是，这种非平面性减少了上覆互连中的晶界运动，伴随着空隙聚集的降低。

    Metallization performance in electronic devices
    3.
    发明申请
    Metallization performance in electronic devices 有权
    电子设备的金属化性能

    公开(公告)号：US20060038294A1

    公开(公告)日：2006-02-23

    申请号：US10919591

    申请日：2004-08-17

    申请人： John Desko ,  Bailey Jones ,  Sean Lian ,  Simon Molloy ,  Vivian Ryan

    发明人： John Desko ,  Bailey Jones ,  Sean Lian ,  Simon Molloy ,  Vivian Ryan

    IPC分类号： H01L23/52

    CPC分类号： H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Phenomena such as electromigration and stress-induced migration occurring in metal interconnects of devices such as integrated circuits are inhibited by use of underlying non-planarities. Thus the material underlying the interconnect is formed to have non-planarities typically of at least 0.02 μm in height and advantageously within 100 μm of another such non-planarity. Such non-planarities, it is contemplated, reduce grain boundary movement in the overlying interconnect with a concomitant reduction in void aggregation.

    摘要翻译： 诸如集成电路的器件的金属互连中发生的诸如电迁移和应力诱发迁移的现象通过使用下面的非平面性被抑制。 因此，互连下面的材料形成为具有通常在高度上通常为至少0.02μm的非平坦度，并且有利地在另一个这样的非平面性的100μm之内。 可以预期的是，这种非平面性减少了上覆互连中的晶界运动，伴随着空隙聚集的降低。

    Methods and apparatus for the detection of damaged regions on dielectric film or other portions of a die
    4.
    发明授权
    Methods and apparatus for the detection of damaged regions on dielectric film or other portions of a die 失效
    用于检测电介质膜或模具的其它部分上的损伤区域的方法和装置

    公开(公告)号：US06919228B2

    公开(公告)日：2005-07-19

    申请号：US10699021

    申请日：2003-10-31

    申请人： Sean Lian ,  Vivian Ryan ,  Debra Louise Yencho

    发明人： Sean Lian ,  Vivian Ryan ,  Debra Louise Yencho

    IPC分类号： G01N21/91 ,  H01L21/66 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

    CPC分类号： H01L22/24 ,  G01N21/91 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Techniques for detecting damage on an integrated circuit die using a particle suspension solution are disclosed. The particles of the suspension solution preferentially attach to damaged regions on exposed dielectric films or other portions of the die. For example, one aspect of the invention is a method of detecting damage to a dielectric film used in fabricating a die of an integrated circuit. A particle suspension solution is applied to the die and damaged regions of the dielectric film are identified as areas having an accumulation of particles of the particle suspension solution.

    摘要翻译： 公开了使用颗粒悬浮液检测集成电路管芯上的损坏的技术。 悬浮溶液的颗粒优先附着在暴露的介电膜或模具的其它部分上的损伤区域上。 例如，本发明的一个方面是检测用于制造集成电路的管芯的电介质膜的损坏的方法。 将颗粒悬浮液施加到模具，并且将电介质膜的损伤区域识别为具有颗粒悬浮液的颗粒堆积的区域。

    METHODS AND APPARATUS FOR THE DETECTION OF DAMAGED REGIONS ON DIELECTRIC FILM OR OTHER PORTIONS OF A DIE
    5.
    发明申请
    METHODS AND APPARATUS FOR THE DETECTION OF DAMAGED REGIONS ON DIELECTRIC FILM OR OTHER PORTIONS OF A DIE 失效
    用于检测电介质膜或其他部位的损伤区域的方法和装置

    公开(公告)号：US20050092987A1

    公开(公告)日：2005-05-05

    申请号：US10699021

    申请日：2003-10-31

    申请人： Sean Lian ,  Vivian Ryan ,  Debra Louise Yencho

    发明人： Sean Lian ,  Vivian Ryan ,  Debra Louise Yencho

    IPC分类号： G01N21/91 ,  H01L21/66 ,  H01L29/30

    CPC分类号： H01L22/24 ,  G01N21/91 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Techniques for detecting damage on an integrated circuit die using a particle suspension solution are disclosed. The particles of the suspension solution preferentially attach to damaged regions on exposed dielectric films or other portions of the die. For example, one aspect of the invention is a method of detecting damage to a dielectric film used in fabricating a die of an integrated circuit. A particle suspension solution is applied to the die and damaged regions of the dielectric film are identified as areas having an accumulation of particles of the particle suspension solution.

    摘要翻译： 公开了使用颗粒悬浮液检测集成电路管芯上的损坏的技术。 悬浮溶液的颗粒优先附着在暴露的介电膜或模具的其它部分上的损伤区域上。 例如，本发明的一个方面是检测用于制造集成电路的管芯的电介质膜的损坏的方法。 将颗粒悬浮液施加到模具，并且将电介质膜的损伤区域识别为具有颗粒悬浮液的颗粒堆积的区域。

    On-chip sensor array for temperature management in integrated circuits
    9.
    发明授权
    On-chip sensor array for temperature management in integrated circuits 有权
    用于集成电路中温度管理的片上传感器阵列

    公开(公告)号：US07800879B2

    公开(公告)日：2010-09-21

    申请号：US11460459

    申请日：2006-07-27

    申请人： Vivian Ryan

    发明人： Vivian Ryan

    IPC分类号： H01L21/00

    CPC分类号： G05D23/20 ,  G05D23/1928

    摘要： Embodiments of the invention provide methods and apparatus for managing temperature in integrated circuits. In accordance with an aspect of the invention, an integrated circuit comprises a monitored region defined by three or more edges. What is more, the integrated circuit comprises at least two temperature sensors for each of the three or more edges. The temperature sensors are arranged along the three or more edges such that each edge has substantially the same arrangement of temperature sensors. Thermal management of the integrated circuit may be accomplished by modifying functional aspects of the integrated circuit in response to measurements provided by the temperature sensors.

    摘要翻译： 本发明的实施例提供了用于管理集成电路中的温度的方法和装置。 根据本发明的一个方面，集成电路包括由三个或更多个边缘限定的监视区域。 此外，集成电路包括用于三个或更多个边缘中的每一个的至少两个温度传感器。 温度传感器沿着三个或更多个边缘布置，使得每个边缘具有基本相同的温度传感器布置。 集成电路的热管理可以通过响应于由温度传感器提供的测量来修改集成电路的功能方面来实现。

    Lateral double diffused MOS transistors
    10.
    发明授权
    Lateral double diffused MOS transistors 失效
    横向双扩散MOS晶体管

    公开(公告)号：US07573097B2

    公开(公告)日：2009-08-11

    申请号：US10981175

    申请日：2004-11-03

    申请人： John C. Desko ,  Roger A. Fratti ,  Vivian Ryan

    发明人： John C. Desko ,  Roger A. Fratti ,  Vivian Ryan

    IPC分类号： H01L29/417 ,  H01L29/423

    CPC分类号： H01L29/7835 ,  H01L23/4824 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41775 ,  H01L29/4238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The specification describes an improved mechanical electrode structure for MOS transistor devices with elongated runners. It recognizes that shrinking the geometry increases the likelihood of mechanical failure of comb electrode geometries. The mechanical integrity of a comb electrode is improved by interconnecting the electrode fingers in a cross-connected grid. In one embodiment, the transistor device is interconnected with gate fingers on a lower metaliization level, typically the first level metal, with the drain interconnected at a higher metal level. That allows the drain fingers to be cross-connected with a vertical separation between drain and gate comb electrodes. The cross-connect members may be further stabilized by adding beam extensions to the cross-connect members. The beam extensions may be anchored in an interlevel dielectric layer for additional support.

    摘要翻译： 本说明书描述了具有细长流道的用于MOS晶体管器件的改进的机械电极结构。 它认识到缩小几何形状增加了梳状电极几何形状的机械故障的可能性。 梳状电极的机械完整性通过将电极指互连在一个交叉连接的网格中来改进。 在一个实施例中，晶体管器件与较低的金属化级别（通常为第一级金属）与栅极指状物互连，漏极互连在较高的金属水平。 这允许漏极指与电极和门梳电极之间的垂直间隔交叉连接。 交叉连接构件可以通过向交叉连接构件添加梁延伸而进一步稳定。 光束延伸部可以锚定在层间电介质层中用于额外的支撑。