公开(公告)号：US5604009A

公开(公告)日：1997-02-18

申请号：US348341

申请日：1994-12-02

Applicant: John M. Long ,  Kent A. Snyder

Inventor： John M. Long ,  Kent A. Snyder

IPC: B32B5/26 ,  D04H1/46 ,  D05C17/02 ,  B32B3/02 ,  D03D27/00 ,  D04H1/04

CPC classification number: D04H1/46 ,  B32B5/26 ,  D05C17/023 ,  Y10T428/23979 ,  Y10T428/23993

Abstract: A non-wet processed tufted carpet (10) includes a plurality of face yarns (12), dyeable to the desired carpet color prior to tufting, which are tufted into and through a primary backing fabric (14) and which are more securedly held in place by a secondary backing fabric (16) without the use of an adhesive binder, the secondary backing fabric locking the face yarn in place upon the application of heat to a non-wet surface of the secondary backing fabric non-adjacent to the primary backing fabric. The tufted carpet (10) does not include any latex or binding adhesives which may cause odors or emit volatile organic chemicals. Moreover, the face yarn (12), primary backing fabric (14), and secondary backing fabric (16) are made of the same type of polymeric material, thereby creating a carpet which is wholly recyclable. The carpet (10) also uses only predyed fibers and yarns as the face yarn, thereby eliminating the need to dye or wet process and dry the carpet during its manufacture. The present invention also provides a non-wet processing method for the manufacture of tufted carpet.

Abstract translation: 非湿润加工的簇绒地毯（10）包括多个面纱（12），其在簇绒之前可染色成期望的地毯颜色，其被簇绒入并穿过主衬里（14），并且更牢固地保持在 在不使用粘合剂粘合剂的情况下通过辅助背衬织物（16）放置，辅助衬里织物将面纱线施加到第二背衬织物的非湿润表面上而不与主背衬相邻 布。 簇绒地毯（10）不包括可能引起气味或发出挥发性有机化学物质的任何胶乳或粘合粘合剂。 此外，面纱（12），主衬布（14）和辅助衬布（16）由相同类型的聚合材料制成，从而形成完全可回收的地毯。 地毯（10）也仅使用预制纤维和纱线作为面纱，从而消除了在制造过程中染色或湿法处理和干燥地毯的需要。 本发明还提供了一种用于制造簇绒地毯的非湿法加工方法。

公开(公告)号：US20100033283A1

公开(公告)日：2010-02-11

申请号：US12504763

申请日：2009-07-17

Applicant: John M. Long

Inventor： John M. Long

IPC: H01F27/00

CPC classification number: H01F37/00 ,  H01F17/045

Abstract: An AC neutral bus electromotive power rectification unit includes a first coil unit and a second coil unit. The first coil unit includes a first conductive wire coil having a first end and an opposite second end. The conductive coil is disposed in a first non-conductive tube and is suspended in a ferrous matrix. The second coil unit includes a second conductive wire coil having a first end and an opposite second end. The first end of the second coil unit is electrically coupled to the first end of the first coil unit. The second coil unit is disposed in a second non-conductive tube and is surrounded by a non-conductive material.

Abstract translation: 交流中性母线电动整流单元包括第一线圈单元和第二线圈单元。 第一线圈单元包括具有第一端和相对的第二端的第一导线线圈。 导电线圈设置在第一非导电管中并悬浮在铁基体中。 第二线圈单元包括具有第一端和相对的第二端的第二导线线圈。 第二线圈单元的第一端电耦合到第一线圈单元的第一端。 第二线圈单元设置在第二非导电管中并被非导电材料包围。

公开(公告)号：US07609082B2

公开(公告)日：2009-10-27

申请号：US12364725

申请日：2009-02-03

Applicant: John M. Long

Inventor： John M. Long

IPC: G01R31/26

CPC classification number: G01R31/2853 ,  G01R27/14 ,  G01R31/31717 ,  G01R31/31905 ,  G01R31/31924 ,  G01R35/00

Abstract: Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are modified so that they may also either transmit a constant current through the I/O ports or link the I/O ports to ground or other reference potential. The tester then transmits known currents though the signal paths interconnecting the tester's I/O ports. Existing comparators within the tester normally used to monitor the state of an IC's digital output signals are employed to measure voltage drops between the I/O ports, thereby to provide data from which resistance of signal paths within the interconnect structure may be computed.

Abstract translation: 用于将集成电路（IC）测试仪的输入/输出（I / O）端口连接到IC测试点的互连结构中的信号路径的电阻由IC测试仪本身测量。 为此，互连结构用于将测试仪的I / O端口链接到通过导体彼此链接的测试点的类似布置。 测试仪中的驱动器通常在IC被测试时通过I / O端口向IC测试点发送数字测试信号，以便它们也可以通过I / O端口传输恒定电流或链接I / O端口接地或其他参考电位。 然后，测试仪通过互连测试仪的I / O端口的信号路径传输已知电流。 采用通常用于监视IC数字输出信号的状态的测试仪中的现有比较器来测量I / O端口之间的电压降，从而提供可以计算互连结构内的信号路径电阻的数据。

公开(公告)号：US07282933B2

公开(公告)日：2007-10-16

申请号：US11028940

申请日：2005-01-03

Applicant: Roy John Henson ,  John M. Long

Inventor： Roy John Henson ,  John M. Long

IPC: G01R31/02

CPC classification number: G01R1/07357

Abstract: A probe head for testing devices formed on a semiconductor wafer includes a plurality of probe DUT (device under test) arrays. Each device under test includes pads that are urged into pressure contact with probes in a corresponding probe DUT array. The probe arrays patterns have discontinuities such as indentations, protuberances, islands and openings that are opposite at least one device when the probes contact the pads.

Abstract translation: 用于测试形成在半导体晶片上的器件的探针头包括多个探针DUT（待测器件）阵列。 被测器件中的每一个器件都包含被压入与相应探头DUT阵列中的探头压力接触的焊盘。 当探针接触垫时，探针阵列图案具有不连续性，例如凹陷，突起，岛和开口，其与至少一个装置相对。

公开(公告)号：US07257796B2

公开(公告)日：2007-08-14

申请号：US11038744

申请日：2005-01-18

Applicant: Charles A. Miller ,  John M. Long

Inventor： Charles A. Miller ,  John M. Long

IPC: G06F17/50

CPC classification number: H01L24/49 ,  H01L23/5227 ,  H01L23/60 ,  H01L24/45 ,  H01L24/48 ,  H01L2223/6611 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/49113 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A method for designing integrated circuits (ICs) and their interconnect systems includes IC component cells and interconnect component cells in a cell library. Each IC component cell provides both a physical and behavioral model of a component that may be incorporated into the IC while each interconnect component cell includes both a physical and behavioral model of a separate internal or external component of an interconnect system that may link the IC to external nodes. Both the IC and its interconnect systems are designed by selecting and specifying interconnections between component cells included in the cell library. Interconnect systems are flexibily designed to act like filters tuned to optimize desired frequency response characteristics. Behavior models of the IC and its interconnect systems, based on the behavior models of their selected component, are subjected to simulation and verification tools to determine whether the IC and its interconnect systems meet various performance criteria and constraints. The structural models of the interconnect systems developed during the design process guide subsequent fabrication of interconnect systems for both the IC's intended testing and operating environments.

Abstract translation: 集成电路（IC）及其互连系统的设计方法包括IC元件单元和单元库中的互连元件单元。 每个IC组件单元提供可以并入到IC中的组件的物理和行为模型，而每个互连组件单元包括互连系统的单独的内部或外部组件的物理和行为模型，其可将IC连接到 外部节点。 通过选择和指定包含在单元库中的组件单元之间的互连来设计IC及其互连系统。 互连系统灵活设计为像调谐滤波器一样起作用，以优化所需的频率响应特性。 基于其所选组件的行为模型，IC及其互连系统的行为模型受到仿真和验证工具的影响，以确定IC及其互连系统是否符合各种性能标准和约束。 在设计过程中开发的互连系统的结构模型指导随后为IC的预期测试和操作环境制造互连系统。

公开(公告)号：US5985953A

公开(公告)日：1999-11-16

申请号：US953113

申请日：1997-10-17

Applicant: John W. Lightsey ,  David J. Kneiling ,  John M. Long ,  Andrew C. Kolbert

Inventor： John W. Lightsey ,  David J. Kneiling ,  John M. Long ,  Andrew C. Kolbert

IPC: C08J3/22 ,  C08K9/06 ,  C08K5/54

CPC classification number: C08J3/226 ,  C08K9/06 ,  C08J2409/00

Abstract: A compatibilized silica for incorporation into natural and synthetic polymers in latex form or dry blending operations is described. Said compatibilized silica is formed by the reaction of precipitated or fumed silica with organosilicon coupling compounds in aqueous suspension. Polymer-silica reinforced masterbatches are prepared by addition of the compatibilized silica slurry to natural and synthetic polymer latices. Also described is a process for preparing the compatibilized silica.

Abstract translation: 描述了用于结合到胶乳形式或干混合操作中的天然和合成聚合物中的相容二氧化硅。 所述相容的二氧化硅通过沉淀或热解法二氧化硅与有机硅偶联化合物在水悬浮液中的反应而形成。 聚合物 - 二氧化硅增强的母料通过将相容的二氧化硅浆料加入到天然和合成的聚合物胶乳中来制备。 还描述了制备相容化二氧化硅的方法。

公开(公告)号：US07486095B2

公开(公告)日：2009-02-03

申请号：US11532877

申请日：2006-09-18

Applicant: John M. Long

Inventor： John M. Long

IPC: G01R31/26

CPC classification number: G01R31/2853 ,  G01R27/14 ,  G01R31/31717 ,  G01R31/31905 ,  G01R31/31924 ,  G01R35/00

Abstract: Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are modified so that they may also either transmit a constant current through the I/O ports or link the I/O ports to ground or other reference potential. The tester then transmits known currents though the signal paths interconnecting the tester's I/O ports. Existing comparators within the tester normally used to monitor the state of an IC's digital output signals are employed to measure voltage drops between the I/O ports, thereby to provide data from which resistance of signal paths within the interconnect structure may be computed.

公开(公告)号：US07109736B2

公开(公告)日：2006-09-19

申请号：US10750611

申请日：2003-12-29

Applicant: John M. Long

Inventor： John M. Long

IPC: G01R31/26

CPC classification number: G01R31/2853 ,  G01R27/14 ,  G01R31/31717 ,  G01R31/31905 ,  G01R31/31924 ,  G01R35/00

Abstract: Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are modified so that they may also either transmit a constant current through the I/O ports or link the I/O ports to ground or other reference potential. The tester then transmits known currents though the signal paths interconnecting the tester's I/O ports. Existing comparators within the tester normally used to monitor the state of an IC's digital output signals are employed to measure voltage drops between the I/O ports, thereby to provide data from which resistance of signal paths within the interconnect structure may be computed.

公开(公告)号：US5763388A

公开(公告)日：1998-06-09

申请号：US769207

申请日：1996-12-18

Applicant: John W. Lightsey ,  David J. Kneiling ,  John M. Long

Inventor： John W. Lightsey ,  David J. Kneiling ,  John M. Long

IPC: C08J3/22 ,  C08K9/06 ,  C08K3/36 ,  C08K5/54

CPC classification number: C08J3/226 ,  C08K9/06 ,  C08J2409/00

Abstract: A process for the incorporation of silica into a polymer in latex in which a silica is treated with an organo silicon compound coupling agent in aqueous suspension to form a compatibilized silica and then contacting a polymer latex with the compatibilized silica whereby the silica becomes substantially uniformly distributed throughout the latex and can be recovered when the latex is coagulated to yield little residual silica in the liquid residue from the latex. Also described is a process for preparing the compatibilized silica.

Abstract translation: 一种将二氧化硅掺入胶乳中的聚合物的方法，其中在水性悬浮液中用有机硅化合物偶合剂处理二氧化硅以形成相容的二氧化硅，然后使聚合物胶乳与相容的二氧化硅接触，由此二氧化硅变得基本上均匀分布 在胶乳中，当胶乳凝结时，胶乳的液体残余物中的二氧化硅残留少，可以回收。 还描述了制备相容化二氧化硅的方法。

公开(公告)号：US07948342B2

公开(公告)日：2011-05-24

申请号：US12504763

申请日：2009-07-17

Applicant: John M. Long

Inventor： John M. Long

IPC: H01F27/02 ,  H01F21/02 ,  H01F27/28

CPC classification number: H01F37/00 ,  H01F17/045

Abstract: An AC neutral bus electromotive power rectification unit includes a first coil unit and a second coil unit. The first coil unit includes a first conductive wire coil having a first end and an opposite second end. The conductive coil is disposed in a first non-conductive tube and is suspended in a ferrous matrix. The second coil unit includes a second conductive wire coil having a first end and an opposite second end. The first end of the second coil unit is electrically coupled to the first end of the first coil unit. The second coil unit is disposed in a second non-conductive tube and is surrounded by a non-conductive material.

Abstract translation: 交流中性母线电动整流单元包括第一线圈单元和第二线圈单元。 第一线圈单元包括具有第一端和相对的第二端的第一导线线圈。 导电线圈设置在第一非导电管中并悬浮在铁基体中。 第二线圈单元包括具有第一端和相对的第二端的第二导线线圈。 第二线圈单元的第一端电耦合到第一线圈单元的第一端。 第二线圈单元设置在第二非导电管中并被非导电材料包围。