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    Phase-change random access memory device, system having the same, and associated methods
    1.
    发明授权
    Phase-change random access memory device, system having the same, and associated methods 有权
    相变随机存取存储器件，具有相同的系统和相关方法

    公开(公告)号：US07889546B2

    公开(公告)日：2011-02-15

    申请号：US12285656

    申请日：2008-10-10

    申请人： Joon-min Park ,  Young-kug Moon ,  Won-seok Lee

    发明人： Joon-min Park ,  Young-kug Moon ,  Won-seok Lee

    IPC分类号： G11C11/00

    CPC分类号： G11C7/08 ,  G11C7/18 ,  G11C13/0004 ,  G11C2213/72

    摘要： A phase-change random access memory (PRAM) device includes a PRAM cell array including a first sector and a second sector, a first global bit line coupled to a first local bit line of the first sector and a first local bit line of the second sector, and a first plurality of global bit line discharge units coupled to the first global bit line, the first plurality of global bit line discharge units configured to discharge the first global bit line in response to a first global discharge signal.

    摘要翻译： 相变随机存取存储器（PRAM）装置包括包括第一扇区和第二扇区的PRAM单元阵列，耦合到第一扇区的第一局部位线的第一全局位线和第二扇区的第一局部位线 扇区和耦合到第一全局位线的第一多个全局位线放电单元，第一多个全局位线放电单元被配置为响应于第一全局放电信号而放电第一全局位线。

    Phase-change random access memory device, system having the same, and associated methods
    2.
    发明申请
    Phase-change random access memory device, system having the same, and associated methods 有权
    相变随机存取存储器件，具有相同的系统和相关方法

    公开(公告)号：US20090097306A1

    公开(公告)日：2009-04-16

    申请号：US12285656

    申请日：2008-10-10

    申请人： Joon-min Park ,  Young-kug Moon ,  Won-seok Lee

    发明人： Joon-min Park ,  Young-kug Moon ,  Won-seok Lee

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C7/08 ,  G11C7/18 ,  G11C13/0004 ,  G11C2213/72

    摘要： A phase-change random access memory (PRAM) device includes a PRAM cell array including a first sector and a second sector, a first global bit line coupled to a first local bit line of the first sector and a first local bit line of the second sector, and a first plurality of global bit line discharge units coupled to the first global bit line, the first plurality of global bit line discharge units configured to discharge the first global bit line in response to a first global discharge signal.

    摘要翻译： 相变随机存取存储器（PRAM）装置包括包括第一扇区和第二扇区的PRAM单元阵列，耦合到第一扇区的第一局部位线的第一全局位线和第二扇区的第一局部位线 扇区和耦合到第一全局位线的第一多个全局位线放电单元，第一多个全局位线放电单元被配置为响应于第一全局放电信号而放电第一全局位线。

    Phase change random access memory device
    4.
    发明申请
    Phase change random access memory device 有权
    相变随机存取存储器件

    公开(公告)号：US20070034908A1

    公开(公告)日：2007-02-15

    申请号：US11317292

    申请日：2005-12-27

    申请人： Woo-yeong Cho ,  Jong-soo Seo ,  Ik-chul Kim ,  Young-kug Moon

    发明人： Woo-yeong Cho ,  Jong-soo Seo ,  Ik-chul Kim ,  Young-kug Moon

    IPC分类号： H01L29/80

    CPC分类号： G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0026 ,  H01L27/2409 ,  H01L27/2436

    摘要： A phase-change random access memory device includes a global bit line connected to a write circuit and a read circuit; a plurality of local bit lines, each of which being connected to a plurality of phase-change memory cells; and a plurality of column select transistors selectively connecting the global bit line with each of the plurality of local bit lines. Each column select transistor has a resistance that depends on distance from the write circuit and the read circuit.

    摘要翻译： 相变随机存取存储器件包括连接到写电路和读电路的全局位线; 多个局部位线，每个位线连接到多个相变存储器单元; 以及选择性地将全局位线与多个局部位线中的每一个连接的多个列选择晶体管。 每个列选择晶体管具有取决于与写入电路和读取电路的距离的电阻。

    RESISTANCE VARIABLE MEMORY DEVICE
    5.
    发明申请
    RESISTANCE VARIABLE MEMORY DEVICE 有权
    电阻可变存储器件

    公开(公告)号：US20100125716A1

    公开(公告)日：2010-05-20

    申请号：US12617758

    申请日：2009-11-13

    申请人： Kwang-jin Lee ,  Young-kug Moon ,  Kwang-ho Kim

    发明人： Kwang-jin Lee ,  Young-kug Moon ,  Kwang-ho Kim

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0215 ,  G06F12/0238 ,  G06F2212/7203 ,  G11C7/103 ,  G11C13/0004 ,  G11C13/004 ,  Y02D10/13

    摘要： A resistance variable memory device includes a resistance variable memory cell array, a data register that prefetches read data of the resistance variable memory cell array, a data output unit that receives the prefetched read data from the data register and outputs the received data, and a page mode setting unit that sets one of a first page mode and a second page mode as a page mode. In the first page mode, the data output unit sequentially reads the read data prefetched in the data register as page addresses are sequentially received, and in the second page mode, the data output unit sequentially reads the read data prefetched in the data register after a start page address among a plurality of page addresses has been received

    摘要翻译： 电阻可变存储器件包括电阻可变存储单元阵列，预取电阻可变存储单元阵列的读取数据的数据寄存器，从数据寄存器接收预取的读取数据并输出接收的数据的数据输出单元，以及 页面模式设置单元，其将第一页面模式和第二页面模式之一设置为页面模式。 在第一页面模式中，数据输出单元顺序地读取在数据寄存器中预取的读取数据，因为顺序地接收页面地址，而在第二页面模式中，数据输出单元顺序地读取在数据寄存器中预读取的读取数据 已经接收到多个页地址中的起始页地址

    Phase-change and resistance-change random access memory devices and related methods of performing burst mode operations in such memory devices
    6.
    发明授权
    Phase-change and resistance-change random access memory devices and related methods of performing burst mode operations in such memory devices 有权
    相变和电阻变化随机存取存储器件以及在这种存储器件中执行突发模式操作的相关方法

    公开(公告)号：US08218360B2

    公开(公告)日：2012-07-10

    申请号：US12582880

    申请日：2009-10-21

    申请人： Kwang-Jin Lee ,  Young-kug Moon ,  Young-pil Kim

    发明人： Kwang-Jin Lee ,  Young-kug Moon ,  Young-pil Kim

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C13/004 ,  G11C7/1018 ,  G11C8/18 ,  G11C11/5678 ,  G11C13/00 ,  G11C13/0004

    摘要： Phase-change and resistance-change random access memory devices are provided which include a phase-change or resistance-change memory cell array and a sense amplifier that is configured to amplify data read from the phase-change memory cell array. These random access memory devices are configured to read data from a first word line of the phase-change or resistance-change memory cell array and to insert a dummy burst in which no data is read when a first boundary crossing occurs during a burst mode operation. Related methods of operating phase-change and/or resistance-change random access memory devices in burst mode are also provided.

    摘要翻译： 提供了相变和电阻变化随机存取存储器件，其包括相变或电阻变化存储单元阵列和被配置为放大从相变存储单元阵列读取的数据的读出放大器。 这些随机存取存储器件被配置为从相变或电阻变化存储单元阵列的第一字线读取数据，并且在突发模式操作期间发生第一边界交叉时插入其中没有读取数据的虚拟脉冲串 。 还提供了以突发模式操作相变和/或电阻变化随机存取存储器件的相关方法。

    Resistance-change random access memory device including memory cells connected to discharge elements
    7.
    发明授权
    Resistance-change random access memory device including memory cells connected to discharge elements 有权
    电阻变化随机存取存储器件包括连接到放电元件的存储单元

    公开(公告)号：US08023320B2

    公开(公告)日：2011-09-20

    申请号：US12591238

    申请日：2009-11-13

    申请人： Hye-jin Kim ,  Kwang-ho Kim ,  Young-kug Moon ,  Byung-gil Choi

    发明人： Hye-jin Kim ,  Kwang-ho Kim ,  Young-kug Moon ,  Byung-gil Choi

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0023 ,  G11C7/12 ,  G11C8/12 ,  G11C13/00 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0028

    摘要： A resistance-change random access memory device includes a resistance-change memory cell array having a plurality of resistance-change memory cells, where a plurality of word lines are connected to respective first terminals of the plurality of resistance-change memory cells. A plurality of bit lines are disposed perpendicular to the word lines and connected to respective second terminals of the plurality of resistance-change memory cells. The device also includes a plurality of discharge elements that are capable of connecting or disconnecting respective bit lines from a discharge voltage, where the discharge elements connect the respective bit lines to the discharge voltage before write and read operations.

    摘要翻译： 电阻变化随机存取存储器件包括具有多个电阻变化存储单元的电阻变化存储单元阵列，其中多个字线连接到多个电阻变化存储单元的相应第一端子。 多个位线垂直于字线布置并连接到多个电阻变化存储单元的相应的第二端子。 该装置还包括能够将各个位线与放电电压连接或断开的多个放电元件，其中放电元件在写入和读取操作之前将各个位线连接到放电电压。

    Phase-Change and Resistance-Change Random Access Memory Devices and Related Methods of Performing Burst Mode Operations in Such Memory Devices
    8.
    发明申请
    Phase-Change and Resistance-Change Random Access Memory Devices and Related Methods of Performing Burst Mode Operations in Such Memory Devices 有权
    相变和电阻变化随机存取存储器件以及在这种存储器件中执行突发模式操作的相关方法

    公开(公告)号：US20100124102A1

    公开(公告)日：2010-05-20

    申请号：US12582880

    申请日：2009-10-21

    申请人： Kwang-Jin Lee ,  Young-kug Moon ,  Young-pil Kim

    发明人： Kwang-Jin Lee ,  Young-kug Moon ,  Young-pil Kim

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C13/004 ,  G11C7/1018 ,  G11C8/18 ,  G11C11/5678 ,  G11C13/00 ,  G11C13/0004

    摘要： Phase-change and resistance-change random access memory devices are provided which include a phase-change or resistance-change memory cell array and a sense amplifier that is configured to amplify data read from the phase-change memory cell array. These random access memory devices are configured to read data from a first word line of the phase-change or resistance-change memory cell array and to insert a dummy burst in which no data is read when a first boundary crossing occurs during a burst mode operation. Related methods of operating phase-change and/or resistance-change random access memory devices in burst mode are also provided.

    摘要翻译： 提供了相变和电阻变化随机存取存储器件，其包括相变或电阻变化存储单元阵列和被配置为放大从相变存储单元阵列读取的数据的读出放大器。 这些随机存取存储器件被配置为从相变或电阻变化存储单元阵列的第一字线读取数据，并且在突发模式操作期间发生第一边界交叉时插入其中没有读取数据的虚拟脉冲串 。 还提供了以突发模式操作相变和/或电阻变化随机存取存储器件的相关方法。

    Semiconductor memory device
    9.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08477554B2

    公开(公告)日：2013-07-02

    申请号：US13152316

    申请日：2011-06-03

    申请人： Hak-soo Yu ,  In-gyu Baek ,  Hong-sun Hwang ,  Young-kug Moon

    发明人： Hak-soo Yu ,  In-gyu Baek ,  Hong-sun Hwang ,  Young-kug Moon

    IPC分类号： G11C5/14 ,  G11C5/02 ,  G11C5/06

    CPC分类号： G11C5/063 ,  G11C5/025

    摘要： A semiconductor memory device including a plurality of layers each including a memory cell array and which are stacked over each other; and at least one power plane for supplying power to the layers. The power plane includes a region to which a power voltage is applied and a region to which a ground voltage is applied. The region to which a power voltage is applied is located adjacent to the region to which a ground voltage is applied, and forms a decoupling capacitor therebetween to decouple an influx of power noise to the layers or generation of power noise in the layers.

    摘要翻译： 一种半导体存储器件，包括多个层，每个层包括存储单元阵列并彼此堆叠; 以及用于向层供电的至少一个电力平面。 电力平面包括施加电源电压的区域和施加接地电压的区域。 施加电源电压的区域位于与施加接地电压的区域相邻的位置处，并且在其间形成去耦电容器，以将功率噪声涌入到层中或在层中产生功率噪声。

    Resistance variable memory device
    10.
    发明授权
    Resistance variable memory device 有权
    电阻变量存储器件

    公开(公告)号：US08190851B2

    公开(公告)日：2012-05-29

    申请号：US12617758

    申请日：2009-11-13

    申请人： Kwang-jin Lee ,  Young-kug Moon ,  Kwang-ho Kim

    发明人： Kwang-jin Lee ,  Young-kug Moon ,  Kwang-ho Kim

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0215 ,  G06F12/0238 ,  G06F2212/7203 ,  G11C7/103 ,  G11C13/0004 ,  G11C13/004 ,  Y02D10/13

    摘要： A resistance variable memory device includes a resistance variable memory cell array, a data register that prefetches read data of the resistance variable memory cell array, a data output unit that receives the prefetched read data from the data register and outputs the received data, and a page mode setting unit that sets one of a first page mode and a second page mode as a page mode. In the first page mode, the data output unit sequentially reads the read data prefetched in the data register as page addresses are sequentially received, and in the second page mode, the data output unit sequentially reads the read data prefetched in the data register after a start page address among a plurality of page addresses has been received.

    摘要翻译： 电阻可变存储器件包括电阻可变存储单元阵列，预取电阻可变存储单元阵列的读取数据的数据寄存器，从数据寄存器接收预取的读取数据并输出接收的数据的数据输出单元，以及 页面模式设置单元，其将第一页面模式和第二页面模式之一设置为页面模式。 在第一页面模式中，数据输出单元顺序地读取在数据寄存器中预取的读取数据，因为顺序地接收页面地址，而在第二页面模式中，数据输出单元顺序地读取在数据寄存器中预读取的读取数据 已经接收到多个页地址中的起始页地址。