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26 条记录 (耗时 0.021 秒)

    Disk drive with position detection
    1.
    发明授权
    Disk drive with position detection 失效
    具有位置检测功能的磁盘驱动器

    公开(公告)号：US07394607B2

    公开(公告)日：2008-07-01

    申请号：US11517190

    申请日：2006-09-06

    申请人： Jun Ohno ,  Hiroyasu Tanabe ,  Noboru Suzuki ,  Toshiaki Tsuyoshi

    发明人： Jun Ohno ,  Hiroyasu Tanabe ,  Noboru Suzuki ,  Toshiaki Tsuyoshi

    IPC分类号： G11B15/04 ,  G11B21/02 ,  G11B5/596

    CPC分类号： G11B5/59627

    摘要： Embodiments of the invention provide a disk drive capable of writing information on data tracks even more positively when a shingle write method is adopted. In one embodiment, the disk drive is characterized in that, when information is to be written on a plurality of adjacent data tracks on a recording medium through the shingle write method, writing of information is controlled by detecting an actual writing position based on servo information recorded on the recording medium and determining whether or not the detected actual writing position meets a predetermined condition.

    摘要翻译： 本发明的实施例提供了一种能够在采用瓦楞写入方法时更有效地将信息写入数据轨道的磁盘驱动器。 在一个实施例中，磁盘驱动器的特征在于，当通过瓦板写入方法将信息写入记录介质上的多个相邻数据磁道时，通过基于伺服信息检测实际写入位置来控制信息的写入 记录在记录介质上并确定检测到的实际写入位置是否满足预定条件。

    Disk drive with position detection
    2.
    发明申请
    Disk drive with position detection 失效
    具有位置检测功能的磁盘驱动器

    公开(公告)号：US20070058281A1

    公开(公告)日：2007-03-15

    申请号：US11517190

    申请日：2006-09-06

    申请人： Jun Ohno ,  Hiroyasu Tanabe ,  Noboru Suzuki ,  Toshiaki Tsuyoshi

    发明人： Jun Ohno ,  Hiroyasu Tanabe ,  Noboru Suzuki ,  Toshiaki Tsuyoshi

    IPC分类号： G11B5/58

    CPC分类号： G11B5/59627

    摘要： Embodiments of the invention provide a disk drive capable of writing information on data tracks even more positively when a shingle write method is adopted. In one embodiment, the disk drive is characterized in that, when information is to be written on a plurality of adjacent data tracks on a recording medium through the shingle write method, writing of information is controlled by detecting an actual writing position based on servo information recorded on the recording medium and determining whether or not the detected actual writing position meets a predetermined condition.

    摘要翻译： 本发明的实施例提供了一种能够在采用瓦楞写入方法时更有效地将信息写入数据轨道的磁盘驱动器。 在一个实施例中，磁盘驱动器的特征在于，当通过瓦板写入方法将信息写入记录介质上的多个相邻数据磁道时，通过基于伺服信息检测实际写入位置来控制信息的写入 记录在记录介质上并确定检测到的实际写入位置是否满足预定条件。

    Hard-disk drive
    3.
    发明授权
    Hard-disk drive 有权
    硬盘驱动器

    公开(公告)号：US08089720B2

    公开(公告)日：2012-01-03

    申请号：US12537213

    申请日：2009-08-06

    申请人： Yosuke Urakami ,  Jun Ohno ,  Hideaki Maeda ,  Hiroyasu Tanabe

    发明人： Yosuke Urakami ,  Jun Ohno ,  Hideaki Maeda ,  Hiroyasu Tanabe

    IPC分类号： G11B5/55 ,  G11B5/596

    CPC分类号： G11B5/012 ,  B82Y10/00 ,  G11B5/743 ,  G11B5/82

    摘要： A hard-disk drive. The hard-disk drive includes a magnetic-recording disk in which tracks adjacent to each other are magnetically separated, a spindle motor which drives the magnetic-recording disk, a magnetic-recording head equipped with write element and read element, an actuator for positioning the magnetic-recording head on a predetermined track on the magnetic-recording disk, and a control unit. The control unit is configured to store information about an over-write-only track that is provided for a plurality of tracks including n consecutive tracks in at least a partial radial area of the magnetic-recording disk and an offset amount. In a radial area of the magnetic disk where the over-write-only track is located, the control unit is configured to record with an offset by an offset amount from a center of a track toward the over-write-only track with respect to n−1 tracks of the plurality of n tracks, excluding the over-write-only track.

    摘要翻译： 硬盘驱动器。 硬盘驱动器包括磁记录盘，其中彼此相邻的轨道磁分离，驱动磁记录盘的主轴电机，配备有写元件和读元件的磁记录头，用于定位的致动器 在磁记录盘上的预定轨道上的磁记录头，以及控制单元。 控制单元被配置为存储关于在磁记录盘的至少部分径向区域中包括n个连续轨道的多个轨道提供的仅写入磁道的信息和偏移量。 在位于仅写入磁道的磁盘的径向区域中，控制单元被配置为以偏移量从轨道的中心朝向仅写入磁道的偏移量相对于 除了仅写入磁道之外的多个n个磁道的n-1个磁道。

    SEMICONDUCTOR MEMORY, TEST METHOD OF SEMICONDUCTOR MEMORY AND SYSTEM
    4.
    发明申请
    SEMICONDUCTOR MEMORY, TEST METHOD OF SEMICONDUCTOR MEMORY AND SYSTEM 失效
    半导体存储器，半导体存储器和系统的测试方法

    公开(公告)号：US20090040850A1

    公开(公告)日：2009-02-12

    申请号：US12130480

    申请日：2008-05-30

    申请人： Kaoru Mori ,  Toshikazu Nakamura ,  Jun Ohno ,  Masaki Okuda

    发明人： Kaoru Mori ,  Toshikazu Nakamura ,  Jun Ohno ,  Masaki Okuda

    IPC分类号： G11C29/00 ,  G11C8/00

    CPC分类号： G11C8/18 ,  G11C11/401 ,  G11C11/406 ,  G11C11/40615 ,  G11C29/1201 ,  G11C29/18 ,  G11C29/48 ,  G11C2029/1802

    摘要： An address switch circuit receives a row address signal supplied to a first address terminal group and a column address signal supplied to a second address terminal group. Further, the address switch circuit receives the row address signal supplied to the second address terminal group and thereafter receives the column address signal supplied to the second address terminal group and supplies the received row address signal and the received column address signal to the row decoder and the column decoder during a second operation mode. The number of semiconductor memories that are tested at once can be increased by executing an operation test of the semiconductor memories in the second operation mode. In addition, it becomes possible to test a semiconductor memory using test assets for other semiconductor memories. Consequently, the test efficiency can be improved, and the test cost can be reduced.

    摘要翻译： 地址开关电路接收提供给第一地址端子组的行地址信号和提供给第二地址端子组的列地址信号。 此外，地址开关电路接收提供给第二地址端子组的行地址信号，然后接收提供给第二地址端子组的列地址信号，并将接收到的行地址信号和接收的列地址信号提供给行解码器， 列解码器在第二操作模式期间。 可以通过在第二操作模式下执行半导体存储器的操作测试来增加一次测试的半导体存储器的数量。 此外，可以使用用于其他半导体存储器的测试资产来测试半导体存储器。 因此，可以提高测试效率，并且可以降低测试成本。

    Reduced potential generation circuit operable at low power-supply potential
    6.
    发明授权
    Reduced potential generation circuit operable at low power-supply potential 失效
    减少在低电源电位下工作的电位产生电路

    公开(公告)号：US06798276B2

    公开(公告)日：2004-09-28

    申请号：US10217408

    申请日：2002-08-14

    申请人： Katsuhiro Mori ,  Shinya Fujioka ,  Jun Ohno

    发明人： Katsuhiro Mori ,  Shinya Fujioka ,  Jun Ohno

    IPC分类号： G05F110

    CPC分类号： G05F3/262

    摘要： A power supply circuit includes a first NMOS-type current mirror circuit which compares a first potential with a second potential, a second NMOS-type current mirror circuit which compares the first potential with a third potential, and a potential setting circuit which adjusts the first potential in response to outputs of the first and second NMOS-type current mirror circuits, such that the first potential falls between the second potential and the third potential.

    摘要翻译： 电源电路包括将第一电位与第二电位进行比较的第一NMOS型电流镜电路和将第一电位与第三电位进行比较的第二NMOS型电流镜电路和调整第一电位的电位设定电路 响应于第一和第二NMOS型电流镜电路的输出的电位，使得第一电位落在第二电位和第三电位之间。

    Data transfer method and system
    7.
    发明授权
    Data transfer method and system 失效
    数据传输方式和系统

    公开(公告)号：US07730232B2

    公开(公告)日：2010-06-01

    申请号：US11113181

    申请日：2005-04-25

    申请人： Shinya Fujioka ,  Kotoku Sato ,  Hitoshi Ikeda ,  Yoshiaki Okuyama ,  Jun Ohno

    发明人： Shinya Fujioka ,  Kotoku Sato ,  Hitoshi Ikeda ,  Yoshiaki Okuyama ,  Jun Ohno

    IPC分类号： G06F13/00

    CPC分类号： G06F12/0804 ,  G06F2212/2022 ,  G11C7/1006 ,  G11C11/406 ,  G11C11/40615 ,  G11C16/06 ,  G11C16/3454

    摘要： A data transfer method and system are provided that prevent the length of a time required for writing to a flash memory from appearing on the surface as a system operation when the flash memory is used in place of an SRAM. The method of transferring data includes the steps of writing data from a controller to a volatile memory, placing the volatile memory in a transfer state, transferring the data from the volatile memory in the transfer state to a nonvolatile memory, and releasing the volatile memory from the transfer state in response to confirming completion of the transfer of the data.

    摘要翻译： 提供了一种数据传输方法和系统，其防止写入闪速存储器所需的时间长度出现在表面上，作为使用闪速存储器代替SRAM的系统操作。 传送数据的方法包括以下步骤：将数据从控制器写入易失性存储器，将易失性存储器置于传送状态，将数据从传送状态的易失性存储器传送到非易失性存储器，并将易失性存储器从 响应于确认完成数据传送的传送状态。

    Semiconductor circuit
    8.
    发明申请
    Semiconductor circuit 有权
    半导体电路

    公开(公告)号：US20060273822A1

    公开(公告)日：2006-12-07

    申请号：US11502421

    申请日：2006-08-11

    申请人： Jun Ohno

    发明人： Jun Ohno

    IPC分类号： H03K19/173

    CPC分类号： H03K17/6877 ,  H03K17/687 ,  H03K2217/0036

    摘要： A semiconductor circuit which includes one or plural fuse circuits being disconnectable and having a connected or disconnected state and a control circuit controlling a controlled circuit is provided. The control circuit controls the controlled circuit according to the state of the fuse circuit or the states of the fuse circuits when a normal mode is designated and controls the controlled circuit according to the state of the fuse circuit or the states of the fuse circuits and an input signal or input signals when a test mode is designated.

    摘要翻译： 提供一种半导体电路，其包括可断开并具有连接或断开状态的一个或多个熔丝电路和控制受控电路的控制电路。 当指定正常模式时，控制电路根据熔丝电路的状态或熔丝电路的状态来控制受控电路，并根据熔丝电路的状态或熔丝电路的状态来控制受控电路， 指定测试模式时的输入信号或输入信号。

    Semiconductor memory and method for controlling the same
    9.
    发明申请
    Semiconductor memory and method for controlling the same 有权
    半导体存储器及其控制方法

    公开(公告)号：US20050094480A1

    公开(公告)日：2005-05-05

    申请号：US11001619

    申请日：2004-12-02

    申请人： Shinya Fujioka ,  Shinichi Yamada ,  Kotoku Sato ,  Jun Ohno

    发明人： Shinya Fujioka ,  Shinichi Yamada ,  Kotoku Sato ,  Jun Ohno

    IPC分类号： G11C11/401 ,  G11C7/10 ,  G11C7/22 ,  G11C11/4193 ,  G11C8/02

    CPC分类号： G11C7/1018 ,  G11C7/22 ,  G11C2207/2227

    摘要： A method for controlling a semiconductor memory in which mode register can be set in burst mode. To set an operation mode in burst mode, the semiconductor memory is changed first from the burst mode, through power-down mode, to standby mode of non-burst mode. Then the semiconductor memory is changed to mode register set mode to set the mode register when commands are input in the same predetermined sequence that is used in the non-burst mode.

    摘要翻译： 一种用于控制可以以突发模式设置模式寄存器的半导体存储器的方法。 为了在突发模式下设置操作模式，首先将半导体存储器从突发模式（通过掉电模式）改变为非突发模式的待机模式。 然后，当以与非突发模式中使用的相同的预定顺序输入命令时，半导体存储器被改变为模式寄存器设置模式以设置模式寄存器。