Stacked package of semiconductor device
    1.
    发明授权
    Stacked package of semiconductor device 有权
    堆叠封装的半导体器件

    公开(公告)号:US08368198B2

    公开(公告)日:2013-02-05

    申请号:US12941640

    申请日:2010-11-08

    IPC分类号: H01L23/22

    摘要: Provided is a stacked package of a semiconductor device and a method of manufacturing the same. The stacked package of a semiconductor device may include at least one first semiconductor chip, at least one second semiconductor chip, at least one interposer between the at least one first semiconductor chip and the at least one second semiconductor chip, and a third semiconductor chip on the at least one first semiconductor chip. The at least one first semiconductor chip and the at least one second semiconductor chip may be configured to perform a first function and a second function and each may include a plurality of bonding pads. The third semiconductor chip may be configured to perform a third function which is different from the first and the second functions. The package may further include external connection leads may be configured to electrically connect the third semiconductor chip to the outside.

    摘要翻译: 提供半导体器件的堆叠封装及其制造方法。 半导体器件的堆叠封装可以包括至少一个第一半导体芯片,至少一个第二半导体芯片,至少一个第一半导体芯片和至少一个第二半导体芯片之间的至少一个插入件,以及第三半导体芯片 所述至少一个第一半导体芯片。 所述至少一个第一半导体芯片和所述至少一个第二半导体芯片可以被配置为执行第一功能和第二功能,并且每个可以包括多个键合焊盘。 第三半导体芯片可以被配置为执行与第一和第二功能不同的第三功能。 封装还可以包括外部连接引线可以被配置为将第三半导体芯片电连接到外部。

    STACKED PACKAGE OF SEMICONDUCTOR DEVICE
    2.
    发明申请
    STACKED PACKAGE OF SEMICONDUCTOR DEVICE 有权
    堆叠的半导体器件封装

    公开(公告)号:US20110180937A1

    公开(公告)日:2011-07-28

    申请号:US12941640

    申请日:2010-11-08

    IPC分类号: H01L23/538

    摘要: Provided is a stacked package of a semiconductor device and a method of manufacturing the same. The stacked package of a semiconductor device may include at least one first semiconductor chip, at least one second semiconductor chip, at least one interposer between the at least one first semiconductor chip and the at least one second semiconductor chip, and a third semiconductor chip on the at least one first semiconductor chip. The at least one first semiconductor chip and the at least one second semiconductor chip may be configured to perform a first function and a second function and each may include a plurality of bonding pads. The third semiconductor chip may be configured to perform a third function which is different from the first and the second functions. The package may further include external connection leads may be configured to electrically connect the third semiconductor chip to the outside.

    摘要翻译: 提供半导体器件的堆叠封装及其制造方法。 半导体器件的堆叠封装可以包括至少一个第一半导体芯片,至少一个第二半导体芯片,至少一个第一半导体芯片和至少一个第二半导体芯片之间的至少一个插入件,以及第三半导体芯片 所述至少一个第一半导体芯片。 所述至少一个第一半导体芯片和所述至少一个第二半导体芯片可以被配置为执行第一功能和第二功能,并且每个可以包括多个键合焊盘。 第三半导体芯片可以被配置为执行与第一和第二功能不同的第三功能。 封装还可以包括外部连接引线可以被配置为将第三半导体芯片电连接到外部。

    Multi stack package with package lid
    5.
    发明申请
    Multi stack package with package lid 审中-公开
    多层包装与包装盖

    公开(公告)号:US20070176284A1

    公开(公告)日:2007-08-02

    申请号:US11652551

    申请日:2007-01-12

    申请人: Jun-Young Choi

    发明人: Jun-Young Choi

    IPC分类号: H01L23/34

    摘要: A multi stack package with a package lid may be provided. In the multi stack package, the package lid, which may be positioned on an upper part of a semiconductor package module of the stacked semiconductor package modules, may include a device to improve the electrical performance such as the signal transferring quality of semiconductor chips. The device may be inside or on a surface of the printed circuit board core forming the package lid. The devices, which may be formed on the semiconductor package module substrate in a conventional multi stack package, may be included in the package lid, thereby securing a region for circuit design on the semiconductor package module substrate.

    摘要翻译: 可以提供具有封装盖的多堆叠封装。 在多堆叠封装中,可以位于层叠的半导体封装模块的半导体封装模块的上部的封装盖可以包括用于改善电性能的装置,例如半导体芯片的信号传输质量。 该装置可以在形成封装盖的印刷电路板芯的内部或表面上。 可以在传统的多堆叠封装中形成在半导体封装模块衬底上的器件可以包括在封装盖中,从而将用于电路设计的区域固定在半导体封装模块衬底上。