Interleaving apparatus and method for orthogonal frequency division multiplexing transmitter
    1.
    发明申请
    Interleaving apparatus and method for orthogonal frequency division multiplexing transmitter 有权
    正交频分复用发射机的交错装置和方法

    公开(公告)号:US20060123323A1

    公开(公告)日:2006-06-08

    申请号:US11129125

    申请日:2005-05-12

    申请人: Jung Kim Hun Kang Do Kim

    发明人: Jung Kim Hun Kang Do Kim

    IPC分类号: G11C29/00

    CPC分类号: G11C7/1042 H04L27/2608

    摘要: An interleaving apparatus and method for an OFDM transmitter are provided. The interleaving apparatus comprises a memory unit, a memory write/read control unit, a memory access address generation unit, and a second permutation and output selection unit. The memory unit includes a plurality of memory banks, which are capable of being independently controlled so that data can be written or read in/from the memory banks, each having memory cells arranged in an NxM matrix structure. The memory write/read control unit generates control signals to write/read data in/from the memory unit. The memory access address generation unit generates a memory access address used to write/read data in/from the memory unit in response to the memory write/read control signals. The second permutation and output selection unit rearranges the positions of data bits output from the memory unit and outputs the position-rearranged data bits.

    摘要翻译: 提供了一种用于OFDM发射机的交织装置和方法。 交织装置包括存储单元,存储器写入/读取控制单元,存储器访问地址生成单元和第二置换和输出选择单元。 存储单元包括多个存储体,其能够被独立地控制,使得数据可以从存储体中写入/读出,每个存储体具有以N×M矩阵结构排列的存储单元。 存储器写入/读取控制单元产生用于在/从存储器单元写入/读取数据的控制信号。 存储器访问地址生成单元响应于存储器写入/读取控制信号生成用于向/从存储器单元写入/读取数据的存储器访问地址。 第二置换和输出选择单元重新排列从存储器单元输出的数据位的位置,并输出位置重新排列的数据位。

    Apparatus for calculating phase using binary search
    2.
    发明申请
    Apparatus for calculating phase using binary search 失效
    使用二进制搜索计算相位的装置

    公开(公告)号:US20070127596A1

    公开(公告)日:2007-06-07

    申请号:US11634554

    申请日:2006-12-06

    申请人: Hun Kang Do Kim

    发明人: Hun Kang Do Kim

    IPC分类号: H04L27/00

    摘要: A phase calculation apparatus using a binary search is provided. The phase calculation apparatus includes a quarter surface preprocessor determining the bigger one between an absolute value of I component data and an absolute value of Q component data as horizontal component data and the smaller one as perpendicular component data, and detecting information on a phase region indicating an mth (m=1 to 8) phase region (the mth phase region is between (m−1) π/4 and m π/4 in which the I/Q component data are located; a phase representative value detector detecting phase representative values x corresponding to the horizontal component data and the perpendicular component data; and a quarter surface postprocessor calculating phase values of the I/Q component data based on the detected information about the phase region and the detected phase representative values x. The phase can be calculated using a limited memory, low complexity of calculation and regardless of the number of bits of I/Q component data.

    摘要翻译: 提供了使用二进制搜索的相位计算装置。 相位计算装置包括四分之一表面预处理器,其确定I分量数据的绝对值和Q分量数据的绝对值之间的较大值作为水平分量数据,较小的一个作为垂直分量数据,并且检测关于指示 第m(m = 1〜8)相区域(第m〜第0相)区域在(m-1)pi / 4和m pi / 4之间,其中 定位I / Q分量数据;相位代表值检测器,检测与水平分量数据和垂直分量数据相对应的相位代表值x;以及四分之一表面后处理器,基于检测到的信息计算I / Q分量数据的相位值 关于相位区域和检测到的相位代表值x,可以使用有限的存储器,低计算复杂度来计算相位,而不管I / Q分量数据的位数。

    Received asynchronous transfer mode layer operation and maintenance cell
processing apparatus
    4.
    发明授权
    Received asynchronous transfer mode layer operation and maintenance cell processing apparatus 失效
    接收异步传输模式层操作和维护单元处理设备

    公开(公告)号:US5872770A

    公开(公告)日:1999-02-16

    申请号:US753014

    申请日:1996-11-19

    摘要: A received ATM layer OAM cell processing apparatus for processing in real time a fault management cell among ATM layer OAM cells of F4/F5 levels applied to a user network interface and a network node interface and performing CRC-10 and CRC-32 operations with respect to the other ATM layer OAM cells such as activation/deactivation cells, a resource management cell, a system management cell and a meta signaling cell, not processed in real time. Further, the received ATM layer OAM cell processing apparatus processes in real time a performance management cell among the ATM layer OAM cells of F4/F5 levels applied to the user network interface and network node interface. Therefore, the received ATM layer OAM cell processing apparatus can accumulate in real time performance information such as the total number of received performance management cell blocks, the number of received error cell blocks, the number of received excessive errored cell blocks, the number of lost cells, the number of misinserted cells, the number of discarded cells, the number of tagged cells and the total number of received cells with respect to a specified ATM virtual connection, thereby measuring the service quality and network parameter.

    摘要翻译: 一种接收的ATM层OAM单元处理装置,用于实时处理应用于用户网络接口和网络节点接口的F4 / F5级别的ATM层OAM小区中的故障管理小区,并且执行CRC-10和CRC-32操作 到没有实时处理的其他ATM层OAM单元,例如激活/去激活单元,资源管理单元,系统管理单元和元信令单元。 此外,所接收的ATM层OAM单元处理装置实时地处理应用于用户网络接口和网络节点接口的F4 / F5级别的ATM层OAM小区中的性能管理小区。 因此,接收的ATM层OAM单元处理装置可以实时地存储性能信息,例如接收到的性能管理单元块的总数,接收到的错误单元块的数量,接收到的过多错误单元块的数量,丢失的数量 单元,错误插入的单元的数量,丢弃的单元的数量,标记的单元的数量和相对于指定的ATM虚拟连接的接收单元的总数,从而测量服务质量和网络参数。

    OXYGEN ATOM-DISPERSED METAL MATRIX COMPOSITE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    OXYGEN ATOM-DISPERSED METAL MATRIX COMPOSITE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    氧原子分散金属基复合材料及其制造方法

    公开(公告)号:US20140127069A1

    公开(公告)日:2014-05-08

    申请号:US14129359

    申请日:2012-06-26

    IPC分类号: C22C32/00 B22D19/14 B22F3/14

    摘要: Disclosed is a method of manufacturing a metal matrix composite in which oxide nanoparticles are dispersed. Metal matrix composite powders in which oxide nanoparticles are dispersed are prepared. Gibbs free energy of the oxide nanoparticles is greater than that of an oxide of a metal matrix. A bulk processed material is manufactured from the composite powders through hot forming or a cast material is manufactured by inputting the composite powder into a molten base metal and then rapidly stirring a resultant mixture. The bulk processed material or the cast material is heat-treated so that atoms of the metal matrix and atoms of the oxide nanoparticles mutually diffuse. Oxygen atoms originating from the oxide nanoparticles are diffused and dispersed in the metal matrix.

    摘要翻译: 公开了一种其中分散氧化物纳米颗粒的金属基质复合材料的制造方法。 制备分散有氧化物纳米粒子的金属基质复合粉末。 氧化物纳米颗粒的吉布斯自由能大于金属基质的氧化物的自由能。 通过热成型由复合粉末制造散装处理材料,或者通过将复合粉末输入到熔融基底金属中,然后快速搅拌所得混合物来制造铸造材料。 本体加工材料或铸造材料被热处理,使得金属基体的原子和氧化物纳米颗粒的原子相互扩散。 来自氧化物纳米颗粒的氧原子扩散并分散在金属基质中。

    Automatic gain control apparatus
    6.
    发明申请
    Automatic gain control apparatus 失效
    自动增益控制装置

    公开(公告)号:US20050135513A1

    公开(公告)日:2005-06-23

    申请号:US10986645

    申请日:2004-11-12

    CPC分类号: H04L27/3809 H03G3/3036

    摘要: The present invention relates an automatic gain control device, which performs a high-speed gain control operation in high-speed data communication using burst signals, generates a gain code without using a memory or storage device to simplify a system configuration, and establishes a correct gain control operation. The automatic gain control apparatus includes a power detector for calculating a mean power of the output signal of the variable gain amplifier; a gain code generator for receiving a mean power from the power detector, and generating a gain code corresponding to the received mean power; and a voltage generator for calculating a difference between the gain code and a target gain code associated with the output signal of the variable gain amplifier to detect an error code, and generating a gain control voltage for compensating for the difference between the two gain codes on the basis of the detected error code.

    摘要翻译: 本发明涉及一种使用突发信号在高速数据通信中执行高速增益控制操作的自动增益控制装置,不使用存储器或存储装置来产生增益码来简化系统配置,并建立正确的 增益控制操作。 自动增益控制装置包括:功率检测器,用于计算可变增益放大器的输出信号的平均功率; 增益代码发生器,用于从所述功率检测器接收平均功率,以及生成与所接收的平均功率相对应的增益代码; 以及电压发生器,用于计算增益代码和与可变增益放大器的输出信号相关联的目标增益代码之间的差异,以检测错误代码,并产生用于补偿两个增益代码之间的差的增益控制电压 检测错误代码的基础。

    Adaptive clock recovery apparatus for supporting multiple bit
transmission rates
    7.
    发明授权
    Adaptive clock recovery apparatus for supporting multiple bit transmission rates 失效
    用于支持多位传输速率的自适应时钟恢复装置

    公开(公告)号:US5802119A

    公开(公告)日:1998-09-01

    申请号:US754093

    申请日:1996-11-20

    摘要: An adaptive clock recovery apparatus. The adaptive clock recovery apparatus comprises a clock switching unit for switching a sample clock to be input from outside according to an adaptive clock controlling signal; a sample counting unit for inputting both a reset signal from the outside and an output from the clock switching unit, and outputting sample data by an operation depending upon a buffer state signal; an adaptive clock controlling unit for inputting the sample clock, the buffer state signal, the reset signal, and the sample data from the sample counting unit, and outputting the adaptive clock controlling signal to the clock switching unit; a reception frequency processing unit for inputting reception frequency from outside, and outputting frequency set up data; an adaptive clock generating unit for inputting both the frequency set up data from the reception frequency processing unit and the adaptive clock controlling signal from the adaptive clock controlling unit, and outputting the adaptive clock to the outside; and a buffering unit for outputting image data input from outside to the outside according to the adaptive clock of the adaptive clock generating unit, and also outputting the buffer state signal to the adaptive clock controlling unit and the sample counting unit, respectively.

    摘要翻译: 一种自适应时钟恢复装置。 自适应时钟恢复装置包括:时钟切换单元,用于根据自适应时钟控制信号切换从外部输入的采样时钟; 用于输入来自外部的复位信号和来自时钟切换单元的输出的采样计数单元,并且根据缓冲器状态信号通过操作输出采样数据; 自适应时钟控制单元,用于从采样计数单元输入采样时钟,缓冲器状态信号,复位信号和采样数据,并将自适应时钟控制信号输出到时钟切换单元; 接收频率处理单元,用于从外部输入接收频率,并输出频率设置数据; 自适应时钟发生单元,用于从接收频率处理单元输入频率设置数据和来自自适应时钟控制单元的自适应时钟控制信号,并将自适应时钟输出到外部; 以及缓冲单元,用于根据自适应时钟生成单元的自适应时钟输出从外部向外部输入的图像数据,并且还将缓冲器状态信号分别输出到自适应时钟控制单元和采样计数单元。

    ALLOY MATERIAL IN WHICH ARE DISPERSED OXYGEN ATOMS AND A METAL ELEMENT OF OXIDE-PARTICLES, AND PRODUCTION METHOD FOR SAME
    8.
    发明申请
    ALLOY MATERIAL IN WHICH ARE DISPERSED OXYGEN ATOMS AND A METAL ELEMENT OF OXIDE-PARTICLES, AND PRODUCTION METHOD FOR SAME 审中-公开
    分散的氧化物和氧化物颗粒的金属元素的合金材料及其生产方法

    公开(公告)号:US20140186207A1

    公开(公告)日:2014-07-03

    申请号:US14000661

    申请日:2012-06-22

    IPC分类号: C22C23/00 C22F1/06

    摘要: According to one embodiment of the present invention, a cast alloy material is provided. The cast alloy material includes a matrix metal and an alloy element, wherein oxide particles in a nanometer scale are decomposed in the matrix metal, so that a new phase including a metal element that is a component of the oxide particles and the alloy element forms a band or network structure, wherein the metal element and the alloy element have a relationship of a negative heat of mixing, and wherein oxygen atoms formed by decomposition of the oxide particles are dispersed in the matrix metal and do not form an oxide with the matrix metal.

    摘要翻译: 根据本发明的一个实施例,提供铸造合金材料。 铸造合金材料包括基体金属和合金元素,其中纳米级的氧化物颗粒在基体金属中分解,使得包括作为氧化物颗粒的组分的金属元素和合金元素形成的新相 带状或网状结构,其中金属元素和合金元素具有负混合热的关系,并且其中由氧化物颗粒分解形成的氧原子分散在基质金属中并且不与基质金属形成氧化物 。

    Dual receive, dual transmit fault tolerant network arrangement and
packet handling method
    10.
    发明授权
    Dual receive, dual transmit fault tolerant network arrangement and packet handling method 失效
    双重接收,双重传输容错网络布置和数据包处理方法

    公开(公告)号:US6041036A

    公开(公告)日:2000-03-21

    申请号:US990047

    申请日:1997-12-12

    CPC分类号: H04L12/437

    摘要: A fault tolerant network using a dual cross path for real-time switching and packet handling method are disclosed. In DRDT-II, one of two packets received from two input ports is selected, the other is discarded, and two duplicated packets are transmitted through two output ports. That is, one link bypasses one node. In DRDT-III, the other link bypasses two nodes. Even when fault occurs in neighboring nodes at the same time, only these nodes are abandoned, and remaining nodes can be communicated with one another, improving the reliability of the network.

    摘要翻译: 公开了一种使用双交叉路径进行实时切换和分组处理方法的容错网络。 在DRDT-II中,选择从两个输入端口接收的两个数据包中的一个,另一个被丢弃,两个复制的数据包通过两个输出端口传输。 也就是说,一个链路绕过一个节点。 在DRDT-III中,其他链路绕过两个节点。 即使在相邻节点同时发生故障时,只有这些节点被放弃,并且剩余的节点可以彼此通信,从而提高网络的可靠性。