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263 条记录 (耗时 0.031 秒)

    Grooved gate transistor having source and drain diffused layers with specified groove corner shape
    1.
    发明授权
    Grooved gate transistor having source and drain diffused layers with specified groove corner shape 失效
    沟槽栅极晶体管，具有指定槽角形状的源极和漏极扩散层

    公开(公告)号：US5408116A

    公开(公告)日：1995-04-18

    申请号：US105330

    申请日：1993-08-09

    申请人： Junko Tanaka ,  Toru Toyabe ,  Shin'ichiro Kimura ,  Hiromasa Noda ,  Sigeo Ihara ,  Kiyoo Itoh ,  Yasushi Gotoh

    发明人： Junko Tanaka ,  Toru Toyabe ,  Shin'ichiro Kimura ,  Hiromasa Noda ,  Sigeo Ihara ,  Kiyoo Itoh ,  Yasushi Gotoh

    IPC分类号： H01L29/78 ,  B82B1/00 ,  H01L27/108 ,  H01L29/06 ,  H01L29/12 ,  H01L29/423

    CPC分类号： H01L29/125 ,  B82Y10/00 ,  H01L27/10808 ,  H01L29/78

    摘要： A finely structured grooved gate transistor of which the threshold voltage does not decrease in spite of the small size and of which the threshold voltage of the transistor can be adjusted by shape. The shape of a groove corner of the transistor as a semiconductor device is contained in a concentric circle having a radius of curvature r.+-.L/5 (L: channel length) and the radius of curvature r, i.e., the geometric parameter has a relationship with the doping concentration as shown in FIG. 1B. Alternatively, the average (a+b)/2 (geometric parameter) of the sum of the two sides opposite the right angle of a right triangle formed of a straight line in contact with the gate bottom in parallel to the substrate surface of a grooved gate transistor, a perpendicular line to the substrate bottom surface from the source and drain ends at a portion formed with a channel and a straight line in contact with the groove corner has a relationship with the doping concentration as shown in FIG. 1B. The threshold voltage is not reduced even when the channel length is decreased by adjusting the groove shape and the doping concentration.

    摘要翻译： 尽管尺寸小，但是其晶体管的阈值电压可以通过形状来调整，其中阈值电压不降低的精细结构的开槽栅极晶体管。 作为半导体器件的晶体管的槽角的形状包含在具有曲率半径r +/- L / 5（L：沟道长度）和曲率半径r的同心圆中，即几何参数具有 与掺杂浓度的关系如图1所示。 1B。 或者，平行于沟槽的基板表面的与栅极底部接触的直线形成的直角三角形的直角相反的两侧的平均（a + b）/ 2（几何参数） 栅极晶体管，在形成有沟道的部分处的源极和漏极端部处的与衬底底表面的垂直线和与沟槽角接触的直线与图1所示的掺杂浓度具有关系。 1B。 即使通过调整沟槽形状和掺杂浓度来减小沟道长度，阈值电压也不会降低。

    Semiconductor integrated circuit device and method of activating same
    5.
    发明授权
    Semiconductor integrated circuit device and method of activating same 有权
    半导体集成电路器件及其激活方法

    公开(公告)号：US06424586B1

    公开(公告)日：2002-07-23

    申请号：US10040435

    申请日：2002-01-09

    申请人： Hiromasa Noda ,  Masakazu Aoki ,  Youji Idei ,  Kazuhiko Kajigaya ,  Osamu Nagashima ,  Kiyoo Itoh ,  Masashi Horiguchi ,  Takeshi Sakata

    发明人： Hiromasa Noda ,  Masakazu Aoki ,  Youji Idei ,  Kazuhiko Kajigaya ,  Osamu Nagashima ,  Kiyoo Itoh ,  Masashi Horiguchi ,  Takeshi Sakata

    IPC分类号： G11C700

    CPC分类号： G11C5/14 ,  G11C5/147 ,  G11C11/4074 ,  H03K19/0016

    摘要： A dynamic RAM is divided into an input circuit block responsive to an input signal supplied from an external terminal, inclusive of an operation start signal, an internal circuit block activated in response to the signal inputted from the input circuit block, and an output circuit block for outputting a signal outputted from the internal circuit block to an external terminal. A plurality of switch MOSFETs are provided in parallel form between a power line for applying an operating voltage supplied from an external terminal and an internal power line for a first circuit portion in the internal circuit block, which does not need a storage operation upon its non-operating state. Further, the switch MOSFETs are stepwise turned on in response to controls signals produced by delaying a start signal supplied through the input circuit block in turn, so as to perform the supply of each operating voltage.

    摘要翻译： 动态RAM被分成响应于从外部端子提供的输入信号的输入电路块，包括操作开始信号，响应于从输入电路块输入的信号而被激活的内部电路块，以及输出电路块 用于将从内部电路块输出的信号输出到外部端子。 在用于施加从外部端子提供的工作电压的电力线和用于内部电路块中的第一电路部分的内部电力线之间的并行形式提供多个开关MOSFET，其不需要在其非正常状态下的存储操作 操作状态。 此外，响应于通过延迟通过输入电路块提供的启动信号而产生的控制信号，开关MOSFET逐步导通，以便执行每个工作电压的供应。

    Semiconductor integrated circuit device and method of activating the same
    6.
    发明授权
    Semiconductor integrated circuit device and method of activating the same 失效
    半导体集成电路器件及其激活方法

    公开(公告)号：US5926430A

    公开(公告)日：1999-07-20

    申请号：US985425

    申请日：1997-12-05

    申请人： Hiromasa Noda ,  Masakazu Aoki ,  Youji Idei ,  Kazuhiko Kajigaya ,  Osamu Nagashima ,  Kiyoo Itoh ,  Masashi Horiguchi ,  Takeshi Sakata

    发明人： Hiromasa Noda ,  Masakazu Aoki ,  Youji Idei ,  Kazuhiko Kajigaya ,  Osamu Nagashima ,  Kiyoo Itoh ,  Masashi Horiguchi ,  Takeshi Sakata

    IPC分类号： G11C11/407 ,  G11C5/14 ,  G11C11/4074 ,  H03K19/00 ,  H03K17/16

    CPC分类号： G11C5/14 ,  G11C11/4074 ,  G11C5/147 ,  H03K19/0016

    摘要： A dynamic RAM is divided into an input circuit block responsive to an input signal supplied from an external terminal, inclusive of an operation start signal, an internal circuit block activated in response to the signal inputted from the input circuit block, and an output circuit block for outputting a signal outputted from the internal circuit block to an external terminal. A plurality of switch MOSFETs are provided in parallel between a power line for applying an operating voltage supplied from an external terminal and an internal power line for a first circuit portion in the internal circuit block, which does not need a storage operation upon reaching its non-operating state. Further, the switch MOSFETs are stepwise turned on in response to controls signals produced by delaying a start signal supplied through the input circuit block in turn, so as to perform the supply of each operating voltage.

    摘要翻译： 动态RAM被分成响应于从外部端子提供的输入信号的输入电路块，包括操作开始信号，响应于从输入电路块输入的信号而被激活的内部电路块，以及输出电路块 用于将从内部电路块输出的信号输出到外部端子。 在用于施加从外部端子提供的工作电压的电力线和用于内部电路块中的第一电路部分的内部电力线的并行设置多个开关MOSFET，其在达到其非电压时不需要存储操作 操作状态。 此外，响应于通过延迟通过输入电路块提供的启动信号而产生的控制信号，开关MOSFET逐步导通，以便执行每个工作电压的供应。

    Semiconductor integrated circuit device and method of activating the same
    7.
    发明授权
    Semiconductor integrated circuit device and method of activating the same 有权
    半导体集成电路器件及其激活方法

    公开(公告)号：US06396761B2

    公开(公告)日：2002-05-28

    申请号：US09875169

    申请日：2001-06-07

    申请人： Hiromasa Noda ,  Masakazu Aoki ,  Youji Idei ,  Kazuhiko Kajigaya ,  Osamu Nagashima ,  Kiyoo Itoh ,  Masashi Horiguchi ,  Takeshi Sakata

    发明人： Hiromasa Noda ,  Masakazu Aoki ,  Youji Idei ,  Kazuhiko Kajigaya ,  Osamu Nagashima ,  Kiyoo Itoh ,  Masashi Horiguchi ,  Takeshi Sakata

    IPC分类号： G11C700

    CPC分类号： G11C5/14 ,  G11C5/147 ,  G11C11/4074 ,  H03K19/0016

    摘要： A dynamic RAM is divided into an input circuit block responsive to an input signal supplied from an external terminal, inclusive of an operation start signal, an internal circuit block activated in response to the signal inputted from the input circuit block, and an output circuit block for outputting a signal outputted from the internal circuit block to an external terminal. A plurality of switch MOSFETs are provided in parallel form between a power line for applying an operating voltage supplied from an external terminal and an internal power line for a first circuit portion in the internal circuit block, which does not need a storage operation upon its non-operating state. Further, the switch MOSFETs are stepwise turned on in response to controls signals produced by delaying a start signal supplied through the input circuit block in turn, so as to perform the supply of each operating voltage.

    摘要翻译： 动态RAM被分成响应于从外部端子提供的输入信号的输入电路块，包括操作开始信号，响应于从输入电路块输入的信号而被激活的内部电路块，以及输出电路块 用于将从内部电路块输出的信号输出到外部端子。 在用于施加从外部端子提供的工作电压的电力线和用于内部电路块中的第一电路部分的内部电力线之间的并行形式提供多个开关MOSFET，其不需要在其非正常状态下的存储操作 操作状态。 此外，响应于通过延迟通过输入电路块提供的启动信号而产生的控制信号，开关MOSFET逐步导通，以便执行每个工作电压的供应。