公开(公告)号：US20150228674A1

公开(公告)日：2015-08-13

申请号：US14423838

申请日：2013-08-30

申请人： KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.) ,  Samsung Display Co., Ltd.

发明人： Aya Miki ,  Shinya Morita ,  Hiroshi Goto ,  Hiroaki Tao ,  Toshihiro Kugimiya ,  Byung Du Ahn ,  Gun Hee Kim ,  Jin Hyun Park ,  Yeon Hong Kim

IPC分类号： H01L27/12 ,  H01L29/40 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L29/408 ,  H01L29/4908 ,  H01L29/51 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.

摘要翻译： 提供一种薄膜晶体管，其设置有氧化物半导体薄膜层，并且具有由于光，偏压应力等而不会变化太大的阈值电压，从而表现出优异的应力稳定性。 本发明的薄膜晶体管设置有栅电极，由用作沟道层的单层组成的氧化物半导体层，用于保护氧化物半导体层的表面的蚀刻停止层，源极 - 漏极 电极和布置在栅电极和沟道层之间的栅极绝缘体层。 构成氧化物半导体层的金属元素包括In，Zn和Sn。 与氧化物半导体层直接接触的栅极绝缘体层中的氢浓度被控制在4原子％以下。

公开(公告)号：US09449990B2

公开(公告)日：2016-09-20

申请号：US14423838

申请日：2013-08-30

申请人： KOBE STEEL, LTD. ,  Samsung Display Co., Ltd.

发明人： Aya Miki ,  Shinya Morita ,  Hiroshi Goto ,  Hiroaki Tao ,  Toshihiro Kugimiya ,  Byung Du Ahn ,  Gun Hee Kim ,  Jin Hyun Park ,  Yeon Hong Kim

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L29/51 ,  H01L29/40 ,  H01L21/02

CPC分类号： H01L27/1225 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L29/408 ,  H01L29/4908 ,  H01L29/51 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.

摘要翻译： 提供一种薄膜晶体管，其设置有氧化物半导体薄膜层，并且具有由于光，偏压应力等而不会变化太大的阈值电压，从而表现出优异的应力稳定性。 本发明的薄膜晶体管设置有栅电极，由用作沟道层的单层组成的氧化物半导体层，用于保护氧化物半导体层的表面的蚀刻停止层，源极 - 漏极 电极和布置在栅电极和沟道层之间的栅极绝缘体层。 构成氧化物半导体层的金属元素包括In，Zn和Sn。 与氧化物半导体层直接接触的栅极绝缘体层中的氢浓度被控制在4原子％以下。

公开(公告)号：US09159839B2

公开(公告)日：2015-10-13

申请号：US14180171

申请日：2014-02-13

申请人： Samsung Display Co., Ltd.

发明人： Gun Hee Kim ,  Jin Hyun Park ,  Kyoung Won Lee ,  Byung Du Ahn ,  Jee-Hun Lim ,  Jun Hyung Lim

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1288

摘要： A thin film transistor array panel includes: a gate electrode disposed on a substrate, an insulating layer disposed on the gate electrode, an oxide semiconductor disposed on the gate insulating layer, source electrode overlapping a portion of the oxide semiconductor, a drain electrode overlapping another portion of the oxide semiconductor; and a buffer layer disposed between the oxide semiconductor and the source electrode and between the oxide semiconductor and the drain electrode. The buffer layer comprises tin as a doping material. A weight percent of the doping material is greater than approximately 0% and less than or equal to approximately 20%.

摘要翻译： 薄膜晶体管阵列面板包括：设置在基板上的栅极电极，设置在栅电极上的绝缘层，设置在栅极绝缘层上的氧化物半导体，与氧化物半导体的一部分重叠的源电极，与另一个重叠的漏电极 部分氧化物半导体; 以及设置在氧化物半导体和源电极之间以及氧化物半导体和漏电极之间的缓冲层。 缓冲层包含锡作为掺杂材料。 掺杂材料的重量百分比大于约0％且小于或等于约20％。

公开(公告)号：US09583633B2

公开(公告)日：2017-02-28

申请号：US14392369

申请日：2014-02-27

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Byung Du Ahn ,  Gun Hee Kim ,  Yeon-Hong Kim ,  Jin Hyun Park ,  Shuji Kosaka ,  Kazushi Hayashi

IPC分类号： H01L29/10 ,  H01L21/00 ,  H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L21/02

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/1225 ,  H01L29/66969

摘要： In an oxide for a semiconductor layer of a thin film transistor according to the present invention, wherein metal elements constituting the oxide are In, Zn, and Sn, an oxygen partial pressure is 15% by volume or more when depositing the oxide in the semiconductor layer of the thin film transistor, and a defect density of the oxide satisfies 7.5×1015cm−3 or less, and a mobility satisfies 15 cm2/Vs or more.

摘要翻译： 在本发明的薄膜晶体管用半导体层用氧化物中，构成氧化物的金属元素为In，Zn，Sn，在半导体中沉积氧化物时的氧分压为15体积％以上 薄膜晶体管的层，氧化物的缺陷密度为7.5×10 15 cm -3以下，迁移率为15cm 2 / Vs以上。