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公开(公告)号：US09489977B1
公开(公告)日：2016-11-08
申请号：US14959373
申请日：2015-12-04
发明人： Kohsuke Harada , Akihiro Yamazaki , Tomokazu Okubo
CPC分类号： G11B20/10046 , G11B20/1252 , G11B20/1496
摘要： According to one embodiment, there is provided a storage device including a data converter, a recording medium, and an equalizer. The data converter converts data into sets of n number of four-ary symbols according to mapping rules in which 22n-1 or fewer types of bit labels are mapped onto the n number of four-ary symbols, where n is an integer of two or greater. Onto the recording medium, the converted n number of four-ary symbols are recorded in the form of a signal of one level among four levels. The equalizer equalizes a signal read from the recording medium into sets of the n number of four-ary symbols.
摘要翻译： 根据一个实施例，提供了一种包括数据转换器，记录介质和均衡器的存储设备。 数据转换器根据其中22n-1或更少类型的位标签被映射到n个四进制符号的映射规则将数据转换成n个四进制符号的集合，其中n是2或2的整数， 更大 在记录介质上，转换后的n个4进制符号以4级的一级信号的形式被记录。 均衡器将从记录介质读取的信号均衡为n个四进制符号的集合。
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公开(公告)号：US09171629B1
公开(公告)日：2015-10-27
申请号：US14478292
申请日：2014-09-05
发明人： Naoaki Kokubun , Osamu Torii , Kohsuke Harada , Riki Suzuki
CPC分类号： G11C16/10 , G06F11/1072 , G11C11/5628 , G11C2211/5641
摘要： According to one embodiment, a storage device comprises a nonvolatile memory and a memory controller that performs reading and writing data from and into the nonvolatile memory. A number, not being 2n, of threshold areas can be set in the memory cells of the nonvolatile memory. The memory controller performs first writing based on first data value assignment, which sets 2n data values to correspond to 2n threshold areas, in first-time writing into a first memory cell of the nonvolatile memory and performs second writing on the first memory cell after the first writing without erasing data based on second data value assignment, which sets 2n data values to correspond to 2n threshold areas including threshold areas not used in the first data value assignment.
摘要翻译： 根据一个实施例，存储设备包括非易失性存储器和执行从非易失性存储器读取数据和向非易失性存储器写入数据的存储器控制器。 可以在非易失性存储器的存储单元中设置不是2n的阈值区域的数目。 存储器控制器基于第一数据值分配执行首次写入，其首先将2n个数据值设置为对应于2n个阈值区域，首次写入到非易失性存储器的第一存储单元中，并且在第一存储器单元之后执行第二写入 首先写入而不擦除基于第二数据值分配的数据，其将2n个数据值设置为对应于包括在第一数据值分配中未使用的阈值区域的2n个阈值区域。
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公开(公告)号：US09147411B2
公开(公告)日：2015-09-29
申请号：US14627003
申请日：2015-02-20
CPC分类号： G11B5/3912 , G11B5/11 , G11B5/3909 , G11B2005/3996
摘要： According to one embodiment, a magnetic recording and reproducing device includes magnetic recording medium and a magnetic head. The magnetic recording medium includes a first surface. A plurality of bits is provided in the first surface. Each of the bits has a direction of magnetization corresponding to recorded information. The magnetic head includes a reproducing unit. The reproducing unit senses the direction of magnetization. The reproducing unit includes a first shield, a second shield, a first magnetic layer, a second magnetic layer, a third magnetic layer, a fourth magnetic layer, an intermediate layer, a first nonmagnetic layer, and a second nonmagnetic layer. The first and the second nonmagnetic layers include at least one selected from ruthenium, copper, and tantalum. A distance between the first shield and the second shield is not less than 3 times and not more than 7 times a length of each of the bits.
摘要翻译： 根据一个实施例，磁记录和再现装置包括磁记录介质和磁头。 磁记录介质包括第一表面。 在第一表面中提供多个位。 每个位具有对应于记录信息的磁化方向。 磁头包括再现单元。 再现单元感测磁化方向。 再现单元包括第一屏蔽，第二屏蔽，第一磁性层，第二磁性层，第三磁性层，第四磁性层，中间层，第一非磁性层和第二非磁性层。 第一和第二非磁性层包括选自钌，铜和钽中的至少一种。 第一屏蔽和第二屏蔽之间的距离不小于每个位的长度的3倍且不超过7倍。
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公开(公告)号：US10074398B2
公开(公告)日：2018-09-11
申请号：US15702033
申请日：2017-09-12
发明人： Kohsuke Harada , Akihiro Yamazaki , Nobuhiro Maeto
CPC分类号： G11B20/10037 , G11B5/012 , G11B20/10009 , G11B20/1403 , G11B20/1833 , G11B2220/2516
摘要： According to one embodiment, there is provided a storage device including a controller circuit and a storage medium. The controller circuit includes a first conversion circuit and a second conversion circuit. The first conversion circuit converts data into M-ary symbols where M is an integer of 3 or more. The second conversion circuit converts respective ones of the converted n samples of M-ary symbols into signals with L-patterned pulse width where n is an integer of 2 or more. The storage medium stores the converted n samples of signals with L-patterned pulse width. The controller circuit further includes an equalization circuit that equalizes signals read from the storage medium into the n samples of M-ary symbols.
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5.发明授权公开(公告)号：US09720772B2
公开(公告)日：2017-08-01
申请号：US14796294
申请日：2015-07-10
发明人： Hiroshi Sukegawa , Hiroshi Yao , Kohsuke Harada
CPC分类号： G06F11/1076 , B82Y25/00 , G06F11/1048 , G11C19/0808 , G11C19/0841 , G11C19/0866 , G11C19/0875
摘要： A memory system according to an embodiment includes a plurality of magnetic nanowires, a read unit that reads data from the magnetic nanowires, a shift control unit that shifts domain walls in the magnetic nanowires, and a read control unit. The read control unit is configured to control the read unit to read the data from the magnetic nanowires in parallel, store two or more of the data read in parallel, and when the data corresponding to a first magnetic nanowire of the magnetic nanowires are delayed or advanced as compared to the data corresponding to a second magnetic nanowire of the magnetic nanowires, determines a misalignment in the data and correct the data based on the misalignment.
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6.发明申请MEMORY SYSTEM, METHOD FOR CONTROLLING MAGNETIC MEMORY, AND DEVICE FOR CONTROLLING MAGNETIC MEMORY 有权存储器系统，用于控制磁记忆的方法和用于控制磁记忆的装置公开(公告)号：US20160259688A1
公开(公告)日：2016-09-08
申请号：US14796294
申请日：2015-07-10
发明人： Hiroshi SUKEGAWA , Hiroshi Yao , Kohsuke Harada
CPC分类号： G06F11/1076 , B82Y25/00 , G06F11/1048 , G11C19/0808 , G11C19/0841 , G11C19/0866 , G11C19/0875
摘要： A memory system according to an embodiment includes: a plurality of magnetic nanowires; a read unit configured to read data from the magnetic nanowires; a shift control unit configured to shift domain walls in the magnetic nanowires; and a read control unit configured to cause the read unit to read the data from the magnetic nanowires in parallel, store two or more of the data read in parallel, determine a misalignment in the data when the data corresponding to a first magnetic nanowire of the magnetic nanowires are delayed or advanced as compared to the data corresponding to a second magnetic nanowire of the magnetic nanowires, and correct the stored data based on the determined misalignment.
摘要翻译： 根据实施例的存储器系统包括：多个磁性纳米线; 读取单元，被配置为从所述磁性纳米线读取数据; 移位控制单元，被配置为移动所述磁性纳米线中的畴壁; 以及读取控制单元，被配置为使得所述读取单元并行地从所述磁性纳米线读取所述数据，存储并行读取的所述数据中的两个或更多个，当对应于所述数据的第一磁性纳米线的数据时，确定所述数据中的未对准 与对应于磁性纳米线的第二磁性纳米线的数据相比，磁性纳米线被延迟或提前，并且基于确定的不对准来校正存储的数据。
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公开(公告)号：US09105277B1
公开(公告)日：2015-08-11
申请号：US14481187
申请日：2014-09-09
发明人： Kohsuke Harada , Akihiro Yamazaki , Nobuhiro Maeto , Kazuto Kashiwagi , Naoki Tagami , Masahiro Kanamaru , Tomokazu Okubo
CPC分类号： G11B5/012 , G11B20/10009 , G11B20/10046 , G11B20/10268
摘要： According to one embodiment, an equalizer is configured to obtain a noise included in a first correction signal by using a noise component of a first track and a noise interference component from a second track. The equalizer is configured to correct the first correction signal by using the obtained noise. The equalizer is configured to equalize the corrected first correction signal. The noise component of the first track is calculated based on a noise component of the first track at a first timing and a noise component of the first track at a second timing earlier than the first timing. The noise interference component from the second track is calculated based on a noise interference component from the second track at the first timing and a noise interference component from the second track at the second timing. The decoder is configured to decode the equalized first correction signal.
摘要翻译： 根据一个实施例，均衡器被配置为通过使用来自第二轨道的第一轨道的噪声分量和噪声干扰分量来获得包括在第一校正信号中的噪声。 均衡器被配置为通过使用所获得的噪声来校正第一校正信号。 均衡器被配置为均衡校正的第一校正信号。 第一轨道的噪声分量基于第一定时处的第一轨道的噪声分量和比第一定时早的第二定时处的第一轨道的噪声分量来计算。 基于来自第一定时的第二轨道的噪声干扰分量和在第二定时处的来自第二轨道的噪声干扰分量来计算来自第二轨道的噪声干扰分量。 解码器被配置为对均衡的第一校正信号进行解码。
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公开(公告)号：US08988814B1
公开(公告)日：2015-03-24
申请号：US14475988
申请日：2014-09-03
发明人： Kohsuke Harada , Akihiro Yamazaki , Nobuhiro Maeto , Kazuto Kashiwagi , Tomokazu Okubo , Naoki Tagami
CPC分类号： G11B5/09 , G11B20/10046 , G11B20/10268 , G11B20/10296 , G11B2020/185 , G11B2020/1859 , G11B2020/1863
摘要： According to one embodiment, a storage device includes a data conversion unit that coverts user data of n bits, into m three-ary symbols, a recording medium that records the symbols as a signal of any one of three levels corresponding to values of the symbols, and a Viterbi equalizer that performs equalization of the m symbols simultaneously based on a signal read from the recording medium while setting the number of states as a power of 3 and using a trellis diagram having 2n branches, and calculates 2n likelihoods.
摘要翻译： 根据一个实施例，存储设备包括数据转换单元，其将n位的用户数据覆盖成m个三元符号;记录介质，其将符号记录为与符号的值对应的三个电平中的任何一个的信号 以及维特比均衡器，其基于从记录介质读取的信号同时执行m个符号的均衡，同时将状态数设置为3的幂并使用具有2n个分支的网格图，并计算2n个可能性。
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公开(公告)号：US08982496B1
公开(公告)日：2015-03-17
申请号：US14340154
申请日：2014-07-24
发明人： Nobuhiro Maeto , Kohsuke Harada
CPC分类号： G11B19/02 , G11B5/012 , G11B5/02 , G11B5/3974 , G11B5/4886 , G11B15/10 , G11B20/10009
摘要： According to one embodiment, switching takes place between a first control in which a first read head is assigned as a master head for reading data from a magnetic disk on which a sequential write direction is reversed at a switching position where a skew angle of a write head becomes 0 and between an outer periphery and an inner periphery in shingled write recording, and a second read head is assigned as a slave head for reducing inter-track interference during reading of the data and noise by virtue of an effect of waveform averaging with respect to the master head, and a second control in which the second read head is assigned as the master head and the first read head is assigned as the slave head.
摘要翻译： 根据一个实施例，在第一控制器之间进行切换，其中第一读取头被分配为用于从写入顺序的写入方向反转的磁盘读取数据的主机头， 磁头变为0，并且在带状写入记录中的外周和内周之间，并且第二读头被分配为从头，用于在读取数据和噪声期间借助于波形平均的影响来减少轨道间干扰 以及第二控制，其中第二读头被分配为主头，并且第一读头被分配为从头。
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公开(公告)号：US08717697B1
公开(公告)日：2014-05-06
申请号：US13799082
申请日：2013-03-13
CPC分类号： G11B20/10046
摘要： According to one embodiment, there is provided a controller including an interference cancelling module, a boosting module, and a decoding module. The interference cancelling module generates a first correction signal by cancelling an interference component from an adjacent track in a signal read from a target track of a disk medium. The boosting module generates a second correction signal by boosting a low frequency component of a signal corresponding to the first correction signal. The decoding module decodes a signal based on the second correction signal.
摘要翻译： 根据一个实施例，提供了一种包括干扰消除模块，升压模块和解码模块的控制器。 干扰消除模块通过从从盘介质的目标轨道读取的信号中从相邻轨道中消除干扰分量来产生第一校正信号。 升压模块通过升高对应于第一校正信号的信号的低频分量来产生第二校正信号。 解码模块基于第二校正信号来解码信号。
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