公开(公告)号：US20240071477A1

公开(公告)日：2024-02-29

申请号：US18500478

申请日：2023-11-02

Applicant: Kioxia Corporation

Inventor： Kazutaka IKEGAMI ,  Rieko FUNATSUKI ,  Nobuyuki MOMO ,  Hidehiro SHIGA

IPC: G11C11/4096 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4099

CPC classification number: G11C11/4096 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4099

Abstract: A memory system for speeding up a read operation in the memory system includes a first pillar, a first string including a first transistor and a first memory cell, a second string including a second transistor and a second memory cell, a first bit line, a first gate line, a first word line, a second gate line, a second word line and a control circuit. When the control circuit executes a read operation with respect to the first memory cell, the control circuit is configured to apply a read voltage to the first word line, apply a voltage turning off the second memory cell regardless of an electric charge stored in the second memory cell to the second word line, apply a voltage turning on the first transistor to the first gate line, and apply a voltage turning on the second transistor to the second gate line.

公开(公告)号：US20240321829A1

公开(公告)日：2024-09-26

申请号：US18589300

申请日：2024-02-27

Applicant: Kioxia Corporation

Inventor： Nobuyuki MOMO

IPC: H01L25/065 ,  H01L23/00 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

CPC classification number: H01L25/0657 ,  H01L24/08 ,  H01L24/80 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35 ,  H01L2224/08145 ,  H01L2224/80894 ,  H01L2924/14511

Abstract: A semiconductor storage device includes first and second chips. The first chip includes a semiconductor substrate having first and second surfaces intersecting a first direction, and a plurality of transistors provided on the first surface of the semiconductor substrate. The plurality of transistors include first and second transistors adjacent to each other in a second direction intersecting the first direction. The semiconductor substrate includes a first insulating member provided between the first transistor and the second transistor and extending in the first direction from the first surface of the semiconductor substrate to a first position between the first surface and the second surface of the semiconductor substrate, and a second insulating member provided at a position overlapping the first insulating member when viewed in the first direction and extending in the first direction from the second surface of the semiconductor substrate to the first position of the semiconductor substrate.

公开(公告)号：US20220367371A1

公开(公告)日：2022-11-17

申请号：US17874565

申请日：2022-07-27

Applicant: KIOXIA CORPORATION

Inventor： Nobuyuki MOMO ,  Keisuke NAKATSUKA

IPC: H01L23/538 ,  H01L49/02 ,  H01L23/482 ,  H01L25/065 ,  H01L23/522 ,  H01L25/00 ,  H01L27/08 ,  H01L27/07

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor chip including a first metal pad and a second metal pad; and a second semiconductor chip including a third metal pad and a fourth metal pad, the third metal pad joined to the first metal pad, the fourth metal pad coupled to the second metal pad via a dielectric layer, wherein the second semiconductor chip is coupled to the first semiconductor chip via the first metal pad and the third metal pad.

公开(公告)号：US20220085058A1

公开(公告)日：2022-03-17

申请号：US17190871

申请日：2021-03-03

Applicant: Kioxia Corporation

Inventor： Yosuke MURAKAMI ,  Satoshi NAGASHIMA ,  Nobuyuki MOMO ,  Takayuki ISHIKAWA ,  Yusuke ARAYASHIKI

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11565 ,  H01L23/00 ,  H01L27/11524 ,  H01L27/1157 ,  G11C7/18

Abstract: A semiconductor storage device includes a substrate, a first wiring, a second wiring, a third wiring, a fourth wiring, a charge storage unit. The first wiring extends in a first direction along a surface of the substrate. The second wiring is aligned with the first wiring in a second direction intersecting with the first direction and extends in the first direction. The third wiring is in contact with the first wiring and the second wiring and includes a semiconductor. The fourth wiring is located between the first wiring and the second wiring, extends in a third direction intersecting with the first direction and the second direction, and is aligned with the third wiring in at least the first direction. The charge storage unit is located between the third wiring and the fourth wiring.

公开(公告)号：US20210082823A1

公开(公告)日：2021-03-18

申请号：US16807835

申请日：2020-03-03

Applicant: KIOXIA CORPORATION

Inventor： Nobuyuki MOMO ,  Keisuke NAKATSUKA

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/482 ,  H01L49/02

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor chip including a first metal pad and a second metal pad; and a second semiconductor chip including a third metal pad and a fourth metal pad, the third metal pad joined to the first metal pad, the fourth metal pad coupled to the second metal pad via a dielectric layer, wherein the second semiconductor chip is coupled to the first semiconductor chip via the first metal pad and the third metal pad.