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37 条记录 (耗时 0.052 秒)

    Semiconductor devices utilizing silicide reaction
    6.
    发明授权
    Semiconductor devices utilizing silicide reaction 失效
    利用硅化物反应的半导体器件

    公开(公告)号：US6051851A

    公开(公告)日：2000-04-18

    申请号：US917675

    申请日：1997-08-26

    申请人： Tadahiro Ohmi ,  Mamoru Miyawaki ,  Yoshio Nakamura ,  Hiroshi Suzuki ,  Takeo Yamashita

    发明人： Tadahiro Ohmi ,  Mamoru Miyawaki ,  Yoshio Nakamura ,  Hiroshi Suzuki ,  Takeo Yamashita

    IPC分类号： H01L21/82 ,  G11C17/16 ,  H01L23/525 ,  H01L27/10 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

    CPC分类号： H01L27/112 ,  G11C17/16 ,  H01L23/5252 ,  H01L27/11206 ,  H01L2924/0002 ,  H01L2924/3011

    摘要： Cheap semiconductor memory devices are provided so as to enable high-speed writing and reading but rarely to malfunction, thus being high in reliability. In a semiconductor device which comprises a plurality of cells each having a semiconductor layer between a pair of conductors, at least one of the pair of conductors is made of a metal, and the semiconductor layer comprises an amorphous silicon that can form a silicide region with the metal as reacting at a reaction rate of not less than 10 m/sec. Another device is characterized in that the semiconductor layer is an amorphous silicon, in that at least one of the pair of conductors is made of a metal silicide-reacting with the amorphous silicon, and in that the silicide region formed is conic. Another device is characterized in that the semiconductor layer is an amorphous silicon, in that at least one of the pair of conductors is formed of a metal silicide-reacting with the amorphous silicon, and in that a film-formed surface is produced without being exposed to an oxide atmosphere, between a step of forming the amorphus silicon and a step of forming the metal.

    摘要翻译： 提供廉价的半导体存储器件，以便能够进行高速写入和读取，但很少发生故障，因此可靠性高。 在包括多个单元的半导体器件中，每个单元各自在一对导体之间具有半导体层，所述一对导体中的至少一个导体由金属制成，并且所述半导体层包括可形成硅化物区域的非晶硅， 金属以不小于10m /秒的反应速率反应。 另一种器件的特征在于，半导体层是非晶硅，其中该对导体中的至少一个导体由与非晶硅反应的金属硅化物制成，并且形成的硅化物区域是圆锥形。 另一种器件的特征在于，半导体层是非晶硅，其中该对导体中的至少一个导体由与非晶硅反应的金属硅化物形成，并且由此形成膜形成表面而不暴露 在氧化物气氛之间，形成无定形硅的步骤和形成金属的步骤。

    Data sorting circuit
    7.
    发明授权
    Data sorting circuit 失效
    数据分类电路

    公开(公告)号：US5822497A

    公开(公告)日：1998-10-13

    申请号：US507467

    申请日：1995-09-29

    申请人： Tadahiro Ohmi ,  Tadashi Shibata ,  Takeo Yamashita

    发明人： Tadahiro Ohmi ,  Tadashi Shibata ,  Takeo Yamashita

    IPC分类号： G06F7/02 ,  G06F7/24 ,  G06G7/60 ,  G06N3/063 ,  G11C15/04 ,  H01L27/10 ,  H03K19/00 ,  H03K19/0948 ,  G06F15/18

    CPC分类号： G06F7/24 ,  G06N3/0635

    摘要： A device comprising invertor circuit group including two or more invertor circuits formed by neuron MOS transistors; means for applying a first signal voltage common to the two or more invertors of the invertor circuit group to a first input gate of the invertor circuit; means for applying a given second signal to one or more second input gates other than the first input gate of the invertor circuits; a delay circuit for transmitting the variation of the output voltage of at least one of the invertor circuits of the invertor circuit group with a time delay generated by used of the variation with time of the signal voltage of either or both of the first and second signal voltages; a transistor whose ON and OFF is controlled by the signal transmitted from the delay circuit; storage circuits taking in signals by the ON and OFF of the transistor; and means for executing a given logical operation with respect to the output voltage signals generated by the invertor circuit group. The device has a function of storing the result of the logical operation in the storage circuit.

    摘要翻译： PCT No.PCT / JP94 / 00262 Sec。 371 1995年9月29日第 102（e）1995年9月29日PCT PCT 1994年2月22日PCT公布。 公开号WO94 / 19760 日期1994年9月1日包括由神经元MOS晶体管形成的包括两个或更多个反相器电路的逆变器电路组的器件; 用于将所述逆变器电路组的两个或更多个反相器公共的第一信号电压施加到所述逆变器电路的第一输入门的装置; 用于将给定的第二信号施加到除了逆变器电路的第一输入门之外的一个或多个第二输入门的装置; 延迟电路，用于通过使用随着第一和第二信号中的任一个或第二信号的信号电压的时间的变化而产生的时间延迟来发送反相器电路组的至少一个反相器电路的输出电压的变化 电压; 晶体管的ON和OFF由从延迟电路发送的信号控制; 存储电路通过晶体管的导通和截止来接收信号; 以及用于对由逆变器电路组产生的输出电压信号执行给定逻辑运算的装置。 该装置具有将逻辑运算的结果存储在存储电路中的功能。

    Magnetic head having main and auxiliary magnetic paths
    8.
    发明授权
    Magnetic head having main and auxiliary magnetic paths 失效
    具有主要和辅助磁条的磁头

    公开(公告)号：US5247415A

    公开(公告)日：1993-09-21

    申请号：US981994

    申请日：1992-11-24

    申请人： Noriyuki Kumasaka ,  Takeo Yamashita ,  Toshio Kobayashi ,  Ryoichi Nakatani ,  Shigekazu Otomo

    发明人： Noriyuki Kumasaka ,  Takeo Yamashita ,  Toshio Kobayashi ,  Ryoichi Nakatani ,  Shigekazu Otomo

    IPC分类号： G11B5/127 ,  G11B5/147 ,  G11B5/21 ,  G11B5/31 ,  G11B5/23

    CPC分类号： G11B5/21 ,  G11B5/127 ,  G11B5/147 ,  G11B5/3103 ,  G11B5/3153

    摘要： A magnetic head has a main magnetic path forming film forming an operation gap, and an auxiliary magnetic path forming film for complementing said main magnetic path forming film. The auxiliary magnetic path forming film is disposed behind the gap depth of said magnetic core and magnetically coupled to the main magnetic path forming film. The main magnetic path forming film has a direction of easy magnetization perpendicular to the direction of depth of the operation gap, while the auxiliary magnetic path forming film has a direction of easy magnetization which coincides with the direction in which said magnetic head opposes the recording medium.

    摘要翻译： 磁头具有形成操作间隙的主磁路形成膜和用于补充所述主磁路形成膜的辅助磁路形成膜。 辅助磁路形成膜设置在所述磁芯的间隙深度之后，磁耦合到主磁路形成膜。 主磁路形成膜具有与操作间隙的深度方向垂直的容易磁化的方向，而辅助磁路形成膜具有易磁化的方向，其与所述磁头与记录介质相对的方向一致 。