摘要:
A communication system is provided comprising an environment-side electrode and a living body-side electrode sandwiching an insulating layer and electrically insulated from each other, a grounding electrode which is electrically connected to the environment-side electrode, and a reception amplifier which amplifies a potential difference between the environment-side electrode and the living body-side electrode, wherein the grounding electrode has a side surface section which extends along a vertical direction.
摘要:
The accuracy of a measurement value obtained by a tire pressure detection device is lowered by a centrifugal force and an inertial force during travel. A pressure sensor (30) displaces a diaphragm (20) in its vertical direction (32) according to the pressure. The pressure sensor (30) is arranged in a tire (2) with the vertical direction (32) directed to a direction parallel to a rotation axis (34) instead of the tire circumferential direction or radial direction. The pressure sensor (30) is mounted onto a substrate with the vertical direction (32) of its diaphragm (20) directed in parallel to the substrate surface and the substrate is bonded to a tread portion of the tire (2) and a wheel rim portion while adjusting the vertical direction (32) of the diaphragm (20) with the direction of the rotation axis (34).
摘要:
In a delay circuit, when a first conductivity-type transistor (M6) becomes conductive on the basis of one level of its input signal, a first current path is formed through a source side transistor (M4), the first conductivity-type transistor (M6), and a second drive transistor (M9) between a source power line and a sink power line, and its output signal being the delayed inverse of the one level of the input signal is output from a connection point of another source side transistor (M5) and a sink side transistor (M11), and when a second conductivity-type transistor (M7) becomes conductive on the basis of the other level of the input signal, a second current path is formed through a first drive transistor (M3), the second conductivity-type transistor (M7), and another sink side transistor (M10), and the output signal being the delayed inverse of the other level of the input signal is output from the connection point.
摘要:
An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third current mirror having 6th-7th transistors where a current through the 2nd transistor copied from the variable current flows through the 6th transistor; a fourth current mirror having 8th-9th transistors where a current through the 12th transistor copied from the variable current flows through the 8th transistor; an inverter that has 1st-2nd conductivity type transistors and produces an output signal corresponding to a current level of the 7th or 9th transistor; a fifth current mirror having 15th-14th transistors where a current through the 14th transistor copied from the 15th transistor's becomes a current sourced by the 7th transistor; and a sixth current mirror having 5th-4th transistors where a current through the 4th transistor copied from the 5th transistor's becomes a current sunk by the 9th transistor.
摘要:
A clock extracting circuit for receiving an encoded signal and for extracting a clock signal from the encoded signal. The circuit comprises an edge detector that detects rising and falling edges of the encoded signal and produces edge detection pulses indicating the edges being detected; a mask signal generator producing a mask signal which is inverted in response to the edge detection pulses, which are produced one for each period of the received encoded signal, on the basis of the edge detection pulses; a mask signal delay section delaying the mask signal by a delay time controllable and outputting the delayed mask signal; a clock generator producing the clock signal on the basis of edges of the delayed mask signal; and a delay controller that controls the delay time of the mask signal delay section so as to set a duty ratio of the produced clock signal to a predetermined value.
摘要:
A tire pressure measuring system (TPMS) for transmitting pressure information from a tire to a vehicle body has a complicated structure when a plurality kinds of transmission data exist. A sensor unit receives a transmission electromagnetic field from a sensor control unit, and rectify-detects the received field. The counter of the sensor unit determines a rotation cycle of a tire, based on the signal obtained by the rectification detection, then switches the switch in conjunction with the rotation cycle, and sequentially sends the plurality of transmission data items for every tire rotation.
摘要:
A tire pressure measuring system (TPMS) for transmitting pressure information from a tire to a vehicle body has a complicated structure when a plurality kinds of transmission data exist. A sensor unit receives a transmission electromagnetic field from a sensor control unit, and rectify-detects the received field. The counter of the sensor unit determines a rotation cycle of a tire, based on the signal obtained by the rectification detection, then switches the switch in conjunction with the rotation cycle, and sequentially sends the plurality of transmission data items for every tire rotation.
摘要:
An AD converter comprising: a delta-sigma-modulation circuit to output an analog signal from a bridge circuit as a quantized signal; a switch circuit to switch between a first state, where a first level voltage is applied to one terminal of the bridge circuit and a second level voltage different in level from the first level voltage is applied to the other terminal thereof, and a second state, where voltages opposite in level to those in the first state are applied thereto, based on a logic level of a control signal; and an up-down counter to increase a count value based on a rate of the quantized signal being one logic level, during a predetermined period, in the first state, and decrease the count value based on the rate, during the predetermined period, in the second state, the count value representing a digital signal according to the physical quantity.
摘要:
In a delay circuit, when a first conductivity-type transistor (M6) becomes conductive on the basis of one level of its input signal, a first current path is formed through a source side transistor (M4), the first conductivity-type transistor (M6), and a second drive transistor (M9) between a source power line and a sink power line, and its output signal being the delayed inverse of the one level of the input signal is output from a connection point of another source side transistor (M5) and a sink side transistor (M11), and when a second conductivity-type transistor (M7) becomes conductive on the basis of the other level of the input signal, a second current path is formed through a first drive transistor (M3), the second conductivity-type transistor (M7), and another sink side transistor (M10), and the output signal being the delayed inverse of the other level of the input signal is output from the connection point.
摘要:
An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third current mirror having 6th-7th transistors where a current through the 2nd transistor copied from the variable current flows through the 6th transistor; a fourth current mirror having 8th-9th transistors where a current through the 12th transistor copied from the variable current flows through the 8th transistor; an inverter that has 1st-2nd conductivity type transistors and produces an output signal corresponding to a current level of the 7th or 9th transistor; a fifth current mirror having 15th-14th transistors where a current through the 14th transistor copied from the 15th transistor's becomes a current sourced by the 7th transistor; and a sixth current mirror having 5th-4th transistors where a current through the 4th transistor copied from the 5th transistor's becomes a current sunk by the 9th transistor.