公开(公告)号：US08492808B2

公开(公告)日：2013-07-23

申请号：US13181742

申请日：2011-07-13

申请人： Kazuyuki Omori ,  Kenichi Mori ,  Naohito Suzumura

发明人： Kazuyuki Omori ,  Kenichi Mori ,  Naohito Suzumura

IPC分类号： H01L27/22 ,  H01L43/08 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L27/228 ,  H01L23/5226 ,  H01L23/53233 ,  H01L23/53238 ,  H01L43/08 ,  H01L2224/16145 ,  H01L2924/00011 ,  H01L2924/01015 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01004

摘要： In MRAM, a write wiring clad in a ferromagnetic film has been used to reduce a write current or avoid disturbances. Besides, a CuAl wiring obtained by adding a trace of Al to a Cu wiring has been used widely to secure reliability of a high reliability product. There is a high possibility of MRAM being mounted in high reliability products so that reliability is important. Clad wiring however increases the resistance of the CuAl wiring, which is originally high, so that using both may fail to satisfy the specification of the wiring resistance. In the semiconductor device of the invention having plural copper-embedded wiring layers, copper wiring films of plural copper-embedded clad wirings configuring a memory cell matrix region of MRAM are made of relatively pure copper, while a CuAl wiring film is used as copper wiring films of copper-embedded non-clad wirings below these wiring layers.

摘要翻译： 在MRAM中，已经使用包裹在铁磁膜中的写入布线来减小写入电流或避免干扰。 此外，通过在Cu布线中添加痕量的Al而获得的CuAl布线被广泛地用于确保高可靠性产品的可靠性。 在高可靠性产品中安装MRAM的可能性很大，因此可靠性很重要。 然而，包层线路增加了原来高的CuAl布线的电阻，因此使用两者可能不能满足布线电阻的规格。 在具有多个铜嵌入布线层的本发明的半导体器件中，构成MRAM的存储单元矩阵区域的多个嵌入铜包布线的铜布线膜由相对纯的铜制成，而CuAl布线膜用作铜布线 在这些布线层下面的铜嵌入的非覆盖布线的膜。

公开(公告)号：US20120043630A1

公开(公告)日：2012-02-23

申请号：US13181742

申请日：2011-07-13

申请人： Kazuyuki OMORI ,  Kenichi Mori ,  Naohito Suzumura

发明人： Kazuyuki OMORI ,  Kenichi Mori ,  Naohito Suzumura

IPC分类号： H01L29/82 ,  H01L21/8246

CPC分类号： H01L27/228 ,  H01L23/5226 ,  H01L23/53233 ,  H01L23/53238 ,  H01L43/08 ,  H01L2224/16145 ,  H01L2924/00011 ,  H01L2924/01015 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01004

摘要： In MRAM, a write wiring clad in a ferromagnetic film has been used to reduce a write current or avoid disturbances. Besides, a CuAl wiring obtained by adding a trace of Al to a Cu wiring has been used widely to secure reliability of a high reliability product. There is a high possibility of MRAM being mounted in high reliability products so that reliability is important. Clad wiring however increases the resistance of the CuAl wiring, which is originally high, so that using both may fail to satisfy the specification of the wiring resistance. In the semiconductor device of the invention having plural copper-embedded wiring layers, copper wiring films of plural copper-embedded clad wirings configuring a memory cell matrix region of MRAM are made of relatively pure copper, while a CuAl wiring film is used as copper wiring films of copper-embedded non-clad wirings below these wiring layers.

摘要翻译： 在MRAM中，已经使用包裹在铁磁膜中的写入布线来减小写入电流或避免干扰。 此外，通过在Cu布线中添加痕量的Al而获得的CuAl布线被广泛地用于确保高可靠性产品的可靠性。 在高可靠性产品中安装MRAM的可能性很大，因此可靠性很重要。 然而，包层线路增加了原来高的CuAl布线的电阻，因此使用两者可能不能满足布线电阻的规格。 在具有多个铜嵌入布线层的本发明的半导体器件中，构成MRAM的存储单元矩阵区域的多个嵌入铜包布线的铜布线膜由相对纯的铜制成，而CuAl布线膜用作铜布线 在这些布线层下面的铜嵌入的非覆盖布线的膜。

公开(公告)号：US20080230847A1

公开(公告)日：2008-09-25

申请号：US12014078

申请日：2008-01-14

申请人： Takeshi Furusawa ,  Takao Kamoshima ,  Masatsugu Amishiro ,  Naohito Suzumura ,  Shoichi Fukui ,  Masakazu Okada

发明人： Takeshi Furusawa ,  Takao Kamoshima ,  Masatsugu Amishiro ,  Naohito Suzumura ,  Shoichi Fukui ,  Masakazu Okada

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L21/76832 ,  H01L21/76834 ,  H01L21/76883

摘要： The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.

摘要翻译： 提高了在最低层布线中具有嵌入线的半导体器件的可靠性。 在半导体衬底的主表面中，形成MISFET，并且在主表面上形成绝缘膜10,11。 在绝缘膜10,11中形成有接触孔，并且插入插头。 在插入插头的绝缘膜11上形成绝缘膜14,15,16，并且在绝缘膜14,15,16中形成开口，并且在其中嵌入线。 绝缘膜15是在蚀刻绝缘膜16以形成包含硅和碳的开口时的蚀刻停止膜。 绝缘膜11具有高的吸湿性，绝缘膜15具有低的耐湿性，然而，通过在其间插入绝缘膜14，使得绝缘膜14具有比Si（硅）原子数更高的Si（硅）原子数 绝缘膜11，电阻弱的界面被防止形成。

公开(公告)号：US08778793B2

公开(公告)日：2014-07-15

申请号：US13370000

申请日：2012-02-09

申请人： Takahisa Furuhashi ,  Naohito Suzumura

发明人： Takahisa Furuhashi ,  Naohito Suzumura

IPC分类号： H01L21/768 ,  H01L23/485 ,  H01L23/532

CPC分类号： H01L23/485 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A barrier insulating film is constituted from a first SiCN film formed with a tetramethylsilane gas flow rate lower than usual, a second SiCN film formed over the first SiCN film and formed with a usual tetramethylsilane gas flow rate, and a SiCO film formed over the second SiCN film.

摘要翻译： 阻挡绝缘膜由比通常低的四甲基硅烷气体流量形成的第一SiCN膜，在第一SiCN膜上形成并以通常的四甲基硅烷气体流量形成的第二SiCN膜和在第二SiCN膜上形成的SiCO膜构成 SiCN膜。

公开(公告)号：US08203210B2

公开(公告)日：2012-06-19

申请号：US12883031

申请日：2010-09-15

申请人： Takeshi Furusawa ,  Takao Kamoshima ,  Masatsugu Amishiro ,  Naohito Suzumura ,  Shoichi Fukui ,  Masakazu Okada

发明人： Takeshi Furusawa ,  Takao Kamoshima ,  Masatsugu Amishiro ,  Naohito Suzumura ,  Shoichi Fukui ,  Masakazu Okada

IPC分类号： H01L23/48

CPC分类号： H01L21/76832 ,  H01L21/76834 ,  H01L21/76883

摘要： The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.

摘要翻译： 提高了在最低层布线中具有嵌入线的半导体器件的可靠性。 在半导体衬底的主表面中，形成MISFET，并且在主表面上形成绝缘膜10,11。 在绝缘膜10,11中形成有接触孔，并且插入插头。 在插入插头的绝缘膜11上形成绝缘膜14,15,16，并且在绝缘膜14,15,16中形成开口，并且在其中嵌入线。 绝缘膜15是在蚀刻绝缘膜16以形成包含硅和碳的开口时的蚀刻停止膜。 绝缘膜11具有高的吸湿性，绝缘膜15具有低的耐湿性，然而，通过在其间插入绝缘膜14，使得绝缘膜14具有比Si（硅）原子数更高的Si（硅）原子数 绝缘膜11，电阻弱的界面被防止形成。

公开(公告)号：US20120228774A1

公开(公告)日：2012-09-13

申请号：US13370000

申请日：2012-02-09

申请人： Takahisa FURUHASHI ,  Naohito Suzumura

发明人： Takahisa FURUHASHI ,  Naohito Suzumura

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/485 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A barrier insulating film is constituted from a first SiCN film formed with a tetramethylsilane gas flow rate lower than usual, a second SiCN film formed over the first SiCN film and formed with a usual tetramethylsilane gas flow rate, and a SiCO film formed over the second SiCN film.

摘要翻译： 阻挡绝缘膜由比通常低的四甲基硅烷气体流量形成的第一SiCN膜，在第一SiCN膜上形成并以通常的四甲基硅烷气体流量形成的第二SiCN膜和在第二SiCN膜上形成的SiCO膜构成 SiCN膜。

公开(公告)号：US20110001246A1

公开(公告)日：2011-01-06

申请号：US12883031

申请日：2010-09-15

申请人： Takeshi FURUSAWA ,  Takao Kamoshima ,  Masatsugu Amishiro ,  Naohito Suzumura ,  Shoichi Fukui ,  Masakazu Okada

发明人： Takeshi FURUSAWA ,  Takao Kamoshima ,  Masatsugu Amishiro ,  Naohito Suzumura ,  Shoichi Fukui ,  Masakazu Okada

IPC分类号： H01L23/48

CPC分类号： H01L21/76832 ,  H01L21/76834 ,  H01L21/76883

摘要： The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.

摘要翻译： 提高了在最低层布线中具有嵌入线的半导体器件的可靠性。 在半导体衬底的主表面中，形成MISFET，并且在主表面上形成绝缘膜10,11。 在绝缘膜10,11中形成有接触孔，并且插入插头。 在插入插头的绝缘膜11上形成绝缘膜14,15,16，并且在绝缘膜14,15,16中形成开口，并且在其中嵌入线。 绝缘膜15是在蚀刻绝缘膜16以形成包含硅和碳的开口时的蚀刻停止膜。 绝缘膜11具有高的吸湿性，绝缘膜15具有低的耐湿性，然而，通过在其间插入绝缘膜14，使得绝缘膜14具有比Si（硅）原子数更高的Si（硅）原子数 绝缘膜11，电阻弱的界面被防止形成。