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20 条记录 (耗时 0.021 秒)

    Organic light emitting display device having RFID
    3.
    发明授权
    Organic light emitting display device having RFID 有权
    具有RFID的有机发光显示装置

    公开(公告)号：US08319425B2

    公开(公告)日：2012-11-27

    申请号：US12656441

    申请日：2010-01-29

    申请人： Kee-Won Kwon

    发明人： Kee-Won Kwon

    IPC分类号： H01L51/50 ,  H01L51/52 ,  H01L51/54

    CPC分类号： H01L27/3276 ,  G06K19/07749 ,  H01L27/3225 ,  H01L51/524 ,  H01Q1/2208 ,  H01Q1/36

    摘要： An organic light emitting display device having RFID includes a substrate including a pixel region having at least one organic light emitting device and a non-pixel region formed on the outer circumference of the pixel region, a sealing substrate that seals at least the pixel region of the substrate, an RFID antenna pattern on the sealing substrate, and an RFID chip electrically coupled to the RFID antenna pattern.

    摘要翻译： 具有RFID的有机发光显示装置包括具有至少一个有机发光元件的像素区域和形成在像素区域的外周上的非像素区域的基板，至少将像素区域 衬底，密封衬底上的RFID天线图案和电耦合到RFID天线图案的RFID芯片。

    Organic light emitting display device having RFID
    4.
    发明申请
    Organic light emitting display device having RFID 有权
    具有RFID的有机发光显示装置

    公开(公告)号：US20100207506A1

    公开(公告)日：2010-08-19

    申请号：US12656441

    申请日：2010-01-29

    申请人： Kee-Won Kwon

    发明人： Kee-Won Kwon

    IPC分类号： H01J1/00

    CPC分类号： H01L27/3276 ,  G06K19/07749 ,  H01L27/3225 ,  H01L51/524 ,  H01Q1/2208 ,  H01Q1/36

    摘要： An organic light emitting display device having RFID includes a substrate including a pixel region having at least one organic light emitting device and a non-pixel region formed on the outer circumference of the pixel region, a sealing substrate that seals at least the pixel region of the substrate, an RFID antenna pattern on the sealing substrate, and an RFID chip electrically coupled to the RFID antenna pattern.

    摘要翻译： 具有RFID的有机发光显示装置包括具有至少一个有机发光元件的像素区域和形成在像素区域的外周上的非像素区域的基板，至少将像素区域 衬底，密封衬底上的RFID天线图案和电耦合到RFID天线图案的RFID芯片。

    Local sense amplifier and semiconductor memory device having the same
    5.
    发明申请
    Local sense amplifier and semiconductor memory device having the same 审中-公开
    本地读出放大器和具有相同的半导体存储器件

    公开(公告)号：US20060291313A1

    公开(公告)日：2006-12-28

    申请号：US11375808

    申请日：2006-03-14

    申请人： Kee-Won Kwon

    发明人： Kee-Won Kwon

    IPC分类号： G11C7/02

    CPC分类号： G11C7/062 ,  G11C11/4097

    摘要： A sense amplifier including a pair of differential transistors configured to amplify a differential signal applied to a pair of I/O lines, each transistor having a terminal, a current supplying circuit configured to supply a current to the differential transistors in response to an enable signal, and a coupling element configured to electrically connect or disconnect the terminals of the differential transistors in response to the enable signal.

    摘要翻译： 一种感测放大器，包括一对差动晶体管，其被配置为放大施加到一对I / O线的差分信号，每个晶体管具有端子;电流供应电路，被配置为响应于使能信号向差分晶体管提供电流 以及耦合元件，其被配置为响应于使能信号电连接或断开差分晶体管的端子。

    Semiconductor memory devices having a dual port mode and methods of operating the same
    6.
    发明申请
    Semiconductor memory devices having a dual port mode and methods of operating the same 有权
    具有双端口模式的半导体存储器件及其操作方法

    公开(公告)号：US20060098519A1

    公开(公告)日：2006-05-11

    申请号：US11258766

    申请日：2005-10-26

    申请人： Kee-Won Kwon

    发明人： Kee-Won Kwon

    IPC分类号： G11C8/00

    CPC分类号： G11C7/1075

    摘要： A memory device having a dual port function includes a memory cell array and a switching unit. The memory cell array has a first port and a second port. The switching unit assigns first data received through a data bus to the first port in response to a leading edge of a clock signal and assigns second data received through the data bus to the second port in response to a trailing edge of the clock. Methods of operating memory devices having a dual port mode are also disclosed.

    摘要翻译： 具有双端口功能的存储器件包括存储单元阵列和切换单元。 存储单元阵列具有第一端口和第二端口。 切换单元响应于时钟信号的前沿将通过数据总线接收的第一数据分配给第一端口，并且响应于时钟的后沿将通过数据总线接收的第二数据分配给第二端口。 还公开了具有双端口模式的存储器件的操作方法。

    Semiconductor memory devices having a dual port mode and methods of operating the same
    8.
    发明授权
    Semiconductor memory devices having a dual port mode and methods of operating the same 有权
    具有双端口模式的半导体存储器件及其操作方法

    公开(公告)号：US07286415B2

    公开(公告)日：2007-10-23

    申请号：US11258766

    申请日：2005-10-26

    申请人： Kee-Won Kwon

    发明人： Kee-Won Kwon

    IPC分类号： G11C7/10 ,  G11C8/00

    CPC分类号： G11C7/1075

    摘要： A memory device having a dual port function includes a memory cell array and a switching unit. The memory cell array has a first port and a second port. The switching unit assigns first data received through a data bus to the first port in response to a leading edge of a clock signal and assigns second data received through the data bus to the second port in response to a trailing edge of the clock. Methods of operating memory devices having a dual port mode are also disclosed.

    摘要翻译： 具有双端口功能的存储器件包括存储单元阵列和切换单元。 存储单元阵列具有第一端口和第二端口。 切换单元响应于时钟信号的前沿将通过数据总线接收的第一数据分配给第一端口，并且响应于时钟的后沿将通过数据总线接收的第二数据分配给第二端口。 还公开了具有双端口模式的存储器件的操作方法。

    Semiconductor memory device with structure providing increased operating speed
    9.
    发明授权
    Semiconductor memory device with structure providing increased operating speed 失效
    具有结构提供更高操作速度的半导体存储器件

    公开(公告)号：US06879527B2

    公开(公告)日：2005-04-12

    申请号：US10614013

    申请日：2003-07-08

    申请人： Kee-Won Kwon ,  Youn-Cheol Kim

    发明人： Kee-Won Kwon ,  Youn-Cheol Kim

    IPC分类号： G11C8/18 ,  G11C7/10 ,  G11C7/00

    CPC分类号： G11C7/1012 ,  G11C7/1051

    摘要： A semiconductor memory device includes a plurality of memory array blocks including predetermined numbers of memory cells, the memory array blocks being arranged in the row direction; a RAS chain being aligned at a side of the plurality of memory array blocks in the row direction, the RAS chain for selecting and activating a particular word line; a CAS chain being aligned at the other side of the plurality of memory array blocks in the column direction, the CAS chain for amplifying N bits of data from the plurality of memory array blocks and outputting the result to an input/output (IO) line, wherein N is a natural number more than 2; and a data converter for continuously outputting the N bits of data input via the IO line from a memory array block nearest to the RAS chain to a memory array block farthest from the RAS chain.

    摘要翻译： 半导体存储器件包括多个存储器阵列块，其包括预定数量的存储器单元，存储器阵列块被布置在行方向上; RAS链在行方向上的多个存储器阵列块的一侧对齐，RAS链用于选择和激活特定字线; CAS链在列方向上在多个存储器阵列块的另一侧对准，CAS链用于从多个存储器阵列块放大N位数据，并将结果输出到输入/输出（IO）线 其中N是大于2的自然数; 以及数据转换器，用于将最靠近RAS链的存储器阵列块经由IO线输入的N位数据连续地输出到距离RAS链最远的存储器阵列块。

    Self-calibrating temperature sensors and methods thereof
    10.
    发明授权
    Self-calibrating temperature sensors and methods thereof 有权
    自校准温度传感器及其方法

    公开(公告)号：US07618186B2

    公开(公告)日：2009-11-17

    申请号：US11790174

    申请日：2007-04-24

    申请人： Duk-Min Kwon ,  Kee-Won Kwon

    发明人： Duk-Min Kwon ,  Kee-Won Kwon

    IPC分类号： G01K7/00

    CPC分类号： G01K7/015 ,  G01K15/00 ,  G01K2219/00

    摘要： A self-calibrating temperature sensor and a method thereof are provided. The self-calibrating temperature sensor may include a reference voltage generator to generate a reference voltage based on temperature, a digital-to-analog converter to convert a first digital signal into an analog sensing voltage, a comparator to compare the reference voltage with the analog sensing voltage, and to generate a comparison result signal, a digital signal generator to generate and update the first digital signal based on the comparison result signal, a first storage circuit to store the first digital signal based on a first temperature, a data output unit to output data corresponding to a second temperature based on the first digital signal and a second digital signal output from the first storage circuit.

    摘要翻译： 提供了一种自校准温度传感器及其方法。 自校准温度传感器可以包括参考电压发生器以产生基于温度的参考电压，数模转换器将第一数字信号转换为模拟感测电压，比较器将参考电压与模拟 并且产生比较结果信号，数字信号发生器，用于基于比较结果信号产生和更新第一数字信号;第一存储电路，用于基于第一温度存储第一数字信号;数据输出单元 基于第一数字信号输出对应于第二温度的数据和从第一存储电路输出的第二数字信号。