公开(公告)号：US20050031996A1

公开(公告)日：2005-02-10

申请号：US10910271

申请日：2004-08-04

申请人： Keiichi Sasaki ,  Masato Kamiichi ,  Yukihiro Hayakawa ,  Ershad Chowdhury

发明人： Keiichi Sasaki ,  Masato Kamiichi ,  Yukihiro Hayakawa ,  Ershad Chowdhury

IPC分类号： B41J2/14 ,  B41J2/16 ,  G03F7/00 ,  H05K1/09 ,  H05K1/16 ,  H05K3/02 ,  H05K3/06 ,  H05K3/28

CPC分类号： H05K1/167 ,  B41J2/14072 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1642 ,  B41J2/1643 ,  B41J2/1646 ,  H05K1/09 ,  H05K3/06 ,  H05K3/067 ,  H05K2201/0317 ,  H05K2203/0361

摘要： In order to provide a circuit substrate with a satisfactory step coverage by the protective layer and the anti-cavitation film in an edge portion of wirings and a liquid discharge head utilizing such circuit substrate, the invention provides a method for producing a circuit substrate provided, on an insulating surface of a substrate, with a plurality of elements each including a resistive layer and a pair of electrodes formed with a predetermined spacing on said resistive layer, including a step of forming an aluminum electrode wiring layer on the resistive layer, a step of isolating the electrode wiring layer by dry etching into each element, and a step of forming the electrode wiring into a tapered cross section with an etching solution containing phosphoric acid, nitric acid and a chelating agent capable of forming a complex with the wiring metal.

摘要翻译： 为了通过利用这种电路基板的布线边缘部分中的保护层和防空穴膜提供令人满意的阶梯覆盖的电路基板，本发明提供一种制造电路基板的方法， 在基板的绝缘表面上，多个元件各自包括电阻层和在所述电阻层上以预定间隔形成的一对电极，包括在电阻层上形成铝电极布线层的步骤，步骤 通过干蚀刻将电极配线层隔离成各元件，以及通过含有与配线金属形成络合物的磷酸，硝酸和螯合剂的蚀刻液将电极配线形成为锥形截面的工序。

公开(公告)号：US20050078152A1

公开(公告)日：2005-04-14

申请号：US10968901

申请日：2004-10-21

申请人： Keiichi Sasaki ,  Masato Kamiichi ,  Ershad Chowdhury ,  Yukihiro Hayakawa

发明人： Keiichi Sasaki ,  Masato Kamiichi ,  Ershad Chowdhury ,  Yukihiro Hayakawa

IPC分类号： B41J2/05 ,  H01C17/065 ,  H01C17/28 ,  H05K1/16 ,  H05K3/02

CPC分类号： H01C17/065 ,  H01C17/281 ,  H05K1/167 ,  H05K3/02 ,  Y10T29/49126

摘要： A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.

摘要翻译： 一种用于液体排放装置的电路板，其中发热元件上的保护层和空穴电阻膜的涂层性能优异且耐久性优异，并且提供了这种电路板的制造方法。 处理布线材料层的表面部分，使得表面部分的蚀刻速度高于形成布线材料层的材料的蚀刻速度。 期望的是，将形成布线材料层的材料的氟化物，氯化物和氮化物中的至少一种形成到布线材料层的表面部分中。

公开(公告)号：US07270398B2

公开(公告)日：2007-09-18

申请号：US10968901

申请日：2004-10-21

申请人： Keiichi Sasaki ,  Masato Kamiichi ,  Ershad Ali Chowdhury ,  Yukihiro Hayakawa

发明人： Keiichi Sasaki ,  Masato Kamiichi ,  Ershad Ali Chowdhury ,  Yukihiro Hayakawa

IPC分类号： B41J2/05

CPC分类号： H01C17/065 ,  H01C17/281 ,  H05K1/167 ,  H05K3/02 ,  Y10T29/49126

摘要： A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.

摘要翻译： 一种用于液体排放装置的电路板，其中发热元件上的保护层和空穴电阻膜的涂层性能优异且耐久性优异，并且提供了这种电路板的制造方法。 处理布线材料层的表面部分，使得表面部分的蚀刻速度高于形成布线材料层的材料的蚀刻速度。 期望的是，将形成布线材料层的材料的氟化物，氯化物和氮化物中的至少一种形成到布线材料层的表面部分中。

公开(公告)号：US07244370B2

公开(公告)日：2007-07-17

申请号：US10910271

申请日：2004-08-04

申请人： Keiichi Sasaki ,  Masato Kamiichi ,  Yukihiro Hayakawa ,  Ershad Ali Chowdhury

发明人： Keiichi Sasaki ,  Masato Kamiichi ,  Yukihiro Hayakawa ,  Ershad Ali Chowdhury

IPC分类号： G01D15/00 ,  G11B5/127 ,  H01B13/00

CPC分类号： H05K1/167 ,  B41J2/14072 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1642 ,  B41J2/1643 ,  B41J2/1646 ,  H05K1/09 ,  H05K3/06 ,  H05K3/067 ,  H05K2201/0317 ,  H05K2203/0361

摘要： In order to provide a circuit substrate with a satisfactory step coverage by the protective layer and the anti-cavitation film in an edge portion of wirings and a liquid discharge head utilizing such circuit substrate, the invention provides a method for producing a circuit substrate provided, on an insulating surface of a substrate, with a plurality of elements each including a resistive layer and a pair of electrodes formed with a predetermined spacing on said resistive layer, including a step of forming an aluminum electrode wiring layer on the resistive layer, a step of isolating the electrode wiring layer by dry etching into each element, and a step of forming the electrode wiring into a tapered cross section with an etching solution containing phosphoric acid, nitric acid and a chelating agent capable of forming a complex with the wiring metal.

摘要翻译： 为了通过利用这种电路基板的布线边缘部分中的保护层和防空穴膜提供令人满意的阶梯覆盖的电路基板，本发明提供一种制造电路基板的方法， 在基板的绝缘表面上，多个元件各自包括电阻层和在所述电阻层上以预定间隔形成的一对电极，包括在电阻层上形成铝电极布线层的步骤，步骤 通过干蚀刻将电极配线层隔离成各元件，以及通过含有与配线金属形成络合物的磷酸，硝酸和螯合剂的蚀刻液将电极配线形成为锥形截面的工序。

公开(公告)号：US06838351B2

公开(公告)日：2005-01-04

申请号：US10805191

申请日：2004-03-22

申请人： Keiichi Sasaki ,  Masato Kamiichi ,  Ershad Ali Chowdhury ,  Yukihiro Hayakawa

发明人： Keiichi Sasaki ,  Masato Kamiichi ,  Ershad Ali Chowdhury ,  Yukihiro Hayakawa

IPC分类号： B41J2/05 ,  H01C17/065 ,  H01C17/28 ,  H05K1/16 ,  H05K3/02 ,  H01L27/02

CPC分类号： H01C17/065 ,  H01C17/281 ,  H05K1/167 ,  H05K3/02 ,  Y10T29/49126

摘要： A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.

摘要翻译： 一种用于液体排放装置的电路板，其中发热元件上的保护层和空穴电阻膜的涂层性能优异且耐久性优异，并且提供了这种电路板的制造方法。 处理布线材料层的表面部分，使得表面部分的蚀刻速度高于形成布线材料层的材料的蚀刻速度。 期望的是，将形成布线材料层的材料的氟化物，氯化物和氮化物中的至少一种形成到布线材料层的表面部分中。

公开(公告)号：US07309657B2

公开(公告)日：2007-12-18

申请号：US10929492

申请日：2004-08-31

申请人： Masato Kamiichi ,  Keiichi Sasaki

发明人： Masato Kamiichi ,  Keiichi Sasaki

IPC分类号： H01L21/302

CPC分类号： B41J2/1642 ,  B41J2/1412 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1646 ,  H05K1/167 ,  H05K3/06 ,  H05K2201/0317 ,  H05K2203/1453 ,  Y10T428/24917

摘要： Provided is a method for manufacturing a circuit board including an electrode wiring formed above a surface portion of a substrate, and a plurality of electrothermal converting elements which have a heating resistor film for generating thermal energy formed above the electrode wiring. The method includes: forming an electrode wiring layer for forming the electrode wiring, forming the heating resistor film; and collectively etching the electrode wiring layer and the heating resistor film to thereby form the electrode wiring. With the method according to the present invention, the circuit board can be manufactured with a higher density, higher endurance, and lower power consumption recording head to provide high resolution images.

摘要翻译： 提供一种制造电路板的方法，该电路板包括形成在基板的表面部分上方的电极布线，以及多个电热转换元件，其具有用于产生形成在电极布线上方的热能的加热电阻膜。 该方法包括：形成用于形成电极布线的电极布线层，形成加热电阻膜; 并且共同地蚀刻电极布线层和加热电阻膜，从而形成电极布线。 利用根据本发明的方法，可以制造具有更高密度，更高耐久性和更低功耗记录头的电路板，以提供高分辨率图像。

公开(公告)号：US20050053774A1

公开(公告)日：2005-03-10

申请号：US10929492

申请日：2004-08-31

申请人： Masato Kamiichi ,  Keiichi Sasaki

发明人： Masato Kamiichi ,  Keiichi Sasaki

IPC分类号： B32B3/00 ,  B41J2/05 ,  B41J2/14 ,  B41J2/16 ,  H05K1/16 ,  H05K3/02 ,  H05K3/06 ,  H05K3/28

CPC分类号： B41J2/1642 ,  B41J2/1412 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1646 ,  H05K1/167 ,  H05K3/06 ,  H05K2201/0317 ,  H05K2203/1453 ,  Y10T428/24917

摘要： Provided is a method for manufacturing a circuit board including an electrode wiring formed above a surface portion of a substrate, and a plurality of electrothermal converting elements which have a heating resistor film for generating thermal energy formed above the electrode wiring. The method includes: forming an electrode wiring layer for forming the electrode wiring, forming the heating resistor film; and collectively etching the electrode wiring layer and the heating resistor film to thereby form the electrode wiring. With the method according to the present invention, the circuit board can be manufactured with a higher density, higher endurance, and lower power consumption recording head to provide high resolution images.

摘要翻译： 提供一种制造电路板的方法，该电路板包括形成在基板的表面部分上方的电极布线，以及多个电热转换元件，其具有用于产生形成在电极布线上方的热能的加热电阻膜。 该方法包括：形成用于形成电极布线的电极布线层，形成加热电阻膜; 并且共同地蚀刻电极布线层和加热电阻膜，从而形成电极布线。 利用根据本发明的方法，可以制造具有更高密度，更高耐久性和更低功耗记录头的电路板，以提供高分辨率图像。

公开(公告)号：US20090073228A1

公开(公告)日：2009-03-19

申请号：US12197499

申请日：2008-08-25

申请人： Keiichi Sasaki ,  Yukihiro Hayakawa

发明人： Keiichi Sasaki ,  Yukihiro Hayakawa

IPC分类号： B41J2/015 ,  H01L21/00 ,  H01L23/58

CPC分类号： H01L21/308 ,  B41J2/1603 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1642 ,  B41J2202/13 ,  H01L29/06

摘要： A through-hole forming method includes steps of forming a first impurity region (102a) around a region where a through-hole is to be formed in the first surface of a silicon substrate (101), the first impurity region (102) being higher in impurity concentration than the silicon substrate (101), forming a second impurity region (102b) at a position adjacent to the first impurity region (102a) in the depth direction of the silicon substrate (101), the second impurity region (102b) being higher in impurity concentration than the first impurity region (102a), forming an etch stop layer (103) on the first surface, forming an etch mask layer (104) having an opening on the second surface of the silicon substrate (101) opposite to the first surface, and etching the silicon substrate (101) until at least the etch stop layer (103) is exposed via the opening.

摘要翻译： 通孔形成方法包括以下步骤：在硅衬底（101）的第一表面中形成在要形成通孔的区域周围的第一杂质区域（102a），第一杂质区域（102）更高 在所述硅衬底（101）的深度方向上与所述第一杂质区（102a）相邻的位置形成第二杂质区（102b），所述第二杂质区（102b） 杂质浓度高于第一杂质区（102a），在第一表面上形成蚀刻停止层（103），形成在硅衬底（101）的第二表面上具有开口的蚀刻掩模层（104） 并且蚀刻硅衬底（101），直到至少蚀刻停止层（103）经由开口露出。

公开(公告)号：US08409452B2

公开(公告)日：2013-04-02

申请号：US12197499

申请日：2008-08-25

申请人： Keiichi Sasaki ,  Yukihiro Hayakawa

发明人： Keiichi Sasaki ,  Yukihiro Hayakawa

IPC分类号： H01B13/00

CPC分类号： H01L21/308 ,  B41J2/1603 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1642 ,  B41J2202/13 ,  H01L29/06

摘要： A through-hole forming method includes steps of forming a first impurity region (102a) around a region where a through-hole is to be formed in the first surface of a silicon substrate (101), the first impurity region (102) being higher in impurity concentration than the silicon substrate (101), forming a second impurity region (102b) at a position adjacent to the first impurity region (102a) in the depth direction of the silicon substrate (101), the second impurity region (102b) being higher in impurity concentration than the first impurity region (102a), forming an etch stop layer (103) on the first surface, forming an etch mask layer (104) having an opening on the second surface of the silicon substrate (101) opposite to the first surface, and etching the silicon substrate (101) until at least the etch stop layer (103) is exposed via the opening.

摘要翻译： 通孔形成方法包括以下步骤：在硅衬底（101）的第一表面中形成在要形成通孔的区域周围的第一杂质区域（102a），第一杂质区域（102）更高 在所述硅衬底（101）的深度方向上与所述第一杂质区（102a）相邻的位置形成第二杂质区（102b），所述第二杂质区（102b） 杂质浓度高于第一杂质区（102a），在第一表面上形成蚀刻停止层（103），形成在硅衬底（101）的第二表面上具有开口的蚀刻掩模层（104） 并且蚀刻硅衬底（101），直到至少蚀刻停止层（103）经由开口露出。

公开(公告)号：US20120257855A1

公开(公告)日：2012-10-11

申请号：US13410131

申请日：2012-03-01

申请人： Yuto Yamashita ,  Keiichi Sasaki ,  Etsuo Ogino ,  Yasuaki Tamura ,  Yuji Akahori ,  Yuichi Suzuki

发明人： Yuto Yamashita ,  Keiichi Sasaki ,  Etsuo Ogino ,  Yasuaki Tamura ,  Yuji Akahori ,  Yuichi Suzuki

IPC分类号： G02B6/32

CPC分类号： G02B6/425 ,  G02B6/4215

摘要： PROBLEMAn object of the present invention is to easily and inexpensively manufacture an array-type photo module and, in addition, coexist high-density array and low crosstalk.SOLUTIONThe present invention provides an array-type photo module M including a filter 31, which, in each channel, transmits therethrough a portion of emitting light from an incident optical fiber 11 on the opposite side of a gradient-index lens array 2 and reflects another portion of the emitting light from the incident optical fiber 11 toward the gradient-index lens array 2, and a light-shielding member 32 (33) which is arranged on the opposite side of the gradient-index lens array 2 of the filter 31 so as to be spaced from the filter 31 and, in each channel, has an opening 34 (35) passing therethrough transmitted light from the filter 31 on the opposite side of the filter 31.

摘要翻译： 发明内容本发明的目的在于容易且廉价地制造阵列型照相模块，另外共存高密度阵列和低串扰。 解决方案本发明提供一种阵列型光模块M，其包括滤光器31，滤光器31在每个通道中透过其中一部分发射光，该入射光纤11位于梯度折射率透镜阵列2的相对侧并反射 来自入射光纤11的发光的另一部分朝向梯度折射率透镜阵列2，以及设置在滤光器31的梯度折射率透镜阵列2的相反侧的遮光部件32（33） 与过滤器31隔开，并且在每个通道中具有穿过过滤器31的相反侧上的来自过滤器31的透射光的开口34（35）。