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公开(公告)号:US5463248A
公开(公告)日:1995-10-31
申请号:US243864
申请日:1994-05-17
申请人: Keiichi Yano , Takashi Takahashi , Kazuo Kimura , Yoshitoshi Sato , Kouji Yamakawa , Toshishige Yamamoto , Masafumi Fujii , Shizuki Hashimoto , Hiroshi Takamichi
发明人: Keiichi Yano , Takashi Takahashi , Kazuo Kimura , Yoshitoshi Sato , Kouji Yamakawa , Toshishige Yamamoto , Masafumi Fujii , Shizuki Hashimoto , Hiroshi Takamichi
CPC分类号: H01L23/49582 , H01L23/10 , H01L24/48 , H01L2224/32225 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/73265 , H01L2224/85455 , H01L2224/8546 , H01L2924/00014 , H01L2924/01004 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15153 , H01L2924/15165 , H01L2924/15747 , H01L2924/15787 , H01L2924/16152 , H01L2924/30107 , H01L2924/351
摘要: A semiconductor package comprises an aluminum nitride substrate having a semiconductor element mounted thereon, a lead frame junctioned to the side of the aluminum nitride substrate directly contacting the mounted semiconductor element, and a ceramic sealing member junctioned to the aluminum nitride substrate so as to seal the semiconductor element. The lead frame has a coating layer of a nonmagnetic metallic material formed in a thickness of not more than 20 .mu.m on only one of the opposite surfaces of a lead frame matrix made of a ferromagnetic metal to which a bonding wire is to be junctioned. The layer of the nonmagnetic metallic material is formed by any of such thin film forming technique as the vacuum deposition technique, the spattering technique, and the plating technique. The coating layer formed on only one of the opposite surfaces of the lead frame matrix is capable of amply curbing the resistance and the dependency of inductance on frequency. The aluminum nitride substrate is capable of imparting an ideal ability to radiate heat. The semiconductor package enables a high-speed quality semiconductor element having such a high system clock frequency as is not less than 50 MHz to be operated stably.
摘要翻译: 半导体封装包括其上安装有半导体元件的氮化铝衬底,与直接接触安装的半导体元件的氮化铝衬底侧连接的引线框架和与氮化铝衬底结合的陶瓷密封构件,以密封 半导体元件。 引线框架具有非磁性金属材料的涂层,所述涂层的厚度不大于20μm,仅由引线框架矩阵的相反表面形成,所述引线框架矩阵由铁磁金属制成,所述引线框矩阵由所述铁磁金属连接。 非磁性金属材料层由真空沉积技术,溅射技术和电镀技术中的任何一种薄膜形成技术形成。 仅形成在引线框架矩阵的相对表面之一上的涂层能够充分地抑制电阻和电感对频率的依赖性。 氮化铝衬底能够赋予理想的辐射热能力。 半导体封装使得能够稳定地操作具有不低于50MHz的系统时钟频率的高速质量的半导体元件。
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公开(公告)号:US5496967A
公开(公告)日:1996-03-05
申请号:US173519
申请日:1993-12-28
IPC分类号: H01L23/12 , H01L23/495 , H01L23/50 , H01L23/02
CPC分类号: H01L23/49575 , H01L23/49531 , H01L24/49 , H01L2224/48091 , H01L2224/49109 , H01L2224/4911 , H01L2224/49171 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/181 , H01L2924/19107
摘要: A package for holding at least one integrated circuit (IC) chip includes an IC chip, a lead frame, and a ceramic relay substrate with a wiring pattern. Respective portions of the wiring pattern are connected to the IC chip and the lead frame by respective bonding wires. The substrate includes at least one green tape with at least part of the wiring pattern thereon, and formed by printing a metal paste on the green tape and then firing it. An opening may be provided in the green tape to receive the IC chip. The assembly, which includes the IC chip, the substrate, and part of the leads of the lead frame, is sealed in a resin molding using a molding technique.
摘要翻译: 用于保持至少一个集成电路(IC)芯片的封装包括具有布线图案的IC芯片,引线框架和陶瓷继电器基板。 布线图案的各部分通过各自的接合线连接到IC芯片和引线框架。 基板包括至少一个具有其上的布线图案的至少一部分的生带,并通过在生带上印刷金属膏然后进行烧制而形成。 可以在绿带中设置开口以接收IC芯片。 使用成型技术将包括IC芯片,基板和引线框架的引线的一部分的组件密封在树脂模制中。
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公开(公告)号:US5414300A
公开(公告)日:1995-05-09
申请号:US301186
申请日:1994-09-06
申请人: Yoji Tozawa , Shizuki Hashimoto , Tetsuya Yamamoto
发明人: Yoji Tozawa , Shizuki Hashimoto , Tetsuya Yamamoto
CPC分类号: H01L23/10 , H01L23/04 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L24/45 , H01L24/48 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15312 , H01L2924/1532 , H01L2924/15787 , H01L2924/16195 , H01L2924/16787 , Y10T428/12646 , Y10T428/12701
摘要: In a ceramic lid for sealing a semiconductor device mount portion of a ceramic package substrate having a semiconductor device mounted thereon, a seal layer disposed in an outer peripheral edge portion of a lid is formed by a solder comprising 2 to 15 wt % of Bi, 2.0 to 6.0 wt % of Sn, 0.5 to 2.0 wt % of In, 0.5 to 2.0 wt % of Ag and the balance of Pb, through an Ag--Pt system underlying metallized layer. A semiconductor package comprising a semiconductor package substrate and a lid is sealed by the lid.
摘要翻译: 在用于密封安装有半导体器件的陶瓷封装衬底的半导体器件安装部分的陶瓷盖中,通过包含2至15重量%的Bi的焊料形成设置在盖的外周边缘部分中的密封层, 2.0〜6.0重量%的Sn,0.5〜2.0重量%的In,0.5〜2.0重量%的Ag,余量为Pb,通过Ag-Pt体系下面的金属化层。 包括半导体封装基板和盖子的半导体封装被盖子密封。
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