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1.发明申请公开(公告)号：US20140232467A1
公开(公告)日：2014-08-21
申请号：US14237776
申请日：2012-08-24
申请人： Kenji Mukai , Kenichi Horiguchi , Morishige Hieda , Katsuya Kato , Yoshihito Hirano , Kazuya Yamamoto , Hiroyuki Joba , Teruyuki Shimura
发明人： Kenji Mukai , Kenichi Horiguchi , Morishige Hieda , Katsuya Kato , Yoshihito Hirano , Kazuya Yamamoto , Hiroyuki Joba , Teruyuki Shimura
IPC分类号： H03F3/195
CPC分类号： H03F3/195 , H03F1/0277 , H03F3/211 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/255 , H03F2200/423 , H03F2200/451 , H03F2203/7206 , H03F2203/7209
摘要： A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1, and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7. The driver-stage amplifier 3 is fabricated on a silicon substrate 11, while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.
摘要翻译： 高频放大器模块包括：放大从RF输入端子1输入的RF信号的驱动级放大器3和放大由驱动级放大器3放大的信号的末级放大器5，并输出信号 在放大到RF输出端子7之后。驱动级放大器3制造在硅衬底11上，而最后级放大器5制造在砷化镓衬底上。 这种结构使成本降低，同时保持与在砷化镓基板71上制造整个模块的所有部件的情况相当的高频特性。
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公开(公告)号：US20150048887A1
公开(公告)日：2015-02-19
申请号：US14387726
申请日：2013-03-12
申请人： Naoko Nitta , Katsuya Kato , Kenji Mukai , Kenichi Horiguchi , Morishige Hieda , Kazutomi Mori , Kazuya Yamamoto
发明人： Naoko Nitta , Katsuya Kato , Kenji Mukai , Kenichi Horiguchi , Morishige Hieda , Kazutomi Mori , Kazuya Yamamoto
CPC分类号： H03F1/0277 , H03F1/22 , H03F3/193 , H03F3/211 , H03F3/68 , H03F2200/421 , H03F2203/21139 , H03F2203/21175
摘要： An amplifier circuit is configured in such a manner that the withstand voltage between the terminals of a FET 2 (withstand voltage B) is higher than the withstand voltage between the terminals of a FET 1 (withstand voltage A), and that the gate width of the FET 1 (Wg1) is narrower than the gate width of the FET 2 (Wg2). This makes it possible to increase the gain while maintaining high output power. The narrow gate width of the FET 1 (Wg1) connected to an input terminal 3 enables reducing the size of the cascode amplifier.
摘要翻译： 放大电路被配置为使得FET2的端子之间的耐电压（耐压B）高于FET1的端子之间的耐电压（耐受电压A），并且栅极宽度 FET 1（Wg1）比FET2的栅极宽度窄（Wg2）。 这使得可以在保持高输出功率的同时增加增益。 连接到输入端子3的FET1（Wg1）的窄栅极宽度能够减小共源共栅放大器的尺寸。
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公开(公告)号：US07145397B2
公开(公告)日：2006-12-05
申请号：US10889059
申请日：2004-07-13
IPC分类号： H03F1/52
CPC分类号： H03F1/52
摘要： Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.
摘要翻译： 公开了一种用于具有多级的功率放大器的输出过电压保护电路，其包括监视电路，用于监视功率放大器的最后级中的输出晶体管的输出过电压，并且允许电流响应于 监控的输出过电压，以及电流镜电路，用于提供与来自监视器电路的电流成比例的电流，使得功率放大器的第一级晶体管的基极偏置响应于从电流提供的电流而减小 镜像电路，以减少最终级输出晶体管的输出。
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公开(公告)号：US20090027130A1
公开(公告)日：2009-01-29
申请号：US11947831
申请日：2007-11-30
CPC分类号： H03F1/0277 , H03F1/0261 , H03F1/30 , H03F3/195 , H03F2200/411 , H03F2200/451
摘要： A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 μm. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 μm.
摘要翻译： 根据本发明的功率放大器通过切换主功率放大器和辅助功率放大器来操作。 辅助功率放大器的空闲电流小于主功率放大器的空闲电流。 每个主功率放大器和辅助功率放大器具有用于放大RF信号的前置放大元件，用于放大来自前一放大元件的输出信号的后一放大元件，用于驱动前一放大元件的前一偏置电路，以及后一偏置 电路分别用于驱动后面的放大元件。 主功率放大器的后一放大元件与辅助功率放大器的后一放大元件之间的间隔不大于100um。 主功率放大器的后一个放大元件与辅助功率放大器的后一个偏置电路之间的间隔不小于200μm。
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公开(公告)号：US20050030106A1
公开(公告)日：2005-02-10
申请号：US10889059
申请日：2004-07-13
CPC分类号： H03F1/52
摘要： Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.
摘要翻译： 公开了一种用于具有多级的功率放大器的输出过电压保护电路，其包括监视电路，用于监视功率放大器的最后级中的输出晶体管的输出过电压，并且允许电流响应于 监控的输出过电压，以及电流镜电路，用于提供与来自监视器电路的电流成比例的电流，使得功率放大器的第一级晶体管的基极偏置响应于从电流提供的电流而减小 镜像电路，以减少最终级输出晶体管的输出。
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公开(公告)号：US07605648B2
公开(公告)日：2009-10-20
申请号：US11947831
申请日：2007-11-30
IPC分类号： H03F1/14
CPC分类号： H03F1/0277 , H03F1/0261 , H03F1/30 , H03F3/195 , H03F2200/411 , H03F2200/451
摘要： A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 μm. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 μm.
摘要翻译： 根据本发明的功率放大器通过切换主功率放大器和辅助功率放大器来操作。 辅助功率放大器的空闲电流小于主功率放大器的空闲电流。 每个主功率放大器和辅助功率放大器具有用于放大RF信号的前置放大元件，用于放大来自前一放大元件的输出信号的后一放大元件，用于驱动前一放大元件的前一偏置电路，以及后一偏置 电路分别用于驱动后面的放大元件。 主功率放大器的后一放大元件与辅助功率放大器的后一放大元件之间的间隔不大于100um。 主功率放大器的后一个放大元件与辅助功率放大器的后一个偏置电路之间的间隔不小于200μm。
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公开(公告)号：US20130249626A1
公开(公告)日：2013-09-26
申请号：US13992317
申请日：2011-11-09
申请人： Naoko Matsunaga , Kenichi Horiguchi , Hiroshi Otsuka , Masatoshi Nakayama , Kazuhiro Iyomasa , Kazuya Yamamoto , Akira Inoue
发明人： Naoko Matsunaga , Kenichi Horiguchi , Hiroshi Otsuka , Masatoshi Nakayama , Kazuhiro Iyomasa , Kazuya Yamamoto , Akira Inoue
IPC分类号： H03F1/02
CPC分类号： H03F1/0277 , H03F1/34 , H03F1/56 , H03F3/45475 , H03F3/72 , H03F2200/222 , H03F2200/387 , H03F2200/411 , H03F2203/45526 , H03F2203/45528 , H03F2203/45534 , H03F2203/45536 , H03F2203/7215 , H03F2203/7221 , H03F2203/7236 , H03G1/0088 , H03G3/3042
摘要： A multiple power mode amplifier includes: N amplifiers connected in series via switches; and a control circuit for controlling the N amplifiers in accordance with the output modes. P amplifiers out of the N amplifiers constitute a driver amplifier, and constitute a negative feedback amplifier including a feedback circuit for negatively feeding back its own output signal to its own input side. N−P amplifiers constitute a final stage amplifier connected in series to the negative feedback amplifier in a disconnectable manner. The control circuit is configured to: in a first output mode, disconnect the final stage amplifier from the negative feedback amplifier, and disable the feedback circuit; and in a second output mode, connect the final stage amplifier in series to the negative feedback amplifier, and enable the feedback circuit.
摘要翻译： 多功率模式放大器包括：通过开关串联连接的N个放大器; 以及根据输出模式控制N个放大器的控制电路。 N个放大器中的P放大器构成驱动器放大器，并构成负反馈放大器，其包括用于将其自身的输出信号负反馈给其自身输入侧的反馈电路。 N-P放大器构成以可断开方式与负反馈放大器串联连接的最后级放大器。 控制电路被配置为：在第一输出模式下，将最终级放大器与负反馈放大器断开，并且禁用反馈电路; 并且在第二输出模式中，将最后级放大器串联连接到负反馈放大器，并使能反馈电路。
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公开(公告)号：US20120154055A1
公开(公告)日：2012-06-21
申请号：US13195066
申请日：2011-08-01
CPC分类号： H03F3/191 , H03F1/56 , H03F3/193 , H03F2200/15 , H03F2200/18 , H03F2200/211 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03G1/007
摘要： A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
摘要翻译： 功率放大器包括第一放大器单元，第二放大器单元和衰减器。 第二放大器从第一放大器单元接收信号并放大信号。 衰减器设置在第一和第二放大器单元之间。 衰减器具有包括至少一个并联臂和至少一个串联臂的臂，并且具有连接到臂的开关，以相对于第一和第二放大器单元切换臂的电连接状态。 按照从第一放大器单元到第二放大器单元的方向观察，所述至少一个并联臂和至少一个串联臂交替排列。
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公开(公告)号：US08461929B2
公开(公告)日：2013-06-11
申请号：US13195066
申请日：2011-08-01
IPC分类号： H03G3/30
CPC分类号： H03F3/191 , H03F1/56 , H03F3/193 , H03F2200/15 , H03F2200/18 , H03F2200/211 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03G1/007
摘要： A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
摘要翻译： 功率放大器包括第一放大器单元，第二放大器单元和衰减器。 第二放大器从第一放大器单元接收信号并放大信号。 衰减器设置在第一和第二放大器单元之间。 衰减器具有包括至少一个并联臂和至少一个串联臂的臂，并且具有连接到臂的开关，以相对于第一和第二放大器单元切换臂的电连接状态。 按照从第一放大器单元到第二放大器单元的方向观察，所述至少一个并联臂和至少一个串联臂交替排列。
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公开(公告)号：US09007605B2
公开(公告)日：2015-04-14
申请号：US13473804
申请日：2012-05-17
申请人： Kazuya Yamamoto
发明人： Kazuya Yamamoto
CPC分类号： H04N1/00952 , H04N1/00236 , H04N1/00896 , H04N2201/0094
摘要： An image formation apparatus includes an image reading control unit and a print control unit. The print control unit includes: a first communication control unit connected to the image reading control unit; and a power supply control unit configured to control power supply to the image reading control unit. The image reading control unit includes: a second communication control unit connected to the first communication control unit. When completing a process to transition to a power save mode in accordance with an instruction from the print control unit, the image reading control unit cuts off the communications through the second communication control unit. After sending the image reading control unit the instruction to transition to the power save mode, the print control unit detects the cutoff of the communications and then cuts off the power supply to the image reading control unit through the power supply control unit.
摘要翻译： 图像形成装置包括图像读取控制单元和打印控制单元。 打印控制单元包括：连接到图像读取控制单元的第一通信控制单元; 以及电源控制单元，被配置为控制对所述图像读取控制单元的电力供应。 图像读取控制单元包括：连接到第一通信控制单元的第二通信控制单元。 当完成根据来自打印控制单元的指令转换到省电模式的处理时，图像读取控制单元通过第二通信控制单元切断通信。 在将图像读取控制单元发送到转换到省电模式的指令之后，打印控制单元检测通信的截止，然后通过电源控制单元切断对图像读取控制单元的电源。
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