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1.发明授权公开(公告)号：US08513775B2
公开(公告)日：2013-08-20
申请号：US13131614
申请日：2010-09-30
IPC分类号： H01L29/22 , H01L31/0328 , H01L31/0296 , H01L31/00 , H01L31/0336
CPC分类号： C30B29/48 , C30B25/186 , H01L21/02024 , H01L21/02411 , H01L21/02562 , H01L21/463
摘要： Provided is a CdTe-based semiconductor substrate for epitaxial growth, which is capable of growing good-quality epitaxial crystals without urging a substrate user to implement etching treatment before the epitaxial growth.A CdTe-based semiconductor substrate, in which tracks of linear polishing damage with a depth of 1 nm or more are not observed within a viewing range of 10 μm×10 μm when a surface of the substrate is observed by an atomic force microscope, and orange peel defects are not observed when the surface of the substrate is visually observed under a fluorescent lamp, can grow the good-quality epitaxial crystals.
摘要翻译： 提供了一种用于外延生长的CdTe基半导体衬底，其能够在不促使衬底用户在外延生长之前实施蚀刻处理的同时生长良好质量的外延晶体。 当通过原子力显微镜观察基板的表面时，在10mum×10um的观察范围内未观察到具有1nm以上的深度的线性抛光损伤的轨迹的CdTe系半导体基板， 在荧光灯下目视观察基板的表面时，不会观察到橙皮缺陷，可以生长优质的外延晶体。
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2.发明授权公开(公告)号：US07875957B2
公开(公告)日：2011-01-25
申请号：US12438636
申请日：2007-08-17
申请人： Kenji Suzuki , Ryuichi Hirano , Hideki Kurita
发明人： Kenji Suzuki , Ryuichi Hirano , Hideki Kurita
摘要： Provided is a semiconductor substrate for epitaxial growth which does not require any etching treatment as a pretreatment in the stage of performing an epitaxial growth of HgCdTe film. A CdTe system compound semiconductor substrate for the epitaxial growth of the HgCdTe film is housed in an inactive gas atmosphere, in a predetermined period of time (for example, 10 hours) after mirror finish treatment thereof, to thereby regulate the proportion of Te oxide of the total amount of Te on the substrate surface which is obtained by XPS measurement so as to be not more than 30%.
摘要翻译： 提供一种用于外延生长的半导体衬底，其在进行HgCdTe膜的外延生长的阶段中不需要任何蚀刻处理作为预处理。 用于HgCdTe膜的外延生长的CdTe系化合物半导体衬底在镜面抛光处理之后的预定时间（例如10小时）内容纳在惰性气体气氛中，从而调节 通过XPS测量获得的基板表面上的Te的总量不大于30％。
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3.发明申请公开(公告)号：US20090269271A1
公开(公告)日：2009-10-29
申请号：US12438636
申请日：2007-08-17
申请人： Kenji Suzuki , Ryuichi Hirano , Hideki Kurita
发明人： Kenji Suzuki , Ryuichi Hirano , Hideki Kurita
IPC分类号： C01B19/04
摘要： Provided is a semiconductor substrate for epitaxial growth which does not require any etching treatment as a pretreatment in the stage of performing an epitaxial growth of HgCdTe film. A CdTe system compound semiconductor substrate for the epitaxial growth of the HgCdTe film is housed in an inactive gas atmosphere, in a predetermined period of time (for example, 10 hours) after mirror finish treatment thereof, to thereby regulate the proportion of Te oxide of the total amount of Te on the substrate surface which is obtained by XPS measurement so as to be not more than 30%.
摘要翻译： 提供一种用于外延生长的半导体衬底，其在进行HgCdTe膜的外延生长的阶段中不需要任何蚀刻处理作为预处理。 用于HgCdTe膜的外延生长的CdTe系化合物半导体衬底在镜面抛光处理之后的预定时间（例如10小时）内容纳在惰性气体气氛中，从而调节 通过XPS测量获得的基板表面上的Te的总量不大于30％。
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4.发明授权公开(公告)号：US07745854B2
公开(公告)日：2010-06-29
申请号：US12223453
申请日：2007-02-02
申请人： Hideki Kurita , Ryuichi Hirano
发明人： Hideki Kurita , Ryuichi Hirano
CPC分类号： C30B25/18 , C30B29/40 , Y10T428/24479
摘要： It is to provide a substrate for growing a semiconductor, which is effective for suppressing an occurrence of surface defects different in type from hillock defects in case of epitaxially growing a compound semiconductor layer, particularly an Al-based compound semiconductor layer.In a substrate for growing a compound semiconductor, in which a crystal surface inclined at a predetermined off angle with respect to a (100) plane is a principal plane, an angle made by a direction of a vector obtained by projecting a normal vector of the principal plane on the (100) plane and one direction of a [0-11] direction, a [01-1] direction, a [011] direction and a [0-1-1] direction is set to be less than 35°, and the compound semiconductor layer is epitaxially grown on the substrate.
摘要翻译： 提供一种用于生长半导体的衬底，其在外延生长化合物半导体层，特别是Al基化合物半导体层的情况下，有效抑制类型与山丘缺陷不同的表面缺陷的发生。 在用于生长化合物半导体的衬底中，其中以相对于（100）面倾斜预定偏离角的晶体表面是主平面，由通过将（100）面的法向量投影获得的矢量的方向 （100）面上的主平面和[0-11]方向的一个方向，[01-1]方向，[011]方向和[0-1-1]方向设定为小于35 °，并且在衬底上外延生长化合物半导体层。
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5.发明申请公开(公告)号：US20090025629A1
公开(公告)日：2009-01-29
申请号：US12223453
申请日：2007-02-02
申请人： Hideki Kurita , Ryuichi Hirano
发明人： Hideki Kurita , Ryuichi Hirano
CPC分类号： C30B25/18 , C30B29/40 , Y10T428/24479
摘要： It is to provide a substrate for growing a semiconductor, which is effective for suppressing an occurrence of surface defects different in type from hillock defects in case of epitaxially growing a compound semiconductor layer, particularly an Al-based compound semiconductor layer.In a substrate for growing a compound semiconductor, in which a crystal surface inclined at a predetermined off angle with respect to a (100) plane is a principal plane, an angle made by a direction of a vector obtained by projecting a normal vector of the principal plane on the (100) plane and one direction of a [0-11] direction, a [01-1] direction, a [011] direction and a [0-1-1] direction is set to be less than 35°, and the compound semiconductor layer is epitaxially grown on the substrate.
摘要翻译： 提供一种用于生长半导体的衬底，其在外延生长化合物半导体层，特别是Al基化合物半导体层的情况下，有效抑制类型与山丘缺陷不同的表面缺陷的发生。 在用于生长化合物半导体的衬底中，其中以相对于（100）面倾斜预定偏离角的晶体表面是主平面，由通过将（100）面的法向量投影获得的矢量的方向 （100）面上的主平面和[0-11]方向的一个方向，[01-1]方向，[011]方向和[0-1-1]方向设定为小于35 °，并且在衬底上外延生长化合物半导体层。
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公开(公告)号：US07510082B2
公开(公告)日：2009-03-31
申请号：US11596681
申请日：2005-03-23
申请人： Masayuki Kimura , Ryuichi Hirano , Hideki Kurita
发明人： Masayuki Kimura , Ryuichi Hirano , Hideki Kurita
IPC分类号： B65D85/48
CPC分类号： H01L21/67353
摘要： The present invention relates to a wafer storage container which contains a semiconductor wafer one by one and provides a technology to effectively reduce adhesion of particles on semiconductor wafer surfaces during the storage of the wafer. A wafer storage container which contains a wafer one by one, includes: a wafer containing member including a domed-shape recess which abuts on a circumferential edge of the wafer and is capable of holding the wafer; and a cover member which is engaged with the wafer containing member and is capable of sealing the wafer containing member; and a wafer rear surface protection member which is formed into a shape substantially same as an opening of the domed-shape recess and comes into contact with an entire rear surface of the wafer placed so that a front surface is directed the domed-shape recess.
摘要翻译： 本发明涉及一种晶片储存容器，它一个接一个地包含一个半导体晶片，并且提供了一种在晶片保存期间有效降低颗粒在半导体晶片表面上的附着力的技术。 一个晶片储存容器，其一个接一个地包含一个晶片，它包括：一个晶片容纳元件，它包括一个圆顶形凹槽，该半圆形凹槽邻接晶圆的圆周边缘并且能够保持晶片; 以及盖构件，其与所述晶片容纳构件接合并且能够密封所述晶片容纳构件; 以及晶片后表面保护构件，其形成为与圆顶形凹部的开口基本相同的形状，并与放置的晶片的整个后表面接触，使得前表面被引导到圆顶形凹部。
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公开(公告)号：US20070221519A1
公开(公告)日：2007-09-27
申请号：US11596681
申请日：2005-03-23
申请人： Masayuki Kimura , Ryuichi Hirano , Hideki Kurita
发明人： Masayuki Kimura , Ryuichi Hirano , Hideki Kurita
CPC分类号： H01L21/67353
摘要： The present invention relates to a wafer storage container which contains a semiconductor wafer one by one and provides a technology to effectively reduce adhesion of particles on semiconductor wafer surfaces during the storage of the wafer. A wafer storage container which contains a wafer one by one, includes: a wafer containing member including a domed-shape recess which abuts on a circumferential edge of the wafer and is capable of holding the wafer; and a cover member which is engaged with the wafer containing member and is capable of sealing the wafer containing member; and a wafer rear surface protection member which is formed into a shape substantially same as an opening of the domed-shape recess and comes into contact with an entire rear surface of the wafer placed so that a front surface is directed the domed-shape recess.
摘要翻译： 本发明涉及一种晶片储存容器，它一个接一个地包含一个半导体晶片，并且提供了一种在晶片保存期间有效降低颗粒在半导体晶片表面上的附着力的技术。 一个晶片储存容器，其一个接一个地包含一个晶片，它包括：一个晶片容纳元件，它包括一个圆顶形凹槽，该半圆形凹槽邻接晶圆的圆周边缘并且能够保持晶片; 以及盖构件，其与所述晶片容纳构件接合并且能够密封所述晶片容纳构件; 以及晶片后表面保护构件，其形成为与圆顶形凹部的开口基本相同的形状，并与放置的晶片的整个后表面接触，使得前表面被引导到圆顶形凹部。
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8.发明申请公开(公告)号：US20110233729A1
公开(公告)日：2011-09-29
申请号：US13131614
申请日：2010-09-30
申请人： Kenji Suzuki , Hideyuki Taniguchi , Hideki Kurta , Ryuichi Hirano
发明人： Kenji Suzuki , Hideyuki Taniguchi , Hideki Kurta , Ryuichi Hirano
CPC分类号： C30B29/48 , C30B25/186 , H01L21/02024 , H01L21/02411 , H01L21/02562 , H01L21/463
摘要： Provided is a CdTe-based semiconductor substrate for epitaxial growth, which is capable of growing good-quality epitaxial crystals without urging a substrate user to implement etching treatment before the epitaxial growth.A CdTe-based semiconductor substrate, in which tracks of linear polishing damage with a depth of 1 nm or more are not observed within a viewing range of 10 μm×10 μm when a surface of the substrate is observed by an atomic force microscope, and orange peel defects are not observed when the surface of the substrate is visually observed under a fluorescent lamp, can grow the good-quality epitaxial crystals.
摘要翻译： 提供了一种用于外延生长的CdTe基半导体衬底，其能够在不促使衬底用户在外延生长之前实施蚀刻处理的同时生长良好质量的外延晶体。 当通过原子力显微镜观察基板的表面时，在10μm×10μm的观察范围内未观察到具有1nm以上的深度的线性抛光损伤的轨迹的CdTe系半导体基板， 在荧光灯下目视观察基板的表面时，不会观察到橙皮缺陷，可以生长优质的外延晶体。
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公开(公告)号：US20080247935A1
公开(公告)日：2008-10-09
申请号：US10593036
申请日：2005-02-15
申请人： Kenji Suzuki , Ryuichi Hirano , Masashi Nakamura
发明人： Kenji Suzuki , Ryuichi Hirano , Masashi Nakamura
IPC分类号： H01L29/20
摘要： It is to provide a substrate for epitaxial growth, which is capable of improving a surface state of an epitaxial layer at microroughness level. In a substrate for epitaxial growth, when haze is defined as a value calculated by dividing intensity of scattered light obtained when light is incident from a predetermined light source onto a surface of a substrate, by intensity of the incident light from the light source, the haze is not more than 2 ppm all over an effectively used area of the substrate and an off-angle with respect to a plane direction is 0.05 to 0.10°.
摘要翻译： 提供用于外延生长的衬底，其能够在微粗糙度水平下改善外延层的表面状态。 在用于外延生长的基板中，当雾度被定义为通过将光从预定光源入射到基板的表面上时获得的散射光的强度，通过来自光源的入射光的强度来计算， 在基板的有效使用面积上的雾度不超过2ppm，相对于平面方向的偏角为0.05〜0.10°。
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公开(公告)号：US08815010B2
公开(公告)日：2014-08-26
申请号：US11587698
申请日：2005-02-15
申请人： Akira Noda , Ryuichi Hirano
发明人： Akira Noda , Ryuichi Hirano
摘要： A method for producing a low-dislocation InP single crystal suitably used for an optical device such as a semiconductor laser, and the low-dislocation InP single crystal wafer are provided. In a liquid-encapsulated Czochralski method in which a semiconductor raw material and an encapsulant are contained in a raw material melt containing part comprising a cylindrical crucible having a bottom, the raw material containing part is heated to melt the raw material, and a seed crystal is brought into contact with a surface of a melt of the raw material in a state of being covered with the encapsulant to grow a crystal while the seed crystal is raised; a crystal shoulder part is grown from the seed crystal by setting a temperature gradient in a crystal growth direction to 25° C./cm or less and setting a temperature-fall amount to 0.25° C./hr or more. Thus, an iron-doped or undoped InP single crystal wafer in which an area having a dislocation density of 500/cm2 or less occupies 70% or more is realized.
摘要翻译： 提供适合用于半导体激光器等光学元件的低位错InP单晶的制造方法和低位错InP单晶晶片。 在包含具有底部的圆柱形坩埚的原料熔融物的部件中含有半导体原料和密封剂的液体封装的切克劳斯法中，加热含有原料的部分，使原料熔融， 在被密封剂覆盖的状态下与原料的熔体的表面接触以在晶种升高的同时生长晶体; 通过将晶体生长方向的温度梯度设定为25℃/ cm以下，将温度下降量设定为0.25℃/小时以上，从晶种生长晶面部。 因此，实现了具有500 / cm 2以下的位错密度的面积占70％以上的铁掺杂或未掺杂的InP单晶晶片。
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