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1.发明授权Method and apparatus for extended range frequency correction burst detection 有权用于扩展范围频率校正突发检测的方法和装置公开(公告)号：US06480555B1
公开(公告)日：2002-11-12
申请号：US09388666
申请日：1999-09-02
IPC分类号： H03D100
CPC分类号： H04L7/04 , H04L27/14 , H04L2007/047
摘要： A radio communication device provides extended burst tone detection for a demodulated I and Q input signal. The device includes a first burst detector coupled with the input signal and provides a first detection signal when a FCB tone is detected. A frequency shifter is coupled with the input signal and frequency translates the input signal by a predetermined amount. A second burst detector is coupled with the translated input signal and provides a second detection signal when a FCB tone is detected. A combiner is coupled with the first and second detection signals and indicates FCB tone detection when either of the first and second detection signals indicate FCB tone detection.
摘要翻译： 无线电通信设备为解调的I和Q输入信号提供扩展的突发音检测。 该装置包括与输入信号耦合的第一突发检测器，并且当检测到FCB音时提供第一检测信号。 频率移位器与输入信号耦合，频率将输入信号转换预定量。 第二突发检测器与转换的输入信号耦合，并且当检测到FCB音时提供第二检测信号。 组合器与第一和第二检测信号耦合，并且当第一和第二检测信号中的任一个指示FCB音检测时，指示FCB音检测。
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2.发明授权
公开(公告)号：US5448770A
公开(公告)日：1995-09-05
申请号：US42956
申请日：1993-04-05
摘要： A TC controlled RF signal detecting circuitry (211) used in the output power control circuit of a TDMA RF signal power amplifier includes positive coefficient current source (303) producing current I+ having a positive TC, negative coefficient current source (305) producing current I- having a negative TC, and current mirror (301) for summing currents I+ and I- to produce substantially identical compensated mirror currents Im1 and Im2. Anti-clamping current mirror (309) mirrors current Im2 to produce compensated currents Ia1 and Ia2, which are applied to and bias a Schottky diode coupled in series to a resistor network in each leg of diode detector (311). Each leg of diode detector (311) has a positive TC, which is substantially offset by the negative TC of compensated currents Ia1 and Ia2. Schottky diode (431) in one leg of diode detector (311) half-wave rectifies RF feedback signal (212) to produce temperature and voltage compensated power level signal (229), which has a DC level proportional to the output power level of RF output signal (214). By using TC controlled RF signal detecting circuitry (211), power level signal (229) has a DC level which is stable to within 5 mV over temperature ranging from -55.degree. C. to +125.degree. C. and over power supply voltage ranging from 2.7 V to 4.75 V.
摘要翻译： 在TDMA RF信号功率放大器的输出功率控制电路中使用的TC控制的RF信号检测电路（211）包括产生具有正的TC的电流I +的正系数电流源（303），负的系数电流源（305）产生电流I - 具有负的TC和电流镜（301），用于对电流I +和I求和，以产生基本上相同的补偿后的反射镜电流Im1和Im2。 抗钳位电流镜（309）反射电流Im2以产生补偿电流Ia1和Ia2，其施加到二极管检测器（311）的每个支路中并联耦合到电阻器网络的肖特基二极管并将其偏置。 二极管检测器（311）的每条支路具有正的TC，其基本上被补偿电流Ia1和Ia2的负TC偏移。 二极管检测器（311）的一条支路中的肖特基二极管（431）对RF反馈信号（212）半波整流，以产生温度和电压补偿功率电平信号（229），其具有与RF的输出功率电平成比例的DC电平 输出信号（214）。 通过使用TC控制的RF信号检测电路（211），功率电平信号（229）具有在-55℃至+125℃的温度范围内稳定在5mV内的DC电平，以及超过电源电压范围 从2.7 V到4.75 V.
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公开(公告)号：US5070310A
公开(公告)日：1991-12-03
申请号：US576342
申请日：1990-08-31
CPC分类号： H03L7/1976
摘要： A multiple latched accumulator fractional-N synthesizer for use in digital radio transceivers is disclosed. The divisor of the frequency divider (103) of the synthesizer is varied with time by the summation of accumulator carry output digital sequences which result in frequency increments equal to a fraction of the reference frequency. The accumulators (615, 617) are latched such that upon the occurrence of a clock pulse, data is transferred through each accumulator one clock pulse step at a time, such that the delay through the system is equal to that of only one accumulator. The carry outputs of each accumulator are coupled through delays (645, 647, 649, 631, 633) equal to one less delay than the number of accumulators and added (635) such that all higher order accumulator carry outputs add to a net summation of zero so as to not upset the desired fractional setting of the first accumulator.
摘要翻译： 公开了一种用于数字无线电收发器的多锁存储器分数N合成器。 合成器的分频器（103）的除数随时间通过累加器进位输出数字序列的总和而变化，这导致频率增量等于参考频率的一部分。 累加器（615,617）被锁存，使得在发生时钟脉冲时，数据通过每个累加器一次一个时钟脉冲步进传送，使得通过系统的延迟等于仅一个累加器的延迟。 每个累加器的进位输出通过等于比累加器的数量少一个延迟（635）的延迟（645,647,649,631,633）耦合，使得所有高阶累加器运算输出增加到 零，以便不破坏第一累加器的期望的分数设置。
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公开(公告)号：US4885553A
公开(公告)日：1989-12-05
申请号：US278052
申请日：1988-11-30
CPC分类号： H03L7/183 , H03L7/0891
摘要： A continuously adaptive phase locked loop synthesizer is disclosed in which error correction pulses from a phase detector are separated into narrow pulse width and wide pulse width pulses. The wide pulse width pulses are coupled to the loop filter to enable a rapid charge of the loop filter to provide a VCO control voltage on a control line connected to the output of the loop filter. The narrow pulse width pulses are filtered by a narrow bandwidth filter before being applied to the loop filter thus enabling a slow charge of the loop filter. The narrow bandwidth filter is decoupled from the control line but referenced to the control line voltage.
摘要翻译： 公开了一种连续自适应锁相环合成器，其中来自相位检测器的纠错脉冲被分成窄脉冲宽度和宽脉冲宽度脉冲。 宽脉冲宽度脉冲耦合到环路滤波器，以使得环路滤波器能够快速充电，以在连接到环路滤波器的输出的控制线上提供VCO控制电压。 窄脉冲宽度脉冲在施加到环路滤波器之前被窄带宽滤波器滤波，从而实现环路滤波器的慢速充电。 窄带宽滤波器与控制线分离，但参考控制线电压。
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公开(公告)号：US08351880B1
公开(公告)日：2013-01-08
申请号：US12841712
申请日：2010-07-22
CPC分类号： H03F3/245 , H03G3/3047
摘要： Embodiments of the present disclosure relate to an radio frequency (RF) power amplifier (PA) module having a saturation corrected integration loop, which includes saturation detection and correction circuitry, an integrator, PA circuitry, and detector circuitry. An integrator output signal from the integrator is prevented from being driven toward a power supply rail in the presence of saturation of the PA circuitry by saturation correction of an input ramp signal. The saturation detection and correction circuitry receives and saturation corrects the input ramp signal to provide a saturation corrected input ramp signal to the integrator based on detecting saturation of the PA circuitry. Saturation of the PA circuitry is detected based on a difference between a desired PA output voltage, as indicated by the input ramp signal, and a detected PA output voltage, as indicated by a detector output signal from the detector circuitry.
摘要翻译： 本公开的实施例涉及具有饱和校正积分环路的射频（RF）功率放大器（PA）模块，其包括饱和检测和校正电路，积分器，PA电路和检测器电路。 在积分器的积分器输出信号通过输入斜坡信号的饱和校正在PA电路饱和的情况下，不会被驱动朝向电源轨。 饱和检测和校正电路接收并饱和校正输入斜坡信号，以基于检测PA电路的饱和度向积分器提供饱和校正的输入斜坡信号。 基于由输入斜坡信号指示的期望的PA输出电压和检测到的PA输出电压之间的差异检测PA电路的饱和度，如来自检测器电路的检测器输出信号所示。
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公开(公告)号：US20120303836A1
公开(公告)日：2012-11-29
申请号：US13478254
申请日：2012-05-23
IPC分类号： G06F3/00
CPC分类号： G06F13/4247 , G06F2213/0052
摘要： Disclosed is a method in which slaves are cascaded on a bus, and cascading slave-to-slave communication is used to prioritize (or sequence) the software slave ID programming, enabling users to uniquely identify identical components in a circuit. In one embodiment, the first slave in the cascade stalls the programming of other slaves until the first slave's programming is complete. Once completed, the first slave then enables programming of the second slave, and so on. This embodiment allows multiple placements of identical slaves on the bus, and provides a method to uniquely identify and control each slave by using cascading software slave ID programming. In another embodiment, a structure with a similar effect may be created by lack of enablement (instead of disablement), wherein initially only the first slave is enabled, and subsequent slaves are not initially enabled. Additionally, the present disclosure is compatible with the MIPI RFFE standard interface.
摘要翻译： 公开了一种方法，其中从站在总线上级联，并且级联从站到从站通信用于对软件从站ID编程进行优先级排序（或顺序），使用户能够唯一地识别电路中的相同组件。 在一个实施例中，级联中的第一从机停止其他从机的编程，直到第一从机的编程完成。 一旦完成，第一个从站就可以对第二个从站进行编程，依此类推。 该实施例允许总线上相同从站的多个放置，并且提供通过使用级联软件从属ID编程唯一地识别和控制每个从设备的方法。 在另一个实施例中，具有相似效果的结构可能由于缺少启用（而不是禁用）而产生，其中最初只有第一从属被启用，并且后续的从设备最初不被启用。 另外，本公开与MIPI RFFE标准接口兼容。
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7.发明授权Power amplifier control according to a delayed waveform suitable for use in a communication device 有权根据适用于通信设备的延迟波形的功率放大器控制公开(公告)号：US06169886A
公开(公告)日：2001-01-02
申请号：US09184614
申请日：1998-11-02
IPC分类号： H04B700
CPC分类号： H03G3/3047
摘要： A wireless communication device (202), such as a cellular telephone, has a power amplifier (218) and a power amplifier control (222). The power amplifier (218) is selectively controllable to amplify, to different output power levels, a signal for transmission. In a high power mode requiring amplification of the signal to a high output power level, the power amplifier control (222) controls the power amplifier to amplify the signal according to a predetermined amplitude waveform (106). In a low power mode requiring amplification of the signal to a low output power level, the power amplifier control controls the power amplifier to amplify the signal according to a delayed one of the predetermined amplitude waveform (300).
摘要翻译： 诸如蜂窝电话的无线通信设备（202）具有功率放大器（218）和功率放大器控制（222）。 功率放大器（218）可选择性地控制，以将不同的输出功率电平放大到用于传输的信号。 在需要将信号放大到高输出功率电平的高功率模式下，功率放大器控制（222）根据预定的振幅波形（106）控制功率放大器放大信号。 在需要将信号放大到低输出功率电平的低功率模式下，功率放大器控制控制功率放大器根据预定振幅波形（300）中延迟的一个来放大信号。
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8.发明授权
公开(公告)号：US5278994A
公开(公告)日：1994-01-11
申请号：US709737
申请日：1991-06-03
CPC分类号： H03G3/3047
摘要： A power amplifier controller for detecting saturation of the power amplifier (203) and corrects the automatic output control voltage (231) to avoid any further saturation. A detector (211) detects the power of the radio frequency (RF) output signal (211) and generates a signal (229) correlated to the detected power. Comparator (217) compares changes in that signal (229) to changes in the voltage of the AOC signal (231). The comparator (217) generates a signal (233) correlated to saturation of the power amplifier (203) for a DSP (223). The DSP (223) checks the status of this signal (233). Upon detecting saturation, an algorithm contained within the DSP methodically reduces the voltage of the AOC signal (231) until there is a change in the power of the RF output signal (211).
摘要翻译： 一种用于检测功率放大器（203）的饱和度并校正自动输出控制电压（231）以避免进一步饱和的功率放大器控制器。 检测器（211）检测射频（RF）输出信号（211）的功率，并产生与检测到的功率相关的信号（229）。 比较器（217）将该信号（229）的变化与AOC信号（231）的电压变化进行比较。 比较器（217）产生与DSP（223）的功率放大器（203）的饱和相关的信号（233）。 DSP（223）检查该信号的状态（233）。 在检测到饱和时，包含在DSP内的算法有效地降低了AOC信号（231）的电压，直到RF输出信号（211）的功率发生变化。
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公开(公告)号：US5150075A
公开(公告)日：1992-09-22
申请号：US709738
申请日：1991-06-03
CPC分类号： H03G3/3047
摘要： The present disclosure includes a discussion of a power amplifier controller which powers up a power amplifier (203) without a substantial burst of frequency noise. The controller has a RF output power detector (211) which generates a signal (229) correllated to the power level of the power amplifier (203). This signal (229) is compared (215) to a reference signal (213) to determine if the power amplifier (203) is active. The signal (227) generated by this comparator (215) is used to determine the voltage level of the Automatic Output Control (AOC) signal (231).
摘要翻译： 本公开内容包括功率放大器控制器的讨论，功率放大器控制器对功率放大器（203）供电而没有大量的频率噪声突发。 控制器具有RF输出功率检测器（211），其产生与功率放大器（203）的功率电平相对应的信号（229）。 将该信号（229）与参考信号（213）进行比较（215），以确定功率放大器（203）是否有效。 由该比较器（215）产生的信号（227）用于确定自动输出控制（AOC）信号（231）的电压电平。
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10.发明授权Digital frequency synthesizer having AFC and modulation applied to frequency divider 失效数字频率合成器具有AFC和调制应用于分频器
公开(公告)号：US5111162A
公开(公告)日：1992-05-05
申请号：US695120
申请日：1991-05-03
CPC分类号： H03C3/0933 , H03C3/0925 , H03D7/163 , H03L7/1976
摘要： A fractional-N synthesizer realizes automatic frequency control by adding (509) a digital representation of a determined frequency offset to a digital representation of applied modulation to create the modulus control of a programmable frequency divider (203).
摘要翻译： 分数N合成器通过将确定的频率偏移的数字表示（509）加到应用调制的数字表示上来实现自动频率控制，以创建可编程分频器（203）的模数控制。
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