公开(公告)号：US06625055B1

公开(公告)日：2003-09-23

申请号：US10120113

申请日：2002-04-09

申请人： Kenneth K. Smith ,  Sarah M. Brandenberger ,  Darrel R. Bloomquist ,  Kenneth J. Eldredge ,  Andrew L. Van Brocklin ,  Peter J. Fricke

发明人： Kenneth K. Smith ,  Sarah M. Brandenberger ,  Darrel R. Bloomquist ,  Kenneth J. Eldredge ,  Andrew L. Van Brocklin ,  Peter J. Fricke

IPC分类号： G11C1100

CPC分类号： G11C11/5692

摘要： A read-only memory device is described having non-volatile memory cells that include a memory component connected between electrically conductive traces. A memory component is formed to include a resistor that indicates a resistance value when a potential is applied to a selected memory cell. The resistance value of a memory component in an individual memory cell corresponds to multiple logical bits. The resistance value of a memory component corresponding to a set of logical bits can be based on a thickness and/or an area of electrically resistive material that forms the memory component, and/or based on the geometric shape of the memory component, where different geometric shapes of the electrically resistive material have different resistance values that correspond to different sets of logical bits.

摘要翻译： 描述了只读存储器件，其具有包括连接在导电迹线之间的存储器部件的非易失性存储器单元。 存储器部件形成为包括当电位被施加到所选择的存储器单元时指示电阻值的电阻器。 单个存储单元中的存储器组件的电阻值对应于多个逻辑位。 对应于一组逻辑位的存储器组件的电阻值可以基于形成存储器组件的电阻材料的厚度和/或面积，和/或基于存储器组件的几何形状，其中不同 电阻材料的几何形状具有不同的电阻值，其对应于不同的逻辑位组。

公开(公告)号：US06534841B1

公开(公告)日：2003-03-18

申请号：US10017567

申请日：2001-12-14

申请人： Andrew L. Van Brocklin ,  Kenneth J. Eldredge ,  S. Jonathan Wang ,  Frederick A Perner ,  Peter Fricke

发明人： Andrew L. Van Brocklin ,  Kenneth J. Eldredge ,  S. Jonathan Wang ,  Frederick A Perner ,  Peter Fricke

IPC分类号： H01L2900

CPC分类号： H01L23/5252 ,  H01L27/10 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： A memory structure has an antifuse material that is unpatterned and sandwiched between each of a plurality of antifuse electrode pairs. The antifuse material is continuous between the antifuse electrode pairs. Furthermore the present invention includes a memory structure comprising a plurality of antifuse electrode pairs forming a plurality of row conductors and a plurality of middle conductors in electrical communication with a plurality of control elements.

摘要翻译： 存储器结构具有未图案化并夹在多个反熔丝电极对中的每一个之间的反熔丝材料。 反熔丝材料在反熔丝电极对之间是连续的。 此外，本发明包括一种存储结构，该存储结构包括形成多个行导体的多个反熔丝电极对以及与多个控制元件电连通的多个中间导体。

公开(公告)号：US06836429B2

公开(公告)日：2004-12-28

申请号：US10314114

申请日：2002-12-07

申请人： Kenneth K. Smith ,  Kenneth J. Eldredge

发明人： Kenneth K. Smith ,  Kenneth J. Eldredge

IPC分类号： G11C1100

CPC分类号： G11C5/063 ,  G11C11/16

摘要： A magnetic random-access memory (MRAM) cell according to an embodiment of the invention is disclosed that comprises a magnetic storage element having an easy axis and a hard axis, a write conductor positioned along one of the easy axis and the hard axis, and a write conductor positioned at a non-parallel and non-perpendicular angle to both of the easy axis and the hard axis.

摘要翻译： 公开了根据本发明实施例的磁性随机存取存储器（MRAM）单元，其包括具有容易轴和硬轴的磁存储元件，沿着易轴和硬轴之一定位的写入导体，以及 写入导体以易平滑轴和硬轴两个非平行且非垂直的角度定位。

公开(公告)号：US07102918B2

公开(公告)日：2006-09-05

申请号：US10983776

申请日：2004-11-07

申请人： Kenneth K. Smith ,  Kenneth J. Eldredge

发明人： Kenneth K. Smith ,  Kenneth J. Eldredge

IPC分类号： G11C11/00

CPC分类号： G11C5/063 ,  G11C11/16

摘要： A magnetic random-access memory (MRAM) cell according to an embodiment of the invention is disclosed that comprises a magnetic storage element having an easy axis and a hard axis, a write conductor positioned along one of the easy axis and the hard axis, and a write conductor positioned at a non-parallel and non-perpendicular angle to both of the easy axis and the hard axis.

摘要翻译： 公开了根据本发明实施例的磁性随机存取存储器（MRAM）单元，其包括具有容易轴和硬轴的磁存储元件，沿着易轴和硬轴之一定位的写入导体，以及 写入导体以易平滑轴和硬轴两个非平行且非垂直的角度定位。

公开(公告)号：US06643195B2

公开(公告)日：2003-11-04

申请号：US10044542

申请日：2002-01-11

申请人： Kenneth J. Eldredge ,  Kenneth K. Smith

发明人： Kenneth J. Eldredge ,  Kenneth K. Smith

IPC分类号： G11C700

CPC分类号： G11C11/16 ,  G11C29/76

摘要： An MRAM device includes an array of memory cells. A plurality of traces cross the memory cells. An address decoder coupled to the plurality of traces decodes an address and selects a corresponding subset of the traces. A sparing circuit coupled to the address decoder receives a logical address and outputs a physical address to the address decoder based on memory cell defect information.

公开(公告)号：US20110093761A1

公开(公告)日：2011-04-21

申请号：US12975153

申请日：2010-12-21

申请人： Kenneth J. Eldredge ,  Stephen P. Van Aken

发明人： Kenneth J. Eldredge ,  Stephen P. Van Aken

IPC分类号： H03M13/09 ,  G06F11/16 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5641

摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.

摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储器单元定义多个数据值的目标充电水平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。

公开(公告)号：US07535754B2

公开(公告)日：2009-05-19

申请号：US11264539

申请日：2005-11-01

申请人： Frederick A. Perner ,  Kenneth J. Eldredge

发明人： Frederick A. Perner ,  Kenneth J. Eldredge

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： A memory device and method of reading the memory device is disclosed. The memory device includes a first string of MRAM cells and a second string of MRAM cells. The first string of MRAM cells include a plurality of MRAM cells connected in series and the second string of MRAM cells include another plurality of MRAM cells connected in series. A common connection is controllably connectable to one end of the first string of MRAM cells, and to one end of the second string of MRAM cells.

摘要翻译： 公开了一种读取存储器件的存储器件和方法。 存储器件包括MRAM单元的第一串和MRAM单元的第二串。 MRAM单元的第一串包括串联连接的多个MRAM单元，并且第二串MRAM单元包括串联连接的另外多个MRAM单元。 公共连接可控地连接到MRAM单元的第一串的一端，并连接到第二串MRAM单元的一端。

公开(公告)号：US06671778B2

公开(公告)日：2003-12-30

申请号：US09922436

申请日：2001-08-03

申请人： Steven Louis Naberhuis ,  Kenneth J. Eldredge

发明人： Steven Louis Naberhuis ,  Kenneth J. Eldredge

IPC分类号： G06F1200

CPC分类号： G06F3/0655 ,  G06F3/0625 ,  G06F3/0689 ,  G06F11/1076 ,  G06F2211/1042 ,  G11B9/10 ,  Y02D10/154

摘要： A redundant array of independent storage devices is disclosed herein. The redundant storage device includes one or more atomic resolution storage devices and a control system. The atomic resolution storage device is configured to communicate with the control system as a redundant array of independent storage devices. Each atomic resolution storage device is a non-volatile memory component including a plurality of electron emitters, a medium having medium partitions, and a plurality of micromovers wherein each micromover is independently operable to move a medium partition relative to one or more electron emitters for redundant reading and writing of data at the media.

摘要翻译： 本文公开了独立存储设备的冗余阵列。 冗余存储设备包括一个或多个原子分辨率存储设备和控制系统。 原子分辨率存储装置被配置为作为独立存储装置的冗余阵列与控制系统进行通信。 每个原子分辨率存储装置是包括多个电子发射器，具有介质分隔器的介质和多个小型的非易失性存储器组件，其中每个微型单元可独立地可操作以相对于一个或多个电子发射器移动介质分区用于冗余 在媒体上阅读和写入数据。

公开(公告)号：US06590850B2

公开(公告)日：2003-07-08

申请号：US09800561

申请日：2001-03-07

申请人： Kenneth J. Eldredge ,  Winston C. Mitchell ,  Steven L. Naberhuis ,  Chung Ching Yang

发明人： Kenneth J. Eldredge ,  Winston C. Mitchell ,  Steven L. Naberhuis ,  Chung Ching Yang

IPC分类号： G11B700

CPC分类号： B82Y10/00 ,  G11B9/10 ,  G11B9/1418 ,  G11B11/08 ,  G11B19/20 ,  G11B25/04

摘要： An information storage unit functioning in a vacuum is provided wherein a data storage medium has an information storage area for storing and reading information thereon. An array of electron beam emitters is spaced from and in close proximity to the data storage medium for selectively directing a plurality of electron beams toward the data storage medium. Focusing optics between the array of electron beam emitters and the data storage medium focus each of the electron beams on one part of the information storage area of the data storage medium. A micro electromechanical motor associated with the data storage medium moves the data storage medium relative to the array of electron beam emitters, so that each of the emitters directs an electron beam selectively to a portion of the information storage area to read or write information therein. Electronic circuitry spaced from and in electronic communication with the array of electron beam emitters controls the operations of the array of electron beam emitters. A vacuum device in the information storage unit maintains the vacuum between the data storage medium and the array of electron beam emitters.

公开(公告)号：US06317376B1

公开(公告)日：2001-11-13

申请号：US09598671

申请日：2000-06-20

申请人： Lung T. Tran ,  Kenneth J. Eldredge

发明人： Lung T. Tran ,  Kenneth J. Eldredge

IPC分类号： G11C702

CPC分类号： G11C11/16 ,  G11C7/14 ,  G11C27/02

摘要： A Magnetic Random Access Memory (“MRAM”) device includes an array of memory cells. The device generates reference signals that can be used to determine the resistance states of each memory cell in the array, despite variations in resistance due to manufacturing tolerances and other factors such as temperature gradients across the array, electromagnetic interference and aging.

摘要翻译： 磁性随机存取存储器（“MRAM”）装置包括一组存储单元。 该器件产生可用于确定阵列中每个存储单元的电阻状态的参考信号，尽管由于制造公差和其他因素（例如阵列上的温度梯度，电磁干扰和衰老）导致的电阻变化。