Semiconductor apparatus
    1.
    发明授权
    Semiconductor apparatus 有权
    半导体装置

    公开(公告)号:US08836370B2

    公开(公告)日:2014-09-16

    申请号:US13611298

    申请日:2012-09-12

    IPC分类号: H03K19/0175

    摘要: A semiconductor apparatus includes a power supply changing unit. The power supply changing unit is configured to receive an enable signal and power supply voltage, generate first voltage or second voltage according to the enable signal, change a voltage level of the second voltage according to a level signal, and supply the first voltage or the second voltage as a driving voltage of an internal circuit, wherein the internal circuit receives a first input signal to output a second input signal.

    摘要翻译: 一种半导体装置,包括电源改变单元。 电源改变单元被配置为接收使能信号和电源电压,根据使能信号产生第一电压或第二电压,根据电平信号改变第二电压的电压电平,并且提供第一电压或 第二电压作为内部电路的驱动电压,其中内部电路接收第一输入信号以输出第二输入信号。

    Internal control signal regulation circuit
    2.
    发明授权
    Internal control signal regulation circuit 有权
    内部控制信号调节电路

    公开(公告)号:US09201415B2

    公开(公告)日:2015-12-01

    申请号:US13341682

    申请日:2011-12-30

    IPC分类号: H03K19/00 G05B19/042

    摘要: An internal control signal regulation circuit includes a programming test unit configured to detect an internal control signal in response to an external control signal and generate a selection signal, test codes and a programming enable signal; and a code processing unit configured to receive the test codes or programming codes in response to the selection signal and regulate the internal control signal.

    摘要翻译: 内部控制信号调节电路包括:编程测试单元,被配置为响应于外部控制信号检测内部控制信号,并产生选择信号,测试代码和编程使能信号; 以及代码处理单元,被配置为响应于所述选择信号接收所述测试代码或编程代码并调节所述内部控制信号。

    On die termination circuit
    4.
    发明授权
    On die termination circuit 有权
    在芯片终端电路上

    公开(公告)号:US07208973B2

    公开(公告)日:2007-04-24

    申请号:US11008043

    申请日:2004-12-09

    申请人: Dae Han Kwon

    发明人: Dae Han Kwon

    IPC分类号: H03K17/16 H03K5/12 H03K19/094

    CPC分类号: H04L25/0278

    摘要: The present invention discloses an on die termination circuit. The on die termination circuit used in a DDR2 employs transmission gates as pull-up and pull-down switches, equalizes pull-up and pull-down resistance values by changing connection relations between switches and resistors, and maintains a constant voltage of an input pin.

    摘要翻译: 本发明公开了一种片上终端电路。 DDR2中使用的裸片终端电路使用传输门作为上拉和下拉开关,通过改变开关和电阻之间的连接关系来平衡上拉和下拉电阻值,并保持输入引脚的恒定电压 。

    DATA OUTPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF CONTROLLING THE SAME
    5.
    发明申请
    DATA OUTPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF CONTROLLING THE SAME 有权
    半导体存储器装置的数据输出电路及其控制方法

    公开(公告)号:US20090180338A1

    公开(公告)日:2009-07-16

    申请号:US12400956

    申请日:2009-03-10

    申请人: Dae Han Kwon

    发明人: Dae Han Kwon

    IPC分类号: G11C7/00 G11C8/00

    摘要: The data output circuit for a semiconductor memory apparatus includes a first control signal generating unit configured to generate a first control signal according to a row address and a read command; and a data selecting unit configured to select data from a data line corresponding to a presently selected unit data output mode among data lines according to the first control signal or a second control signal, and output the data.

    摘要翻译: 半导体存储装置的数据输出电路包括:第一控制信号生成部,其根据行地址和读取命令生成第一控制信号; 以及数据选择单元,被配置为根据第一控制信号或第二控制信号从数据线中的与当前选择的单位数据输出模式相对应的数据线选择数据,并输出数据。

    Output driver and semiconductor apparatus having the same
    6.
    发明授权
    Output driver and semiconductor apparatus having the same 有权
    输出驱动器和具有相同的半导体装置

    公开(公告)号:US08471602B2

    公开(公告)日:2013-06-25

    申请号:US12983164

    申请日:2010-12-31

    IPC分类号: H03B1/00 H03K3/00

    CPC分类号: H03K19/018528

    摘要: An output driver includes: a pull-up signal generation unit configured to control a pulse width of first data and output a pull-up pre-drive signal; a pull-down signal generation unit configured to control a pulse width of second data and output a pull-down pre-drive signal; a pull-up pre-driver unit configured to receive the pull-up pre-drive signal and generate a pull-up main drive signal; a pull-down pre-driver unit configured to receive the pull-down pre-drive signal and generate a pull-down main drive signal; a pull-up main driver unit configured to charge an output node according to the pull-up main drive signal; and a pull-down main driver unit configured to discharge the output node according to the pull-down main drive signal.

    摘要翻译: 输出驱动器包括:上拉信号生成单元,被配置为控制第一数据的脉冲宽度并输出上拉预驱动信号; 下拉信号生成单元,被配置为控制第二数据的脉冲宽度并输出下拉预驱动信号; 上拉预驱动器单元,被配置为接收所述上拉预驱动信号并产生上拉主驱动信号; 配置成接收下拉预驱动信号并产生下拉主驱动信号的下拉预驱动器单元; 上拉主驱动器单元,被配置为根据上拉主驱动信号对输出节点进行充电; 以及配置成根据下拉主驱动信号对输出节点进行放电的下拉主驱动器单元。

    Semiconductor device with reduced power consumption that selectively drives one of a plurality of signal receivers according to level of external supply voltage
    7.
    发明授权
    Semiconductor device with reduced power consumption that selectively drives one of a plurality of signal receivers according to level of external supply voltage 有权
    具有降低功耗的半导体器件,其根据外部电源电压的等级选择性地驱动多个信号接收器中的一个

    公开(公告)号:US07512823B2

    公开(公告)日:2009-03-31

    申请号:US11109270

    申请日:2005-04-19

    申请人: Dae Han Kwon

    发明人: Dae Han Kwon

    IPC分类号: G06F1/26

    CPC分类号: G11C5/147

    摘要: Disclosed is a semiconductor device capable of detecting levels of an external supply voltage, which includes a plurality of signal receivers for simultaneously receiving external input signals, wherein a driving voltage is applied to only one of the signal receivers according to the levels of the external supply voltage.

    摘要翻译: 公开了能够检测外部电源电压的水平的半导体器件,其包括用于同时接收外部输入信号的多个信号接收器,其中驱动电压仅根据外部电源的电平被施加到信号接收器中的一个 电压。

    Data output circuit of semiconductor memory apparatus and method of controlling the same
    8.
    发明申请
    Data output circuit of semiconductor memory apparatus and method of controlling the same 有权
    半导体存储装置的数据输出电路及其控制方法

    公开(公告)号:US20070237019A1

    公开(公告)日:2007-10-11

    申请号:US11646351

    申请日:2006-12-28

    申请人: Dae Han Kwon

    发明人: Dae Han Kwon

    IPC分类号: G11C8/00

    摘要: The data output circuit for a semiconductor memory apparatus includes a plurality of pads in which a range of use is determined such that the respective pads are used exclusively in each of at least two kinds of unit data output modes or used commonly in all of the at least two kinds of unit data output modes, a plurality of data lines that transmit data from a plurality of memory banks to the outside of the memory banks, and a data output control unit that outputs data from a data line among the plurality of data lines, according to at least one control signal, to a signal line corresponding to a pad used in a currently set unit data output mode among the plurality of pads.

    摘要翻译: 用于半导体存储装置的数据输出电路包括多个焊盘,其中确定使用范围使得各个焊盘仅用于至少两种单元数据输出模式中的每一种,或者通常用于所有的 至少两种单位数据输出模式,将数据从多个存储体传输到存储体的外部的多条数据线;以及数据输出控制单元,其从多条数据线中的数据线输出数据 根据至少一个控制信号,对应于在多个焊盘中当前设置的单位数据输出模式中使用的焊盘的信号线。

    Semiconductor device with reduced power consumption
    9.
    发明申请
    Semiconductor device with reduced power consumption 有权
    具有降低功耗的半导体器件

    公开(公告)号:US20060139984A1

    公开(公告)日:2006-06-29

    申请号:US11109270

    申请日:2005-04-19

    申请人: Dae Han Kwon

    发明人: Dae Han Kwon

    IPC分类号: G11C5/00

    CPC分类号: G11C5/147

    摘要: Disclosed is a semiconductor device capable of detecting levels of an external supply voltage, which includes a plurality of signal receivers for simultaneously receiving external input signals, wherein a driving voltage is applied to only one of the signal receivers according to the levels of the external supply voltage.

    摘要翻译: 公开了能够检测外部电源电压的水平的半导体器件,其包括用于同时接收外部输入信号的多个信号接收器,其中驱动电压仅根据外部电源的电平施加到信号接收器中的一个 电压。

    Semiconductor memory apparatus
    10.
    发明授权
    Semiconductor memory apparatus 有权
    半导体存储装置

    公开(公告)号:US08804412B2

    公开(公告)日:2014-08-12

    申请号:US13340755

    申请日:2011-12-30

    IPC分类号: G11C11/00

    摘要: A semiconductor memory apparatus includes a resistive memory cell; a data sensing unit configured to sense an output voltage, formed by a sensing current supplied to the resistive memory cell, based on a reference voltage, and output data having a value corresponding to the sensing result; and a reference voltage generation unit comprising a dummy memory cell including first and second resistors having first and second resistance values, respectively, and configured to output a voltage formed by the sensing current supplied to the dummy memory cell as the reference voltage.

    摘要翻译: 半导体存储装置包括电阻式存储单元; 数据感测单元,被配置为基于参考电压感测由提供给所述电阻性存储单元的感测电流形成的输出电压,以及输出具有与所述感测结果对应的值的数据; 以及参考电压产生单元,包括分别包括具有第一和第二电阻值的第一和第二电阻器的虚拟存储单元,并且被配置为输出由提供给虚拟存储单元的感测电流形成的电压作为参考电压。