公开(公告)号：US07138034B2

公开(公告)日：2006-11-21

申请号：US10176804

申请日：2002-06-21

申请人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji ,  Shoji Sakemi ,  Taiji Matano ,  Nobuhiro Satou

发明人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji ,  Shoji Sakemi ,  Taiji Matano ,  Nobuhiro Satou

IPC分类号： H01L21/00

CPC分类号： C23C16/45568 ,  H01J37/32009 ,  H01J37/3244 ,  H01J37/32532 ,  H01L21/3065

摘要： In a plasma treating apparatus, a ceramic porous substance having a three-dimensional network structure in which a frame portion formed of ceramic containing alumina is provided continuously like a three-dimensional network is used for the material of an electrode member for the plasma treating apparatus to be attached to the front surface of a gas supplying port of an electrode for plasma generation, and a gas for plasma generation is caused to pass through a hole portion formed irregularly in the three-dimensional network structure. Consequently, the distribution of the gas to be supplied is made uniform to prevent an abnormal discharge so that uniform etching having no variation can be carried out.

摘要翻译： 在等离子体处理装置中，使用具有三维网状结构的陶瓷多孔物质，其中由含有氧化铝的陶瓷形成的框架部分连续地设置为三维网络，用于等离子体处理装置的电极部件的材料 附着于等离子体产生用电极的气体供给口的前表面，使等离子体产生用气体通过三维网络结构中不规则形成的孔部。 因此，供给气体的分布均匀，以防止异常放电，从而可以进行不变化的均匀蚀刻。

公开(公告)号：US20050279459A1

公开(公告)日：2005-12-22

申请号：US11147882

申请日：2005-06-08

申请人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Junichi Terayama

发明人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Junichi Terayama

IPC分类号： H01L21/3065 ,  H01L21/683 ,  C23F1/00

CPC分类号： H01J37/32082 ,  H01J2237/20 ,  H01L21/3065 ,  H01L21/6833

摘要： In a plasma treating apparatus for carrying out a plasma treatment over a silicon wafer 6 having a protective tape 6a stuck to a circuit formation face, the silicon wafer 6 is mounted on a mounting surface 3d which is provided on an upper surface of a lower electrode 3 formed of a conductive metal with the protective tape 6a turned toward the mounting surface 3d. When a DC voltage is to be applied to the lower electrode 3 by a DC power portion 18 for electrostatic adsorption to adsorb and hold the silicon wafer 6 onto the lower electrode 3 in the plasma treatment, the protective tape 6a is utilized as a dielectric for the electrostatic adsorption. Consequently, the dielectric can be thinned as much as possible and the silicon wafer 6 can be held by a sufficient electrostatic holding force.

公开(公告)号：US20100048001A1

公开(公告)日：2010-02-25

申请号：US12523191

申请日：2008-11-12

申请人： Atsushi Harikai ,  Kiyoshi Arita ,  Tetsuhiro Iwai

发明人： Atsushi Harikai ,  Kiyoshi Arita ,  Tetsuhiro Iwai

IPC分类号： H01L21/302 ,  H01L21/3065

CPC分类号： H01L21/67069 ,  H01J37/32743 ,  H01J37/32788 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/78

摘要： A plasma dicing apparatus in which a semiconductor wafer with a protective sheet stuck thereonto covering the entire circuit-forming surface and with an etching-resistant mask member stuck on the back surface opposite to the circuit-forming surface is mounted on a mounting stage; plasma etching is performed using the mask member as a mask; and the semiconductor wafer is diced into plural semiconductor chips. The plasma dicing apparatus includes a ring-shaped frame member retaining the outer circumference of the mask member extending off the outer circumference of the semiconductor wafer. The mounting stage is composed of a wafer supporting part supporting a semiconductor wafer and a frame member supporting part supporting the frame member. This facilitates carrying a semiconductor wafer into and out of the vacuum chamber.

摘要翻译： 一种等离子体切割装置，其中具有粘附在其上以覆盖整个电路形成表面的保护片的半导体晶片和粘附在与电路形成表面相对的背面上的耐蚀刻掩模构件安装在安装台上; 使用掩模构件作为掩模进行等离子体蚀刻; 将半导体晶片切割成多个半导体芯片。 等离子体切割装置包括保持从半导体晶片的外周延伸的掩模构件的外周的环形框架构件。 安装台由支撑半导体晶片的晶片支撑部件和支撑框架部件的框架部件支撑部件构成。 这有助于将半导体晶片进入和离开真空室。

公开(公告)号：US07074720B2

公开(公告)日：2006-07-11

申请号：US10178444

申请日：2002-06-21

申请人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji ,  Shoji Sakemi

发明人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji ,  Shoji Sakemi

IPC分类号： H01L21/302 ,  H01L21/3065

CPC分类号： H01L21/6835 ,  H01J37/3244 ,  H01J37/32532 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/67092 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

摘要： In a plasma treating apparatus, a ceramic porous substance having a three-dimensional network structure in which a frame portion 18a formed of ceramic containing alumina is provided continuously like a three-dimensional network is used for the material of an electrode member 17 for the plasma treating apparatus to be attached to the front surface of a gas supplying port of an electrode for plasma generation, and a gas for plasma generation is caused to pass through a hole portion 18b formed irregularly in the three-dimensional network structure. Consequently, the distribution of the gas to be supplied is made uniform to prevent an abnormal discharge so that uniform etching having no variation can be carried out.

摘要翻译： 在等离子体处理装置中，将具有三维网状结构的陶瓷多孔物质用于电极部件17的材料，其中三维网状结构的三维网状连续地设置有由含有氧化铝的陶瓷构成的框架部分18a， 等离子体产生用电极的气体供给口的前表面的等离子体处理装置和等离子体产生用气体通过三维网状结构中不规则形成的孔部18b。 因此，供给气体的分布均匀，以防止异常放电，从而可以进行不变化的均匀蚀刻。

公开(公告)号：US07056831B2

公开(公告)日：2006-06-06

申请号：US10621497

申请日：2003-07-17

申请人： Tetsuhiro Iwai ,  Kiyoshi Arita

发明人： Tetsuhiro Iwai ,  Kiyoshi Arita

IPC分类号： H01L21/302

CPC分类号： H01L21/67109 ,  H01J37/20 ,  H01J37/32431 ,  H01L21/67069 ,  H01L21/6831

摘要： In a plasma processing apparatus for plasma-processing a silicon wafer 6 to which a protective film 6a is stuck in a state that the silicon wafer 6 is held by a first electrode 3 by electrostatic absorption and is being cooled, the top surface 3g of the first electrode 3 consists of a top surface central area A that is inside a boundary line P2 that is distant inward by a prescribed length from the outer periphery P1 of the silicon wafer 6 and in which the conductor is exposed, and a ring-shaped top surface peripheral area B that surrounds the top surface central area A and in which the conductor is covered with an insulating coating 3f. This structure makes it possible to hold the silicon wafer 6 by sufficient electrostatic holding force by bringing the silicon wafer 6 into direct contact with the conductor and to increase the cooling efficiency by virtue of heat conduction from the silicon wafer 6 to the first electrode 3.

摘要翻译： 在等离子体处理装置中，通过静电吸收并被冷却，在硅晶片6被第一电极3保持的状态下等待处理保护膜6a的硅晶片6被粘贴，顶表面3g 第一电极3由从硅晶片6的外周部P 1向内侧延伸规定长度并且导体露出的边界线P 2内的顶面中心区域A构成， 围绕顶表面中心区域A的环形顶表面周边区域B，其中导体被绝缘涂层3f覆盖。 这种结构使得可以通过使硅晶片6与导体直接接触而通过足够的静电保持力来保持硅晶片6，并且通过从硅晶片6到第一电极3的热传导来提高冷却效率。

公开(公告)号：US06784112B2

公开(公告)日：2004-08-31

申请号：US10114320

申请日：2002-04-03

申请人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji ,  Shoji Sakemi

发明人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji ,  Shoji Sakemi

IPC分类号： H01L21302

CPC分类号： H01L21/3065

摘要： A surface treatment method for thinning a silicon based substrate obtains a milky-dull color on an overall surface uniformly of the silicon based substrate. To be more specific, a surface opposite to a circuit-formed surface is mechanically polished, then the surface is etched using inert gas such as argon gas for producing plasma. This etching forms micro dimples uniformly on the surface. Next, the surface is further etched using fluorine based gas for producing plasma. This etching obtains a milky-dull color uniformly on the surface. As a result, printed marks on the surface can be read with ease, and pick-up errors in die-bonding can be reduced.

摘要翻译： 用于使硅基衬底变薄的表面处理方法在硅基衬底的整个表面上均匀地获得乳白色的颜色。 更具体地说，与电路形成表面相对的表面被机械抛光，然后使用诸如氩气的惰性气体蚀刻表面，以产生等离子体。 该蚀刻在表面上均匀地形成微凹坑。 接下来，使用氟基气体进一步蚀刻表面以产生等离子体。 该蚀刻在表面上均匀地获得乳白色的颜色。 结果，可以容易地读取表面上的印刷标记，并且可以降低芯片接合中的拾取误差。

公开(公告)号：US20050247404A1

公开(公告)日：2005-11-10

申请号：US11147925

申请日：2005-06-08

申请人： Tetsuhiro Iwai ,  Kiyoshi Arita

发明人： Tetsuhiro Iwai ,  Kiyoshi Arita

IPC分类号： H05H1/46 ,  H01J37/20 ,  H01J37/32 ,  H01L21/00 ,  H01L21/3065 ,  H01L21/683 ,  C23F1/00

CPC分类号： H01L21/67109 ,  H01J37/20 ,  H01J37/32431 ,  H01L21/67069 ,  H01L21/6831

摘要： In a plasma processing apparatus for plasma-processing a silicon wafer 6 to which a protective film 6a is stuck in a state that the silicon wafer 6 is held by a first electrode 3 by electrostatic absorption and is being cooled, the top surface 3g of the first electrode 3 consists of a top surface central area A that is inside a boundary line P2 that is distant inward by a prescribed length from the outer periphery P1 of the silicon wafer 6 and in which the conductor is exposed, and a ring-shaped top surface peripheral area B that surrounds the top surface central area A and in which the conductor is covered with an insulating coating 3f. This structure makes it possible to hold the silicon wafer 6 by sufficient electrostatic holding force by bringing the silicon wafer 6 into direct contact with the conductor and to increase the cooling efficiency by virtue of heat conduction from the silicon wafer 6 to the first electrode 3.

摘要翻译： 在等离子体处理装置中，通过静电吸收并被冷却，在硅晶片6被第一电极3保持的状态下等待处理保护膜6a的硅晶片6被粘贴，顶表面3g 第一电极3由从硅晶片6的外周部P 1向内侧延伸规定长度并且导体露出的边界线P 2内的顶面中心区域A构成， 围绕顶表面中心区域A的环形顶表面周边区域B，其中导体被绝缘涂层3f覆盖。 这种结构使得可以通过使硅晶片6与导体直接接触而通过足够的静电保持力来保持硅晶片6，并且通过从硅晶片6到第一电极3的热传导来提高冷却效率。

公开(公告)号：US06867146B2

公开(公告)日：2005-03-15

申请号：US10085128

申请日：2002-03-01

申请人： Kiyoshi Arita ,  Tetsuhiro Iwai

发明人： Kiyoshi Arita ,  Tetsuhiro Iwai

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/461

CPC分类号： H01L21/3065

摘要： A method of plasma-processing a silicon-based substrate provides a mirror-like etched surface of the substrate. A silicon wafer having a protective tape affixed to a circuit-formed side of the wafer is mounted on a mounting unit disposed within a process chamber of a plasma processing apparatus while the protective tape contacts on the mounting unit. The surface of the silicon wafer is kept at a temperature of 40° C. or above when the surface of the substrate is etched by plasma generated by plasma discharge in plasma-generating gas including fluorine-containing gas fed into the process chamber. This suppressing adhesion and accumulation of a reaction product of the fluorine-containing gas with respect to the surface to be etched, and consequently, provides the surface with uniform etching.

摘要翻译： 等离子体处理硅基衬底的方法提供了衬底的镜面蚀刻表面。 具有固定到晶片的电路形成侧的保护带的硅晶片安装在设置在等离子体处理设备的处理室内的安装单元上，同时保护带与安装单元接触。 当通过等离子体发生气体中的等离子体放电产生的等离子体产生气体（其中包括供给到处理室中的含氟气体）蚀刻基板的表面时，硅晶片的表面保持在40℃或更高的温度。 这抑制了含氟气体相对于待蚀刻表面的反应产物的粘附和积累，从而为表面提供均匀的蚀刻。

公开(公告)号：US06511895B2

公开(公告)日：2003-01-28

申请号：US09791766

申请日：2001-02-26

申请人： Yutaka Koma ,  Kiyoshi Arita ,  Hiroshi Haji ,  Tetsuhiro Iwai

发明人： Yutaka Koma ,  Kiyoshi Arita ,  Hiroshi Haji ,  Tetsuhiro Iwai

IPC分类号： H01L2130

CPC分类号： H01L21/67748 ,  H01L21/02013 ,  H01L21/67778 ,  H01L21/6838 ,  Y10S438/928 ,  Y10S438/976 ,  Y10S438/977

摘要： A semiconductor wafer processing apparatus grinds a surface of a semiconductor wafer by mechanical grinding, and then removes a damaged layer in the ground surface. In the processing apparatus, a grinding portion, a precenter portion, a wafer cleaning portion, plasma treatment portions, and magazines are arranged radially about an origin of a polar coordinate system of a third wafer transport portion having a robot mechanism, and their positions of arrangement are set such that the origin is located on lines of extension of wafer carry-in and carry-out center lines of the plasma treatment portions. Thus, the number of changed grippings of the semiconductor wafer can be minimized to prevent breakage of the semiconductor wafer. Moreover, transfer of the semiconductor wafer between the respective portions can be covered by the single robot mechanism, and the equipment can be made compact.

摘要翻译： 半导体晶片处理装置通过机械研磨研磨半导体晶片的表面，然后去除地表中的损伤层。 在处理装置中，磨削部分，中心部分，晶片清洁部分，等离子体处理部分和杂志围绕具有机器人机构的第三晶片传送部分的极坐标系的原点径向地布置，并且它们的位置 排列被设置为使得原点位于等离子体处理部分的晶片携带和移出中心线的延伸线上。 因此，可以使半导体晶片的改变的抓地力的数量最小化，以防止半导体晶片的破损。 此外，各部分之间的半导体晶片的传送可以被单个机器人机构覆盖，并且可以使设备紧凑。

公开(公告)号：US06340639B1

公开(公告)日：2002-01-22

申请号：US09694669

申请日：2000-10-24

申请人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji

发明人： Kiyoshi Arita ,  Tetsuhiro Iwai ,  Hiroshi Haji

IPC分类号： H01L21302

CPC分类号： H01J37/32009 ,  H01J37/32724

摘要： A plasma process apparatus performing an even plasma processing over the entire surface of a substrate, without accompanying thermal damage, and method of the plasma processing. In a process room 2, where a semiconductor wafer 4 is placed on a lower electrode 3 for processing with plasma, the semiconductor wafer 4 which has been fixed on a resin sheet 4a whose thermal expansion coefficient is greater than that of the semiconductor wafer 4 is pressed at the circumference edge by a substrate holding device 5 onto the surface of lower electrode 3. In such a setup, central portion of the semiconductor wafer can also be pressed onto the lower electrode 3 via the resin sheet 4a. Thus, there will be no gap between the surface of lower electrode 3 and the substrate, which contributes to eliminate thermal damages due to abnormally high temperature and to avoid a local discharge.

摘要翻译： 等离子体处理装置，在基板的整个表面上执行均匀的等离子体处理，而不伴随热损伤，以及等离子体处理的方法。 在半导体晶片4放置在用于等离子体处理的下电极3上的处理室2中，固定在热膨胀系数大于半导体晶片4的树脂片4a的树脂片4a上的半导体晶片4是 在基板保持装置5的周缘处将其压在下电极3的表面上。在这样的设置中，半导体晶片的中心部分也可以通过树脂片4a压在下电极3上。 因此，下电极3的表面与基板之间不会有间隙，这有助于消除由于异常高温引起的热损伤并避免局部放电。