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    Semiconductor device and method of manufacturing the same
    2.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06800909B2

    公开(公告)日：2004-10-05

    申请号：US10261695

    申请日：2002-10-02

    申请人： Koichi Sugiyama ,  Yoshihiro Takao ,  Shinji Sugatani ,  Daisuke Matsunaga ,  Takayuki Wada ,  Tohru Fujita ,  Hikaru Kokura

    发明人： Koichi Sugiyama ,  Yoshihiro Takao ,  Shinji Sugatani ,  Daisuke Matsunaga ,  Takayuki Wada ,  Tohru Fujita ,  Hikaru Kokura

    IPC分类号： H01L2120

    CPC分类号： H01L29/665 ,  H01L21/26586 ,  H01L21/76897 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823468 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/1083 ,  H01L29/6656 ,  Y10S257/90

    摘要： There are provided a gate electrode formed on a semiconductor substrate of one conductivity type via a gate insulating film, ion-implantation controlling films formed on both side surfaces of the gate electrode and having a space between the gate electrode and an upper surface of the semiconductor substrate, first and second impurity diffusion regions of opposite conductivity type formed in the semiconductor substrate on both sides of the gate electrode and serving as source/drain, a channel region of one conductivity type formed below the gate electrode between the first and second impurity diffusion regions of opposite conductivity type, and pocket regions of one conductivity type connected to end portions of the impurity diffusion regions of opposite conductivity type in the semiconductor substrate below the gate electrode and having an impurity concentration of one conductivity type higher than the channel region.

    摘要翻译： 提供了通过栅极绝缘膜形成在一种导电类型的半导体衬底上的栅电极，形成在栅电极的两个侧表面上并且在栅电极和半导体的上表面之间具有间隔的离子注入控制膜 衬底，相反导电类型的第一和第二杂质扩散区形成在栅电极两侧的半导体衬底中并且用作源极/漏极，形成在第一和第二杂质扩散之间的栅电极下面的一种导电类型的沟道区 具有相反导电类型的区域和一个导电类型的袋区域连接到在栅极电极下方的半导体衬底中的相反导电类型的杂质扩散区域的端部，并且具有比沟道区域高的一种导电类型的杂质浓度。

    Display apparatus
    3.
    发明授权
    Display apparatus 有权
    显示装置

    公开(公告)号：US09099042B2

    公开(公告)日：2015-08-04

    申请号：US13697775

    申请日：2011-04-13

    申请人： Koichi Sugiyama ,  Taikoh Akashi

    发明人： Koichi Sugiyama ,  Taikoh Akashi

    IPC分类号： G09G5/02 ,  G09G3/34 ,  G09G3/36

    CPC分类号： G09G3/3406 ,  G09G3/3611 ,  G09G2300/0456 ,  G09G2320/0626 ,  G09G2320/0666 ,  G09G2360/144 ,  G09G2360/145

    摘要： A high luminance display apparatus is provided. When a spectral radiance of a backlight at a time point of factory shipment is less than a spectral radiance of external light, a CPU generates a correction matrix for performing color correction so that color produced by external light, i.e., color produced by reflection light of external light by a half mirror conforms to color produced by only irradiation light of the backlight, transmits the generated correction matrix to a video image signal processing section as parameter information, and causes execution of color correction based on the parameter information. The CPU generates a correction matrix based on a spectral radiance of external light detected by a second spectral radiance sensor, a spectral radiance of the backlight detected at the time point of factory shipment, and spectral transmittance of a color filter as well as a color-matching function.

    摘要翻译： 提供了一种高亮度显示装置。 当出厂时的时间点的背光源的光谱辐射度小于外部光的光谱时，CPU产生用于进行色彩校正的校正矩阵，使得由外部光产生的颜色，即由反射光产生的颜色 通过半反射镜的外部光符合仅由背光的照射光产生的颜色，将生成的校正矩阵作为参数信息发送到视频图像信号处理部，并且基于参数信息执行颜色校正。 CPU基于由第二光谱辐射传感器检测到的外部光的光谱辐射率，在出厂时发现的时间点检测的背光的光谱，以及滤色器的分光透射率， 匹配功能。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08319314B2

    公开(公告)日：2012-11-27

    申请号：US13005589

    申请日：2011-01-13

    申请人： Tsuneo Ogura ,  Masakazu Yamaguchi ,  Tomoki Inoue ,  Hideaki Ninomiya ,  Koichi Sugiyama

    发明人： Tsuneo Ogura ,  Masakazu Yamaguchi ,  Tomoki Inoue ,  Hideaki Ninomiya ,  Koichi Sugiyama

    IPC分类号： H01L29/739 ,  H01L27/082 ,  H01L29/00 ,  H01L21/02

    CPC分类号： H01L29/1095 ,  H01L29/0834 ,  H01L29/7397

    摘要： A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and the second base layers.

    摘要翻译： 半导体器件包括第一导电类型的第一基极层; 多个第二导电类型的第二基层，设置在所述第一基底层的第一表面的一部分上; 沟槽形成在第二基底层的每一侧上，并且形成为比第二基底层更深; 在所述第二基底层的表面上沿着所述沟槽形成的发射极层; 设置在与第一表面相对的第一基底层的第二表面上的第二导电类型的集电极层; 形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在所述沟槽内并与所述第二基极层和所述发射极层通过所述绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，空间部分比第二基底层更深，并且与发射极层和第二基底层电隔离。

    Display device, display method, supply device, supply method, storage medium, and control system for controlling the display of information provided from a supply device
    6.
    发明授权
    Display device, display method, supply device, supply method, storage medium, and control system for controlling the display of information provided from a supply device 失效
    显示装置，显示方法，供给装置，供给方法，存储介质以及用于控制从供给装置提供的信息的显示的控制系统

    公开(公告)号：US08208073B2

    公开(公告)日：2012-06-26

    申请号：US12344927

    申请日：2008-12-29

    申请人： Koichi Sugiyama ,  Dai Sato

    发明人： Koichi Sugiyama ,  Dai Sato

    IPC分类号： H04N5/50 ,  H04N9/74 ,  H04N5/268 ,  H04N5/44

    CPC分类号： H04N5/765 ,  H04N5/775

    摘要： A display device includes a display section configured to perform display and provided with a display screen; communicating sections configured to perform communication to receive pieces of content data from supply devices, respectively; and a controller configured to cause the received pieces of content data to be simultaneously displayed on corresponding divided areas of the display screen and to control the communicating sections to transmit, to the supply devices. The notification indicates that the pieces of content data are simultaneously displayed on the corresponding areas.

    摘要翻译： 显示装置包括：显示部，被配置为执行显示并具有显示画面; 通信部分，被配置为执行通信以分别从供应设备接收内容数据; 以及控制器，其被配置为使所接收的内容数据同时显示在所述显示屏幕的相应分割区域上，并且控制所述通信部分向所述供应装置发送。 该通知指示在相应区域上同时显示内容数据。

    DISPLAY DEVICE, DISPLAY METHOD, SUPPLY DEVICE, SUPPLY METHOD, STORAGE MEDIUM, AND CONTROL SYSTEM
    7.
    发明申请
    DISPLAY DEVICE, DISPLAY METHOD, SUPPLY DEVICE, SUPPLY METHOD, STORAGE MEDIUM, AND CONTROL SYSTEM 失效
    显示装置，显示方法，供应装置，供应方法，存储介质和控制系统

    公开(公告)号：US20090201423A1

    公开(公告)日：2009-08-13

    申请号：US12344927

    申请日：2008-12-29

    申请人： Koichi Sugiyama ,  Dai Sato

    发明人： Koichi Sugiyama ,  Dai Sato

    IPC分类号： H04N5/445 ,  H04N5/66 ,  H04N5/44

    CPC分类号： H04N5/765 ,  H04N5/775

    摘要： A display device includes a display section configured to perform display and provided with a display screen; communicating sections configured to perform communication to receive pieces of content data from supply devices, respectively; and a controller configured to cause the received pieces of content data to be simultaneously displayed on corresponding divided areas of the display screen and to control the communicating sections to transmit, to the supply devices. The notification indicates that the pieces of content data are simultaneously displayed on the corresponding areas.

    摘要翻译： 显示装置包括：显示部，被配置为执行显示并具有显示画面; 通信部分，被配置为执行通信以分别从供应设备接收内容数据; 以及控制器，其被配置为使所接收的内容数据同时显示在所述显示屏幕的相应分割区域上，并且控制所述通信部分向所述供应装置发送。 该通知指示在相应区域上同时显示内容数据。

    High-breakdown-voltage semiconductor apparatus
    8.
    再颁专利
    High-breakdown-voltage semiconductor apparatus 有权
    高击穿电压半导体装置

    公开(公告)号：USRE40712E1

    公开(公告)日：2009-05-19

    申请号：US10367939

    申请日：2003-02-19

    申请人： Kazuya Nakayama ,  Koichi Sugiyama

    发明人： Kazuya Nakayama ,  Koichi Sugiyama

    IPC分类号： H01L29/76

    CPC分类号： H01L29/0834 ,  H01L29/32 ,  H01L29/7395

    摘要： A high-breakdown-voltage semiconductor apparatus is provided, wherein when a gate capacitance of that portion of a gate electrode, under which a channel is formed, is Cg[F], a resistance in a channel length direction of that portion of the gate electrode, under which the channel is formed, is Rg [Ω], a threshold voltage, which is to be applied to the gate electrode and application of which permits flow of a drain current, is Vth [V], a voltage to be applied to the gate electrode to cut off the drain current is Voff [V], and a ratio of increase in the drain voltage per unit time at the time of cutting off the drain current is dV/dt [V/s], the following condition is satisfied: |Vth−Voff|≧0.5·Cg·Rg·(dV/dt)

    摘要翻译： 提供一种高击穿电压半导体装置，其中，当栅极电极的形成沟道的部分的栅极电容为Cg [F]时，栅极部分的沟道长度方向的电阻 形成通道的电极为RgΩ，要施加到栅电极的阈值电压，其施加允许漏极电流的流动为Vth [V]，要施加的电压 到栅电极切断漏极电流为Voff [V]，并且在切断漏极电流时每单位时间的漏极电压的增加比为dV / dt [V / s]，以下条件 满足：<？in-line-formula description =“In-line formula”end =“lead”？> | Vth-Voff |> = 0.5.Cg.Rg。（dV / dt）<？in-line-formula description =“In-Line Formulas”end =“tail”？>

    Semiconductor device
    9.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07456487B2

    公开(公告)日：2008-11-25

    申请号：US10974810

    申请日：2004-10-28

    申请人： Tsuneo Ogura ,  Masakazu Yamaguchi ,  Tomoki Inoue ,  Hideaki Ninomiya ,  Koichi Sugiyama

    发明人： Tsuneo Ogura ,  Masakazu Yamaguchi ,  Tomoki Inoue ,  Hideaki Ninomiya ,  Koichi Sugiyama

    IPC分类号： H01L29/739

    CPC分类号： H01L29/1095 ,  H01L29/0834 ,  H01L29/7397

    摘要： This disclosure concerns a semiconductor device that includes a first base layer; second base layers provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers; an emitter layer formed on a surface of the second base layers; a collector layer provided below a second surface of the first base layer, an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being electrically isolated from the emitter layer and the second base layers, wherein the space section includes a semiconductor layer being deeper than the second base layers.

    摘要翻译： 本公开涉及包括第一基底层的半导体器件; 设置在所述第一基底层的第一表面的一部分上的第二基底层; 形成在第二基层的每侧的沟槽; 形成在所述第二基底层的表面上的发射极层; 设置在所述第一基底层的第二表面下方的集电极层，形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在沟槽内并由绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，所述空间部分与发射极层和第二基底层电隔离，其中所述空间部分包括比所述第二基底层更深的半导体层。

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20070278566A1

    公开(公告)日：2007-12-06

    申请号：US11833401

    申请日：2007-08-03

    申请人： Tsuneo Ogura ,  Tomoki Inoue ,  Hideaki Ninomiya ,  Koichi Sugiyama

    发明人： Tsuneo Ogura ,  Tomoki Inoue ,  Hideaki Ninomiya ,  Koichi Sugiyama

    IPC分类号： H01L29/78

    CPC分类号： H01L29/1095 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/7394 ,  H01L29/7397

    摘要： A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.

    摘要翻译： 半导体器件包括第一导电类型的基底层，形成在基底层上的第一导电类型的阻挡层，从阻挡层的表面形成的沟槽到达达到 阻挡层和基底层之间的界面，通过栅极绝缘膜形成在沟槽中的栅极电极，选择性地形成在阻挡层的表面部分中的第二导电类型的接触层，第一导电性的源极层 形成在所述阻挡层的表面部分中以与所述沟槽中的所述接触层和所述栅极绝缘膜的侧壁接触的第一主电极以及与所述接触层和所述源极层接触的第一主电极。