MEMORY ELEMENT AND MEMORY APPARATUS
    1.
    发明申请
    MEMORY ELEMENT AND MEMORY APPARATUS 审中-公开
    记忆元素和记忆装置

    公开(公告)号:US20100061142A1

    公开(公告)日:2010-03-11

    申请号:US12532552

    申请日:2007-11-30

    IPC分类号: G11C11/00

    摘要: Memory elements (3) arranged in matrix in a memory apparatus (21), each includes a resistance variable element (1) which changes an electrical resistance value in response to an applied electrical pulse having a positive polarity or a negative polarity and maintains the changed electrical resistance value, and a current suppressing element (2) for suppressing a current flowing when the electrical pulse is applied to the resistance variable element. The current suppressing element includes a first electrode, a second electrode, and a current suppressing layer provided between the first electrode and the second electrode, and the current suppressing layer comprises SiNx (x: positive actual number).

    摘要翻译: 在存储装置(21)中排列成矩阵的存储元件(3),每个包括电阻变化元件(1),其响应于所施加的具有正极性或负极性的电脉冲改变电阻值,并保持改变 电阻值和电流抑制元件(2),用于抑制当电脉冲施加到电阻可变元件时流动的电流。 电流抑制元件包括第一电极,第二电极和设置在第一电极和第二电极之间的电流抑制层,并且电流抑制层包括SiNx(x:正实数)。

    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF
    2.
    发明申请
    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF 有权
    非易失性存储元件,非易失性存储器件及其制造方法

    公开(公告)号:US20090014710A1

    公开(公告)日:2009-01-15

    申请号:US12281034

    申请日:2007-03-06

    IPC分类号: H01L45/00

    摘要: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

    摘要翻译: 设置下电极层2,形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。 金属氧化物薄膜层3包括第一区域3a,其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小,以及 具有比第一区域3a更大的氧含量,其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF
    3.
    发明申请
    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF 有权
    非易失性存储元件,非易失性存储器件及其制造方法

    公开(公告)号:US20100200852A1

    公开(公告)日:2010-08-12

    申请号:US12709148

    申请日:2010-02-19

    IPC分类号: H01L29/68 H01L21/34

    摘要: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

    摘要翻译: 设置下电极层2,形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。 金属氧化物薄膜层3包括第一区域3a,其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小,以及 具有比第一区域3a更大的氧含量,其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

    Variable resistance element, semiconductor device, and method for manufacturing variable resistance element
    4.
    发明授权
    Variable resistance element, semiconductor device, and method for manufacturing variable resistance element 有权
    可变电阻元件,半导体器件和可变电阻元件的制造方法

    公开(公告)号:US08013711B2

    公开(公告)日:2011-09-06

    申请号:US12280013

    申请日:2007-02-27

    IPC分类号: H01C7/10

    摘要: A method for manufacturing a variable resistance element includes the steps of: depositing a variable resistance material (106) in a contact hole (105), which is formed on an interlayer insulating layer (104) on a substrate and has a lower electrode (103) at a bottom portion thereof, such that an upper surface of the variable resistance material (106) in the contact hole (105) is located lower than an upper surface of the interlayer insulating layer (104); depositing an upper electrode material on the deposited variable resistance material (106) such that an upper surface of the upper electrode material in the contact hole (105) is located higher than the upper surface of the interlayer insulating layer (104); and element-isolating by a CMP the variable resistance element including the variable resistance material (106) and the upper electrode material.

    摘要翻译: 一种制造可变电阻元件的方法包括以下步骤:将可变电阻材料(106)沉积在形成在衬底上的层间绝缘层(104)上的接触孔(105)中,并具有下电极(103) ),使得所述接触孔(105)中的所述可变电阻材料(106)的上表面位于所述层间绝缘层(104)的上表面以下。 在所述沉积的可变电阻材料(106)上沉积上电极材料,使得所述接触孔(105)中的上电极材料的上表面位于比所述层间绝缘层(104)的上表面高; 以及通过CMP对包括可变电阻材料(106)和上电极材料的可变电阻元件进行元件隔离。

    Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof
    5.
    发明授权
    Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof 有权
    非易失性存储元件,非易失性存储装置及其制造方法

    公开(公告)号:US07919774B2

    公开(公告)日:2011-04-05

    申请号:US12709148

    申请日:2010-02-19

    IPC分类号: H01L29/68 H01L21/34

    摘要: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

    摘要翻译: 设置下电极层2,形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。 金属氧化物薄膜层3包括第一区域3a,其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小,以及 具有比第一区域3a更大的氧含量,其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

    VARIABLE RESISTANCE ELEMENT, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING VARIABLE RESISTANCE ELEMENT
    6.
    发明申请
    VARIABLE RESISTANCE ELEMENT, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING VARIABLE RESISTANCE ELEMENT 有权
    可变电阻元件,半导体器件和制造可变电阻元件的方法

    公开(公告)号:US20100225438A1

    公开(公告)日:2010-09-09

    申请号:US12280013

    申请日:2007-02-27

    IPC分类号: H01C7/10 H01C17/06

    摘要: A method for manufacturing a variable resistance element includes the steps of: depositing a variable resistance material (106) in a contact hole (105), which is formed on an interlayer insulating layer (104) on a substrate and has a lower electrode (103) at a bottom portion thereof, such that an upper surface of the variable resistance material (106) in the contact hole (105) is located lower than an upper surface of the interlayer insulating layer (104); depositing an upper electrode material on the deposited variable resistance material (106) such that an upper surface of the upper electrode material in the contact hole (105) is located higher than the upper surface of the interlayer insulating layer (104); and element-isolating by a CMP the variable resistance element including the variable resistance material (106) and the upper electrode material.

    摘要翻译: 一种制造可变电阻元件的方法包括以下步骤:将可变电阻材料(106)沉积在形成在衬底上的层间绝缘层(104)上的接触孔(105)中,并具有下电极(103) ),使得所述接触孔(105)中的所述可变电阻材料(106)的上表面位于所述层间绝缘层(104)的上表面以下。 在所述沉积的可变电阻材料(106)上沉积上电极材料,使得所述接触孔(105)中的上电极材料的上表面位于比所述层间绝缘层(104)的上表面高; 以及通过CMP对包括可变电阻材料(106)和上电极材料的可变电阻元件进行元件隔离。

    Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof
    7.
    发明授权
    Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof 有权
    非易失性存储元件,非易失性存储装置及其制造方法

    公开(公告)号:US07692178B2

    公开(公告)日:2010-04-06

    申请号:US12281034

    申请日:2007-03-06

    IPC分类号: H01L45/00

    摘要: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

    摘要翻译: 设置下电极层2,形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。 金属氧化物薄膜层3包括第一区域3a,其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小,以及 具有比第一区域3a更大的氧含量,其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

    Nonvolatile memory element having a resistance variable layer and manufacturing method thereof
    8.
    发明授权
    Nonvolatile memory element having a resistance variable layer and manufacturing method thereof 有权
    具有电阻变化层的非易失性存储元件及其制造方法

    公开(公告)号:US08471235B2

    公开(公告)日:2013-06-25

    申请号:US13132822

    申请日:2009-12-04

    IPC分类号: H01L29/02

    摘要: A nonvolatile memory element includes a substrate; a lower electrode layer and a resistive layer sequentially formed on the substrate; a resistance variable layer formed on the resistive layer; a wire layer formed above the lower electrode layer; an interlayer insulating layer disposed between the substrate and the wire layer and covering at least the lower electrode layer and the resistive layer, the interlayer insulating layer being provided with a contact hole extending from the wire layer to the resistance variable layer; and an upper electrode layer formed inside the contact hole such that the upper electrode layer is connected to the resistance variable layer and to the wire layer; resistance values of the resistance variable layer changing reversibly in response to electric pulses applied between the lower electrode layer and the upper electrode layer.

    摘要翻译: 非易失性存储元件包括:基板; 在基板上依次形成下电极层和电阻层; 形成在电阻层上的电阻变化层; 形成在所述下电极层的上方的导线层; 层间绝缘层,设置在所述基板和所述线层之间,并且至少覆盖所述下电极层和所述电阻层,所述层间绝缘层设置有从所述导线层延伸到所述电阻变化层的接触孔; 以及形成在所述接触孔内部的上电极层,使得所述上电极层连接到所述电阻变化层和所述导线层; 电阻变化层的电阻值响应于施加在下电极层和上电极层之间的电脉冲而可逆地改变。

    NONVOLATILE MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF
    9.
    发明申请
    NONVOLATILE MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF 有权
    非易失性存储元件及其制造方法

    公开(公告)号:US20110233511A1

    公开(公告)日:2011-09-29

    申请号:US13132822

    申请日:2009-12-04

    IPC分类号: H01L47/00 H01L21/02

    摘要: A nonvolatile memory element (10) of the present invention comprises a substrate (11); a lower electrode layer (15) and a resistive layer (16) sequentially formed on the substrate (11); a resistance variable layer (31) formed on the resistive layer (16); a wire layer (20) formed above the lower electrode layer (15); an interlayer insulating layer (17) disposed between the substrate (11) and the wire layer (20) and covering at least the lower electrode layer (15) and the resistive layer (16), the interlayer insulating layer being provided with a contact hole (26) extending from the wire layer (20) to the resistance variable layer (31); and an upper electrode layer (19) formed inside the contact hole (26) such that the upper electrode layer is connected to the resistance variable layer (31) and to the wire layer (20); resistance values of the resistance variable layer (31) changing reversibly in response to electric pulses applied between the lower electrode layer (15) and the upper electrode layer (19).

    摘要翻译: 本发明的非易失性存储元件(10)包括衬底(11); 依次形成在所述基板(11)上的下电极层(15)和电阻层(16)。 形成在电阻层(16)上的电阻变化层(31); 在所述下电极层(15)的上方形成的导线层(20)。 设置在所述基板(11)和所述导线层(20)之间并且至少覆盖所述下电极层(15)和所述电阻层(16)的层间绝缘层(17),所述层间绝缘层设置有接触孔 (26)从所述导线层(20)延伸到所述电阻变化层(31); 以及形成在所述接触孔(26)内部的上电极层(19),使得所述上电极层连接到所述电阻变化层(31)和所述导线层(20); 电阻变化层(31)的电阻值响应于施加在下电极层(15)和上电极层(19)之间的电脉冲而可逆地变化。

    Variable resistance element and method of manufacturing the same
    10.
    发明授权
    Variable resistance element and method of manufacturing the same 有权
    可变电阻元件及其制造方法

    公开(公告)号:US09006698B2

    公开(公告)日:2015-04-14

    申请号:US13810708

    申请日:2012-01-18

    IPC分类号: H01L47/00 H01L21/20 H01L45/00

    摘要: A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxygen-deficient transition metal oxide, the second electrode has a single needle-shaped part at an interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the single needle-shaped part.

    摘要翻译: 一种可变电阻元件,包括:第一电极; 第二电极; 以及可变电阻层,其具有根据施加的电信号可逆地改变的电阻值,其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层 具有低于第一缺氧过渡金属氧化物缺氧程度的氧缺乏的氧化物,第二电极在与第二可变电阻层的界面处具有单个针状部分,第二可变电阻层 插入在第一可变电阻层和第二电极之间,与第一可变电阻层和第二电极接触,并且覆盖单个针状部分。