Method of refreshing a PCRAM memory device

    公开(公告)号:US20050007852A1

    公开(公告)日:2005-01-13

    申请号:US10614160

    申请日:2003-07-08

    摘要: A method for refreshing PCRAM cells programmed to a low resistance state and entire arrays of PCRAM cells uses a simple refresh scheme which does not require separate control and application of discrete refresh voltages to the PCRAM cells in an array. Specifically, the array structure of a PCRAM device is constructed to allow leakage current to flow through each programmed cell in the array to refresh the programmed state. In one embodiment, the leakage current flows across the access device between the anode of the memory element and the bit line to which the cell is connected, for each memory cell in the array which has been programmed to the low resistance state. In another embodiment, the leakage current flows to the programmed cells through a doped substrate or doped regions of a substrate on which each cell is formed. An entire array is refreshed simultaneously by forming each memory element in the array to have one common anode formed as a single cell plate for the array. Only PCRAM cells in the array written to the low resistance state are refreshed by the controlled leakage current, whereas cells in the high resistance state are not affected by the refresh operation.

    Memory element and its method of formation
    2.
    发明申请
    Memory element and its method of formation 有权
    记忆元素及其形成方法

    公开(公告)号:US20060252176A1

    公开(公告)日:2006-11-09

    申请号:US11480412

    申请日:2006-07-05

    IPC分类号: H01L21/06

    摘要: A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a thin metal containing layer having a thickness of less than about 250 Angstroms over a second chalcogenide glass layer, formed over a first metal containing layer, formed over a first chalcogenide glass layer. The thin metal containing layer preferably is a silver layer. An electrode may be formed over the thin silver layer. The electrode preferably does not contain silver.

    摘要翻译: 本文公开了一种用于控制电阻变量存储元件中硫族化物玻璃的银掺杂的方法。 该方法包括在第一硫族化物玻璃层上形成的厚度小于约250埃的含金属薄层,形成在第一硫族化物玻璃层上形成的第一金属含层上。 含金属薄层优选为银层。 可以在薄银层上方形成电极。 电极优选不含银。

    Method of forming a memory cell
    3.
    发明申请
    Method of forming a memory cell 有权
    形成存储单元的方法

    公开(公告)号:US20060046444A1

    公开(公告)日:2006-03-02

    申请号:US11258921

    申请日:2005-10-27

    摘要: The invention relates to the fabrication of a resistance variable material cell or programmable metallization cell. The processes described herein can form a metal-rich metal chalcogenide, such as, for example, silver-rich silver selenide. Advantageously, the processes can form the metal-rich metal chalcogenide without the use of photodoping techniques and without direct deposition of the metal. For example, the process can remove selenium from silver selenide.

    摘要翻译: 本发明涉及电阻可变材料单元或可编程金属化单元的制造。 本文所述的方法可形成金属富金属硫族化物,例如富银硒化银。 有利的是,该方法可以形成富含金属的金属硫属元素化物,而不需要使用光致激发技术,而不会直接沉积金属。 例如,该过程可以从硒化银中除去硒。

    Method of refreshing a PCRAM memory device
    4.
    发明申请
    Method of refreshing a PCRAM memory device 有权
    刷新PCRAM存储器件的方法

    公开(公告)号:US20050201146A1

    公开(公告)日:2005-09-15

    申请号:US11128177

    申请日:2005-05-13

    摘要: A method for refreshing PCRAM cells programmed to a low resistance state and entire arrays of PCRAM cells uses a simple refresh scheme which does not require separate control and application of discrete refresh voltages to the PCRAM cells in an array. Specifically, the array structure of a PCRAM device is constructed to allow leakage current to flow through each programmed cell in the array to refresh the programmed state. In one embodiment, the leakage current flows across the access device between the anode of the memory element and the bit line to which the cell is connected, for each memory cell in the array which has been programmed to the low resistance state. In another embodiment, the leakage current flows to the programmed cells through a doped substrate or doped regions of a substrate on which each cell is formed. An entire array is refreshed simultaneously by forming each memory element in the array to have one common anode formed as a single cell plate for the array. Only PCRAM cells in the array written to the low resistance state are refreshed by the controlled leakage current, whereas cells in the high resistance state are not affected by the refresh operation.

    摘要翻译: 用于刷新编程为低电阻状态的PCRAM细胞的方法和PCRAM细胞的整个阵列使用简单的刷新方案,其不需要单独控制并且向阵列中的PCRAM细胞施加离散的刷新电压。 具体地,构建PCRAM器件的阵列结构以允许漏电流流过阵列中的每个编程单元以刷新编程状态。 在一个实施例中,针对已经被编程为低电阻状态的阵列中的每个存储器单元,漏电流在存储元件的阳极和单元连接的位线之间流过访问设备。 在另一个实施例中,漏电流通过其上形成有每个单元的衬底的掺杂衬底或掺杂区流动到编程单元。 通过在阵列中形成每个存储元件以使一个共同的阳极形成为阵列的单个单元板,整个阵列同时刷新。 写入低电阻状态的阵列中只有PCRAM单元被控制的漏电流刷新,而高电阻状态下的单元不受刷新操作的影响。

    Resistance variable devices with controllable channels
    6.
    发明申请
    Resistance variable devices with controllable channels 审中-公开
    具有可控通道的电阻变量器件

    公开(公告)号:US20060131555A1

    公开(公告)日:2006-06-22

    申请号:US11018370

    申请日:2004-12-22

    IPC分类号: H01L29/04

    摘要: A memory element having a first electrode is provided, wherein the first electrode comprises at least one conductive nanostructure. The memory element further includes a second electrode and a resistance variable material layer between the first and second electrodes. The first electrode electrically is coupled to the resistance variable material. Methods for forming the memory element are also provided.

    摘要翻译: 提供了具有第一电极的存储元件,其中第一电极包括至少一个导电纳米结构。 存储元件还包括在第一和第二电极之间的第二电极和电阻可变材料层。 第一电极电耦合到电阻可变材料。 还提供了形成存储元件的方法。

    Chalcogenide glass constant current device, and its method of fabrication and operation
    8.
    发明申请
    Chalcogenide glass constant current device, and its method of fabrication and operation 有权
    硫族化物玻璃恒流装置及其制造和操作方法

    公开(公告)号:US20070201255A1

    公开(公告)日:2007-08-30

    申请号:US11653883

    申请日:2007-01-17

    IPC分类号: G11C27/00 H01L47/00

    摘要: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.

    摘要翻译: 本发明涉及用于提供两端恒流装置的方法和装置及其操作。 本发明提供一种恒定电流器件,其在至少约700mV的施加电压范围内保持恒定电流。 本发明还提供了通过施加正电位以减小恒定电流值或施加比现有恒定电流电压上限更负的电压来改变和重置恒定电流装置中的恒定电流值的方法,由此重置 或将其恒定电流水平提高到其原始制造值。 本发明还提供一种将存储器件形成和转换成恒流器件的方法。 本发明还提供一种使用恒流装置作为模拟存储装置的方法。

    Method of forming non-volatile resistance variable devices
    9.
    发明申请
    Method of forming non-volatile resistance variable devices 有权
    形成非易失性电阻变量器件的方法

    公开(公告)号:US20050157573A1

    公开(公告)日:2005-07-21

    申请号:US11085009

    申请日:2005-03-21

    摘要: A method of forming a non-volatile resistance variable device includes forming a first conductive electrode material on a substrate. A metal doped chalcogenide comprising material is formed over the first conductive electrode material. Such comprises the metal and AxBy, where “B” is selected from S, Se and Te and mixtures thereof, and where “A” comprises at least one element which is selected from Group 13, Group 14, Group 15, or Group 17 of the periodic table. In one aspect, the chalcogenide comprising material is exposed to and HNO3 solution. In one aspect the outer surface is oxidized effective to form a layer comprising at least one of an oxide of “A” or an oxide of “B”. In one aspect, a passivating material is formed over the metal doped chalcogenide comprising material. A second conductive electrode material is deposited, and a second conductive electrode material of the device is ultimately formed therefrom.

    摘要翻译: 形成非易失性电阻可变器件的方法包括在衬底上形成第一导电电极材料。 在第一导电电极材料上形成包含材料的掺杂金属的硫族化物。 其中“B”选自S,Se和Te及其混合物,其中“A”包括至少一个元素 其选自周期表的第13组,第14组,第15组或第17组。 在一个方面,包含硫属元素的材料暴露于HNO 3溶液中。 在一个方面,外表面被有效地氧化以形成包含“A”的氧化物或“B”的氧化物中的至少一种的层。 在一个方面,在包含金属的硫族化物的材料上形成钝化材料。 沉积第二导电电极材料,并且最终由器件的第二导电电极材料形成。

    Memory element and its method of formation
    10.
    发明申请
    Memory element and its method of formation 有权
    记忆元素及其形成方法

    公开(公告)号:US20050148150A1

    公开(公告)日:2005-07-07

    申请号:US10988836

    申请日:2004-11-16

    摘要: A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a thin metal containing layer having a thickness of less than about 250 Angstroms over a second chalcogenide glass layer, formed over a first metal containing layer, formed over a first chalcogenide glass layer. The thin metal containing layer preferably is a silver layer. An electrode may be formed over the thin silver layer. The electrode preferably does not contain silver.

    摘要翻译: 本文公开了一种用于控制电阻变量存储元件中硫族化物玻璃的银掺杂的方法。 该方法包括在第一硫族化物玻璃层上形成的厚度小于约250埃的含金属薄层,形成在第一硫族化物玻璃层上形成的第一金属含层上。 含金属薄层优选为银层。 可以在薄银层上方形成电极。 电极优选不含银。