公开(公告)号：US20080204615A1

公开(公告)日：2008-08-28

申请号：US12033188

申请日：2008-02-19

申请人： Kyoung-Ju Shin ,  Jin-Ho Ju ,  Chong-Chul Chai

发明人： Kyoung-Ju Shin ,  Jin-Ho Ju ,  Chong-Chul Chai

IPC分类号： G02F1/1333 ,  G02F1/1368 ,  G02F1/13

CPC分类号： G02F1/136213 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2001/13606

摘要： A liquid crystal display (“LCD”) includes a gate line, a data line intersecting the gate line, a pixel including first and second sub-pixels connected to the gate line and the data line, and a coupling capacitor coupled between the first and the second sub-pixels. The first sub-pixel includes a first liquid crystal (“LC”) capacitor and a first thin film transistor (“TFT”). The second sub-pixel includes a second LC capacitor and a second TFT. The first and second TFTs respectively include a gate electrode, a source electrode, and a drain electrode. The gate electrodes of the first and second TFTs are connected to the gate line, the source electrodes of the first and second TFTs are connected to the data line, and the coupling capacitor includes the sub-pixel electrode of the second sub-pixel and the drain electrode of the second TFT as two terminals.

摘要翻译： 液晶显示器（“LCD”）包括栅极线，与栅极线相交的数据线，包括连接到栅极线和数据线的第一和第二子像素的像素，以及耦合电容器，耦合在第一和 第二个子像素。 第一子像素包括第一液晶（“LC”）电容器和第一薄膜晶体管（“TFT”）。 第二子像素包括第二LC电容器和第二TFT。 第一和第二TFT分别包括栅电极，源电极和漏电极。 第一和第二TFT的栅电极连接到栅极线，第一和第二TFT的源电极连接到数据线，耦合电容器包括第二子像素的子像素电极和 第二TFT的漏电极作为两个端子。

公开(公告)号：US20080001937A1

公开(公告)日：2008-01-03

申请号：US11759515

申请日：2007-06-07

申请人： Kyoung-Ju Shin ,  Jin-Ho Ju ,  Shi-Yul Kim ,  Jang-Soo Kim ,  Chong-Chul Chai ,  Hye-Young Ryu

发明人： Kyoung-Ju Shin ,  Jin-Ho Ju ,  Shi-Yul Kim ,  Jang-Soo Kim ,  Chong-Chul Chai ,  Hye-Young Ryu

IPC分类号： G09G5/00

CPC分类号： G02F1/136227 ,  G02F2001/136222 ,  H01L27/1248

摘要： A display substrate includes a TFT layer, a passivation layer, an organic layer, an inorganic insulating layer and a pixel electrode. The TFT layer includes gate and data lines, a thin film transistor and a storage electrode. The data line crosses the gate line, and is electrically insulated from the gate line by a gate insulating layer. The TFT is electrically connected to the gate and data lines. The passivation layer covers the TFT layer. The organic layer is on the passivation layer. The inorganic insulating layer of a low temperature deposition is on the organic layer, and the low temperature is about 100° C. to about 250° C. The pixel electrode is on the inorganic insulating layer to be electrically connected to the TFT through a contact hole that is formed through the inorganic insulating layer, the organic layer and the passivation layer. The inorganic insulating layer helps to block leakage of impurities from the organic layer to layers above the inorganic insulating layer.

摘要翻译： 显示基板包括TFT层，钝化层，有机层，无机绝缘层和像素电极。 TFT层包括栅极和数据线，薄膜晶体管和存储电极。 数据线与栅极线交叉，并通过栅极绝缘层与栅极线电绝缘。 TFT与栅极和数据线电连接。 钝化层覆盖TFT层。 有机层位于钝化层上。 低温沉积的无机绝缘层在有机层上，低温约为100℃至约250℃。像素电极位于无机绝缘层上，通过接触电连接到TFT 通过无机绝缘层，有机层和钝化层形成的孔。 无机绝缘层有助于阻止杂质从有机层泄漏到无机绝缘层上方的层。

公开(公告)号：US07829897B2

公开(公告)日：2010-11-09

申请号：US12428782

申请日：2009-04-23

申请人： Jean-Ho Song ,  Chong-Chul Chai ,  Jin-Ho Ju ,  Joo-Ae Youn ,  Jun-Hyung Souk ,  Min Kang

发明人： Jean-Ho Song ,  Chong-Chul Chai ,  Jin-Ho Ju ,  Joo-Ae Youn ,  Jun-Hyung Souk ,  Min Kang

IPC分类号： H01L33/00

CPC分类号： G02F1/1368 ,  G02F1/133514 ,  G02F2001/133565 ,  G02F2001/133567 ,  H01L27/1214 ,  H01L27/1248 ,  H01L29/4908 ,  H01L29/78633

摘要： An array substrate of a liquid crystal display device having a color filter on a gate metal layer, and a data metal layer formed on the color filter. First a gate insulating layer is formed on the gate metal layer to protect and a second gate insulating layer is formed on the color filter layer. Gate lines and gate electrodes are formed in direct contact with the substrate, and color filters are formed on the gate electrodes. To protect gate lines in the patterning process of color filters, a first gate insulating layer is formed on the gate lines and electrodes. Therefore, a high aperture ratio may be enhanced, and the manufacturing yield may be increased.

摘要翻译： 在栅极金属层上具有滤色器的液晶显示装置的阵列基板和形成在滤色器上的数据金属层。 首先，在栅极金属层上形成栅极绝缘层以进行保护，并且在滤色器层上形成第二栅极绝缘层。 栅极线和栅电极形成为与衬底直接接触，并且在栅电极上形成滤色器。 为了在滤色器的图案化工艺中保护栅极线，在栅极线和电极上形成第一栅极绝缘层。 因此，可以提高高开口率，并且可以提高制造成品率。

公开(公告)号：US20070139597A1

公开(公告)日：2007-06-21

申请号：US11559589

申请日：2006-11-14

申请人： Yi-Seop Shim ,  Gug-Rae Jo ,  Byoung-Joo Kim ,  Ji-Won Choi ,  Jang-Soo Kim ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Chong-Chul Chai

发明人： Yi-Seop Shim ,  Gug-Rae Jo ,  Byoung-Joo Kim ,  Ji-Won Choi ,  Jang-Soo Kim ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Chong-Chul Chai

IPC分类号： G02F1/1343 ,  G02F1/1335

CPC分类号： G02F1/1362 ,  G02F1/136227 ,  G02F2001/136222

摘要： A display substrate includes a thin film transistor layer, a color filter layer, a plurality of pixel electrodes, a first cover layer and an alignment layer. The thin film transistor layer includes a plurality of pixel regions. The color filter layer is formed on the thin film transistor layer. The pixel electrodes are formed on the color filter layer with at least one gap defined between adjacent pixel electrodes. The first cover layer is provided in the gap between adjacent pixel electrodes and covers a portion of the color filter layer exposed by the gap between the pixel electrodes. The alignment layer is formed on the pixel electrodes and the first cover layer. Therefore, the color filter layer is spaced apart from the alignment layer to decrease an afterimage, thereby improving an image display quality

摘要翻译： 显示基板包括薄膜晶体管层，滤色器层，多个像素电极，第一覆盖层和取向层。 薄膜晶体管层包括多个像素区域。 滤色器层形成在薄膜晶体管层上。 像素电极形成在滤色器层上，在相邻像素电极之间限定有至少一个间隙。 第一覆盖层设置在相邻像素电极之间的间隙中，并且覆盖由像素电极之间的间隙暴露的滤色器层的一部分。 取向层形成在像素电极和第一覆盖层上。 因此，滤色器层与对准层间隔开以减少残像，从而提高图像显示质量

公开(公告)号：US08809467B2

公开(公告)日：2014-08-19

申请号：US12723419

申请日：2010-03-12

申请人： Hoon Kang ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Jin-Ho Ju ,  Doo-Hee Jung ,  Jung-In Park ,  Shi-Yul Kim

发明人： Hoon Kang ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Jin-Ho Ju ,  Doo-Hee Jung ,  Jung-In Park ,  Shi-Yul Kim

IPC分类号： C08G59/00

CPC分类号： C08F220/06 ,  C08F220/26 ,  C08F222/04 ,  C08F224/00 ,  C08G73/1067 ,  G02F1/133707 ,  G02F1/133719 ,  G02F1/133753 ,  G02F1/133788 ,  G02F1/136209 ,  G02F1/13624 ,  G02F2001/133726 ,  G02F2001/133746 ,  G02F2001/133757 ,  G02F2001/136222 ,  G02F2201/086 ,  G02F2202/022 ,  G02F2202/103 ,  G02F2202/104

摘要： An organic layer composition and a liquid crystal display including the same are provided. An organic layer composition according to an exemplary embodiment includes a binder formed by copolymerizing compounds included in a first group and a second group, wherein the first group includes an acryl-based compound and the second group includes a compound without a —COO— group.

摘要翻译： 提供了有机层组合物和包括其的液晶显示器。 根据示例性实施方案的有机层组合物包括通过共聚第一组中包含的化合物和第二组而形成的粘合剂，其中第一组包括丙烯酸类化合物，第二组包括不含-COO-基团的化合物。

公开(公告)号：US07888675B2

公开(公告)日：2011-02-15

申请号：US12099718

申请日：2008-04-08

申请人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

公开(公告)号：US07371621B2

公开(公告)日：2008-05-13

申请号：US11486330

申请日：2006-07-12

申请人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

公开(公告)号：US20070096100A1

公开(公告)日：2007-05-03

申请号：US11584113

申请日：2006-10-20

申请人： Woo-Geun Lee ,  Jin-Ho Ju

发明人： Woo-Geun Lee ,  Jin-Ho Ju

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L29/78618 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor according to an embodiment of the present invention includes: a substrate; a control electrode disposed on the substrate; a gate insulating layer disposed on the control electrode; a semiconductor member disposed on the gate insulating layer, overlapping the control electrode, and including a first portion of amorphous silicon and a second portion of polycrystalline silicon; an input electrode contacting the semiconductor member; and an output electrode contacting the semiconductor member.

摘要翻译： 根据本发明实施例的薄膜晶体管包括：衬底; 设置在所述基板上的控制电极; 设置在所述控制电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体部件，与所述控制电极重叠，并且包括第一部分非晶硅和第二部分多晶硅; 接触半导体部件的输入电极; 以及与半导体部件接触的输出电极。

公开(公告)号：US20070012967A1

公开(公告)日：2007-01-18

申请号：US11486330

申请日：2006-07-12

申请人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L31/113

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

公开(公告)号：US07144662B2

公开(公告)日：2006-12-05

申请号：US10493193

申请日：2002-02-20

申请人： Dong-Ki Lee ,  Sung-Chul Kang ,  You-Kyoung Lee ,  Jin-Ho Ju

发明人： Dong-Ki Lee ,  Sung-Chul Kang ,  You-Kyoung Lee ,  Jin-Ho Ju

IPC分类号： G03F7/023

CPC分类号： G03F7/0226

摘要： The present invention relates to a photoresist composition having high heat resistance used in the production process of an LCD, and more particularly, to a photoresist composition having high heat resistance, capable of decreasing process tact (a way), of process simplification, and of the retrenchment of expenditures. The inventive composition facilitates this through making it possible to skip 5 processes, such as Cr metal deposition forming a metal film, and the photo/etch/PR strip/etch steps of the whole surface of the metal, by substituting the inventive composition for the usual metal film, such that N+ ion doping in production of TFT-LCD can take place due its high heat resistance.

摘要翻译： 本发明涉及在LCD的生产过程中使用的具有高耐热性的光致抗蚀剂组合物，更具体地说，涉及具有高耐热性，能够降低工艺简化的工艺（一种方法）的光致抗蚀剂组合物，以及 削减支出。 本发明的组合物通过使得本发明的组合物代替本发明的组合物可以跳过5种工艺，例如形成金属膜的Cr金属沉积和金属的整个表面的光刻/蚀刻/ PR剥离/蚀刻步骤 通常的金属膜，由于其高耐热性，可以发生TFT-LCD的生产中的N + + / - 离子掺杂。