公开(公告)号：US09887733B2

公开(公告)日：2018-02-06

申请号：US15582371

申请日：2017-04-28

Applicant: Lattice Semiconductor Corporation

Inventor： Kai Zhou ,  Shinje Tahk ,  Kai Lei ,  Qiming Wu ,  Gijung Ahn ,  Min-Kyu Kim ,  Fei Song ,  Kexin Luo

IPC: H04L5/14 ,  H04B3/23 ,  H04L5/00

CPC classification number: H04B3/232 ,  H04B1/525 ,  H04L5/0091 ,  H04L5/14 ,  H04L5/1461 ,  H04M9/082

Abstract: A method that calibrates a device for echo cancellation and a device with calibration for echo cancellation are provided. Devices may be calibrated such that the echo residual error is less than a threshold determined by the calibration accuracy. Non-ideal factors such as mismatch may be eliminated during calibration.

公开(公告)号：US10523153B2

公开(公告)日：2019-12-31

申请号：US15917550

申请日：2018-03-09

Applicant: Lattice Semiconductor Corporation

Inventor： Qiming Wu ,  Yibin Fu ,  Yu Shen ,  Zhi Wu ,  Kai Lei ,  Kai Zhou ,  Kexin Luo ,  Xiaofeng Wang

IPC: H03B5/04 ,  H03L7/00 ,  H03L7/099 ,  H03K3/0231 ,  H03L7/093

Abstract: A voltage controlled oscillator (VCO) is disclosed. The VCO includes an amplifier that receives a control signal and a feedback signal and generates an amplified output signal based on the difference between the control signal and the feedback signal. The VCO also includes circuitry to generate an oscillating output signal based on the amplifier output signal. Additionally, the VCO includes a feedback amplifier that generates the feedback signal based on the output of the amplifier. The feedback amplifier includes a first resistor connected in parallel with a second resistor, the second resistor having an adjustable resistance.

公开(公告)号：US10116428B2

公开(公告)日：2018-10-30

申请号：US15312149

申请日：2014-05-20

Applicant: Lattice Semiconductor Corporation

Inventor： Qiming Wu ,  Kai Lei ,  Fei Song ,  Kai Zhou ,  Gijung Ahn ,  Zhi Wu ,  Min-Kyu Kim

IPC: H04L5/14 ,  H04B3/23 ,  H04B3/30

Abstract: Systems, devices and methods for analog echo cancellation for high speed full duplex data transmissions, which include a first set of differential nodes to receive reception data and transmission data, a second set of differential nodes to receive the transmission data, and a subtraction circuit to receive data from the first set of differential nodes and data from the second set of differential nodes. The subtraction circuit includes a plurality of capacitors to receive data from each of the first and second sets differential nodes, and a termination circuit for providing DC termination voltage to subtract the data of the second set of differential nodes from the data of the first set of differential nodes to eliminate echo from the reception data received at the first set differential nodes.

公开(公告)号：US10044539B2

公开(公告)日：2018-08-07

申请号：US15358748

申请日：2016-11-22

Applicant: Lattice Semiconductor Corporation

Inventor： Qiming Wu ,  Bing Zhang ,  Fei Song

IPC: H04B3/46 ,  H04B17/00 ,  H04Q1/20 ,  H04L27/227 ,  H04L25/03

Abstract: Embodiments of the present disclosure relate to methods and device for receiving PAM data stream. In an embodiment, a method comprises receiving a signal stream modulated with pulse amplitude modulation (PAM) associated with a plurality of bit patterns; determining boundary voltages for the plurality of bit patterns; and calibrating, based on the boundary voltages, a threshold voltage for use in recognition of the plurality of bit patterns. In this way, bit patterns may be accurately recognized based on the calibrated threshold voltage.

公开(公告)号：US09722643B2

公开(公告)日：2017-08-01

申请号：US14651203

申请日：2015-01-05

Applicant: Lattice Semiconductor Corporation

Inventor： Jiandong Ke ,  Kai Lei ,  Yi Gao ,  Qi Zhou ,  Qiming Wu ,  Kai Zhou

IPC: H04B1/40 ,  H04B1/04 ,  H04B3/23 ,  H04L5/14

CPC classification number: H04B1/0475 ,  H04B1/40 ,  H04B3/23 ,  H04L5/14

Abstract: Embodiments relate to enhancing echo cancellation in a transceiver integrated circuit (IC) for full-duplex communication by providing a signal path connected to a dummy driver that replicates a signal path between a main driver and a counterpart transceiver IC to cause a duplicated signal generated by the dummy driver to more closely replicate a sending signal generated by the main driver. The signal path connected to the dummy driver includes circuit elements having transmission line parameters and RLC parameters that replicate transmission line parameters and RLC parameters of circuit elements in the signal path between the main driver and the counterpart transceiver IC.

公开(公告)号：US20170085359A1

公开(公告)日：2017-03-23

申请号：US15312149

申请日：2014-05-20

Applicant: LATTICE SEMICONDUCTOR CORPORATION

Inventor： Qiming Wu ,  Kai Lei ,  Fei Song ,  Kai Zhou ,  Gijung Ahn ,  Zhi Wu ,  Min-Kyu Kim

IPC: H04L5/14

CPC classification number: H04L5/1461 ,  H04B3/23 ,  H04B3/30

Abstract: Systems, devices and methods for analog echo cancellation for high speed full duplex data transmissions, which include a first set of differential nodes to receive reception data and transmission data, a second set of differential nodes to receive the transmission data, and a subtraction circuit to receive data from the first set of differential nodes and data from the second set of differential nodes. The subtraction circuit includes a plurality of capacitors to receive data from each of the first and second sets differential nodes, and a termination circuit for providing DC termination voltage to subtract the data of the second set of differential nodes from the data of the first set of differential nodes to eliminate echo from the reception data received at the first set differential nodes.

公开(公告)号：US09948234B2

公开(公告)日：2018-04-17

申请号：US14440186

申请日：2014-07-24

Applicant: LATTICE SEMICONDUCTOR CORPORATION

Inventor： Qiming Wu ,  Yibin Fu ,  Yu Shen ,  Zhi Wu ,  Kai Lei ,  Kai Zhou ,  Kexin Luo ,  Xiaofeng Wang

IPC: H03L7/00 ,  H03B5/04 ,  H03L7/099 ,  H03K3/0231 ,  H03L7/093

CPC classification number: H03B5/04 ,  H03B2200/0038 ,  H03K3/0231 ,  H03L7/00 ,  H03L7/093 ,  H03L7/099

Abstract: A voltage controlled oscillator (VCO) is disclosed. The VCO includes an amplifier that receives a control signal and a feedback signal and generates an amplified output signal based on the difference between the control signal and the feedback signal. The VCO also includes circuitry to generate an oscillating output signal based on the amplifier output signal. Additionally, the VCO includes a feedback amplifier that generates the feedback signal based on the output of the amplifier. The feedback amplifier includes a first resistor connected in parallel with a second resistor, the second resistor having an adjustable resistance.

公开(公告)号：US20170171004A1

公开(公告)日：2017-06-15

申请号：US15358748

申请日：2016-11-22

Applicant: Lattice Semiconductor Corporation

Inventor： Qiming Wu ,  Bing Zhang ,  Fei Song

IPC: H04L27/227 ,  H04L25/03

CPC classification number: H04L27/2275 ,  H04L25/0272 ,  H04L25/03273 ,  H04L25/4917 ,  H04Q2213/03

Abstract: Embodiments of the present disclosure relate to methods and device for receiving PAM data stream. In an embodiment, a method comprises receiving a signal stream modulated with pulse amplitude modulation (PAM) associated with a plurality of bit patterns; determining boundary voltages for the plurality of bit patterns; and calibrating, based on the boundary voltages, a threshold voltage for use in recognition of the plurality of bit patterns. In this way, bit patterns may be accurately recognized based on the calibrated threshold voltage.

公开(公告)号：US20170149437A1

公开(公告)日：2017-05-25

申请号：US15114394

申请日：2015-05-12

Applicant: Lattice Semiconductor Corporation

Inventor： Kexin Luo ,  Rui Yin ,  Xiaofeng Wang ,  Jie Yuan ,  Qiming Wu ,  Fei Song ,  Min-Kyu Kim

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B5/04 ,  H03K3/011 ,  H03K3/0231 ,  H03K3/03 ,  H03L1/00 ,  H03L7/093 ,  H03L7/099

Abstract: Embodiments relate to a voltage oscillator (VCO) that uses a replica bias circuit to generate a cascode bias voltage. The VCO generate an output periodic signal having a frequency and phase that is less or not susceptible to voltage swings by using a bias voltage generated in a replica bias circuit that replicates a voltage-to-current converter in the VOC. The bias voltage is generated and regulated according to a power supply voltage that supplies power to the VCO to account for voltage variations in the power supply voltage.

公开(公告)号：US10250263B2

公开(公告)日：2019-04-02

申请号：US15114394

申请日：2015-05-12

Applicant: Lattice Semiconductor Corporation

Inventor： Kexin Luo ,  Rui Yin ,  Xiaofeng Wang ,  Jie Yuan ,  Qiming Wu ,  Fei Song ,  Min-Kyu Kim

IPC: H03L7/00 ,  H03K3/011 ,  H03B5/04 ,  H03L1/00 ,  H03L7/093 ,  H03K3/03 ,  H03K3/0231 ,  H03L7/099

Abstract: Embodiments relate to a voltage oscillator (VCO) that uses a replica bias circuit to generate a cascode bias voltage. The VCO generate an output periodic signal having a frequency and phase that is less or not susceptible to voltage swings by using a bias voltage generated in a replica bias circuit that replicates a voltage-to-current converter in the VOC. The bias voltage is generated and regulated according to a power supply voltage that supplies power to the VCO to account for voltage variations in the power supply voltage.